From fea4e8a9d5342d1a3150e9da728df6e3de23b201 Mon Sep 17 00:00:00 2001 From: Christoph Niedermaier Date: Mon, 2 Aug 2021 16:10:35 +0200 Subject: ARM: dts: imx6q-dhcom: Cleanup of the devicetrees Following cleanups of the devicetrees done, no change in function: - Remove parentheses from the license - Update copyright date - Alphabetical sorting - Add comments - Update pinctrl names - Hex values in lower case - Set 3rd values of fixed regulators gpio property to 0 - Replace interrupt type with a define - Remove superfluous property max-speed from the fec node Signed-off-by: Christoph Niedermaier Reviewed-by: Marek Vasut Cc: Shawn Guo Cc: Fabio Estevam Cc: Marek Vasut Cc: NXP Linux Team Cc: kernel@dh-electronics.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-dhcom-pdk2.dts | 90 +++++++++++++++++----------------- 1 file changed, 45 insertions(+), 45 deletions(-) (limited to 'arch/arm/boot/dts/imx6q-dhcom-pdk2.dts') diff --git a/arch/arm/boot/dts/imx6q-dhcom-pdk2.dts b/arch/arm/boot/dts/imx6q-dhcom-pdk2.dts index 897bbeb91d64..4b8801e91bd4 100644 --- a/arch/arm/boot/dts/imx6q-dhcom-pdk2.dts +++ b/arch/arm/boot/dts/imx6q-dhcom-pdk2.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0+) +// SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2015 DH electronics GmbH + * Copyright (C) 2015-2021 DH electronics GmbH * Copyright (C) 2018 Marek Vasut */ @@ -18,27 +18,27 @@ }; clk_ext_audio_codec: clock-codec { - compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <24000000>; + compatible = "fixed-clock"; }; display_bl: display-bl { - compatible = "pwm-backlight"; - pwms = <&pwm1 0 50000 PWM_POLARITY_INVERTED>; brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>; + compatible = "pwm-backlight"; default-brightness-level = <8>; - enable-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>; /* GPIO G */ + pwms = <&pwm1 0 50000 PWM_POLARITY_INVERTED>; status = "okay"; }; lcd_display: disp0 { - compatible = "fsl,imx-parallel-display"; #address-cells = <1>; #size-cells = <0>; + compatible = "fsl,imx-parallel-display"; interface-pix-fmt = "rgb24"; - pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ipu1_lcdif &pinctrl_dhcom_g>; + pinctrl-names = "default"; status = "okay"; port@0 { @@ -63,36 +63,36 @@ compatible = "gpio-keys"; button-0 { + gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* GPIO A */ label = "TA1-GPIO-A"; linux,code = ; - gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; pinctrl-0 = <&pinctrl_dhcom_a>; pinctrl-names = "default"; wakeup-source; }; button-1 { + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* GPIO B */ label = "TA2-GPIO-B"; linux,code = ; - gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; pinctrl-0 = <&pinctrl_dhcom_b>; pinctrl-names = "default"; wakeup-source; }; button-2 { + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; /* GPIO C */ label = "TA3-GPIO-C"; linux,code = ; - gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; pinctrl-0 = <&pinctrl_dhcom_c>; pinctrl-names = "default"; wakeup-source; }; button-3 { + gpios = <&gpio6 3 GPIO_ACTIVE_LOW>; /* GPIO D */ label = "TA4-GPIO-D"; linux,code = ; - gpios = <&gpio6 3 GPIO_ACTIVE_LOW>; pinctrl-0 = <&pinctrl_dhcom_d>; pinctrl-names = "default"; wakeup-source; @@ -108,9 +108,9 @@ */ led-5 { color = ; + default-state = "off"; function = LED_FUNCTION_INDICATOR; gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* GPIO E */ - default-state = "off"; pinctrl-0 = <&pinctrl_dhcom_e>; pinctrl-names = "default"; status = "disabled"; @@ -118,35 +118,35 @@ led-6 { color = ; + default-state = "off"; function = LED_FUNCTION_INDICATOR; gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; /* GPIO F */ - default-state = "off"; pinctrl-0 = <&pinctrl_dhcom_f>; pinctrl-names = "default"; }; led-7 { color = ; + default-state = "off"; function = LED_FUNCTION_INDICATOR; gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* GPIO H */ - default-state = "off"; pinctrl-0 = <&pinctrl_dhcom_h>; pinctrl-names = "default"; }; led-8 { color = ; + default-state = "off"; function = LED_FUNCTION_INDICATOR; gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */ - default-state = "off"; pinctrl-0 = <&pinctrl_dhcom_i>; pinctrl-names = "default"; }; }; panel { - compatible = "edt,etm0700g0edh6"; backlight = <&display_bl>; + compatible = "edt,etm0700g0edh6"; port { lcd_panel_in: endpoint { @@ -156,23 +156,23 @@ }; sound { - compatible = "fsl,imx-audio-sgtl5000"; - model = "imx-sgtl5000"; - ssi-controller = <&ssi1>; audio-codec = <&sgtl5000>; audio-routing = "MIC_IN", "Mic Jack", "Mic Jack", "Mic Bias", "LINE_IN", "Line In Jack", "Headphone Jack", "HP_OUT"; - mux-int-port = <1>; + compatible = "fsl,imx-audio-sgtl5000"; + model = "imx-sgtl5000"; mux-ext-port = <3>; + mux-int-port = <1>; + ssi-controller = <&ssi1>; }; }; &audmux { - pinctrl-names = "default"; pinctrl-0 = <&pinctrl_audmux_ext>; + pinctrl-names = "default"; status = "okay"; }; @@ -189,8 +189,8 @@ &fec { phy-mode = "rgmii"; phy-handle = <ðphy7>; - pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet_1G>; + pinctrl-names = "default"; status = "okay"; mdio { @@ -204,20 +204,20 @@ pinctrl-0 = <&pinctrl_ethphy7>; pinctrl-names = "default"; reg = <7>; - reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; reset-assert-us = <1000>; reset-deassert-us = <1000>; + reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; rxc-skew-ps = <3000>; rxd0-skew-ps = <0>; rxd1-skew-ps = <0>; rxd2-skew-ps = <0>; rxd3-skew-ps = <0>; + rxdv-skew-ps = <0>; txc-skew-ps = <3000>; txd0-skew-ps = <0>; txd1-skew-ps = <0>; txd2-skew-ps = <0>; txd3-skew-ps = <0>; - rxdv-skew-ps = <0>; txen-skew-ps = <0>; }; }; @@ -230,21 +230,21 @@ &i2c2 { sgtl5000: codec@a { - compatible = "fsl,sgtl5000"; - reg = <0x0a>; #sound-dai-cells = <0>; clocks = <&clk_ext_audio_codec>; + compatible = "fsl,sgtl5000"; + reg = <0x0a>; VDDA-supply = <®_3p3v>; VDDIO-supply = <&sw2_reg>; }; touchscreen@38 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_dhcom_e>; compatible = "edt,edt-ft5406"; - reg = <0x38>; interrupt-parent = <&gpio4>; interrupts = <5 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */ + pinctrl-0 = <&pinctrl_dhcom_e>; + pinctrl-names = "default"; + reg = <0x38>; }; }; @@ -254,13 +254,13 @@ &pcie { pinctrl-0 = <&pinctrl_pcie &pinctrl_dhcom_j>; - reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>; + reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>; /* GPIO J */ status = "okay"; }; &pwm1 { - pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; + pinctrl-names = "default"; status = "okay"; }; @@ -272,12 +272,11 @@ status = "okay"; }; -&usdhc3 { +&usdhc3 { /* Micro SD card on module */ status = "okay"; }; &iomuxc { - pinctrl-names = "default"; pinctrl-0 = < /* * The following DHCOM GPIOs are used on this board. @@ -300,50 +299,51 @@ &pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u &pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int >; + pinctrl-names = "default"; pinctrl_audmux_ext: audmux-ext-grp { fsl,pins = < - MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 >; }; pinctrl_enet_1G: enet-1G-grp { fsl,pins = < - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 >; }; pinctrl_ethphy7: ethphy7-grp { fsl,pins = < + MX6QDL_PAD_EIM_D26__GPIO3_IO26 0xb1 /* WOL */ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0xb0 /* Reset */ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0xb1 /* Int */ - MX6QDL_PAD_EIM_D26__GPIO3_IO26 0xb1 /* WOL */ >; }; pinctrl_ipu1_lcdif: ipu1-lcdif-grp { fsl,pins = < MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38 - MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38 + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38 -- cgit v1.2.3