From 7388fa8acfce2c3b41babc53c3f3d0b247b098af Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Wed, 27 Oct 2021 14:45:06 +0100 Subject: dt-bindings: pincfg-node: Add "output-impedance-ohms" property On RZ/G2L SoC for Group-B pins, output impedance can be configured. This patch documents "output-impedance-ohms" property in pincfg-node.yaml so that other platforms requiring such feature can make use of this property. Signed-off-by: Lad Prabhakar Reviewed-by: Biju Das Acked-by: Rob Herring Reviewed-by: Linus Walleij Link: https://lore.kernel.org/r/20211027134509.5036-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml b/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml index 71ed0a9def84..4b22a9e3a447 100644 --- a/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml +++ b/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml @@ -114,6 +114,9 @@ properties: description: enable output on a pin without actively driving it (such as enabling an output buffer) + output-impedance-ohms: + description: set the output impedance of a pin to at most X ohms + output-low: type: boolean description: set the pin to output mode with low level -- cgit v1.2.3 From aa52b008441fb5a5df01c1d016e5172d2ebc6579 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Wed, 10 Nov 2021 22:46:17 +0000 Subject: dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Add output-impedance-ohms property RZ/G2L SoC has two groups of pins, Group-A and Group-B. RZ/G2L SoC supports configuring Output Impedance for Group-B pins (valid values 33/50/66/100). Signed-off-by: Lad Prabhakar Reviewed-by: Biju Das Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20211110224622.16022-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml index ef68dabcf4dc..3a66fd214c17 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml @@ -73,6 +73,8 @@ additionalProperties: pins: true drive-strength: enum: [ 2, 4, 8, 12 ] + output-impedance-ohms: + enum: [ 33, 50, 66, 100 ] power-source: enum: [ 1800, 2500, 3300 ] slew-rate: true -- cgit v1.2.3 From 1e6a58ad39a638f29f9d3e8c8128a2ab355ad1ac Mon Sep 17 00:00:00 2001 From: David Virag Date: Mon, 1 Nov 2021 00:15:11 +0100 Subject: dt-bindings: pinctrl: samsung: Document Exynos7885 Document compatible string for Exynos7885 SoC. Signed-off-by: David Virag Acked-by: Rob Herring Link: https://lore.kernel.org/r/20211031231511.46856-1-virag.david003@gmail.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index b8b475967ff9..9e70edceb21b 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -22,6 +22,7 @@ Required Properties: - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller. - "samsung,exynos5433-pinctrl": for Exynos5433 compatible pin-controller. - "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller. + - "samsung,exynos7885-pinctrl": for Exynos7885 compatible pin-controller. - "samsung,exynos850-pinctrl": for Exynos850 compatible pin-controller. - "samsung,exynosautov9-pinctrl": for ExynosAutov9 compatible pin-controller. -- cgit v1.2.3 From 463201a784c45cd5413ecd0dfbe80224489b7ea5 Mon Sep 17 00:00:00 2001 From: Kavyasree Kotagiri Date: Thu, 18 Nov 2021 16:55:47 +0530 Subject: dt-bindings: pinctrl: ocelot: add lan966x SoC support Add documentation for the compatible designated for lan966x. Signed-off-by: Kavyasree Kotagiri Acked-by: Rob Herring Link: https://lore.kernel.org/r/20211118112548.14582-2-kavyasree.kotagiri@microchip.com Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt index db99bd95d423..3bb76487669f 100644 --- a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt @@ -4,7 +4,8 @@ Microsemi Ocelot pin controller Device Tree Bindings Required properties: - compatible : Should be "mscc,ocelot-pinctrl", "mscc,jaguar2-pinctrl", "microchip,sparx5-pinctrl", - "mscc,luton-pinctrl" or "mscc,serval-pinctrl" + "mscc,luton-pinctrl", "mscc,serval-pinctrl" or + "microchip,lan966x-pinctrl" - reg : Address and length of the register set for the device - gpio-controller : Indicates this device is a GPIO controller - #gpio-cells : Must be 2. -- cgit v1.2.3 From 3fe59cc4ff641b106cc24930204d4cd2c82f318f Mon Sep 17 00:00:00 2001 From: Vamsi Krishna Lanka Date: Mon, 15 Nov 2021 23:39:45 -0800 Subject: dt-bindings: pinctrl: qcom: Add SDX65 pinctrl bindings Add device tree binding Documentation details for Qualcomm SDX65 pinctrl driver. Signed-off-by: Vamsi Krishna Lanka Reviewed-by: Bjorn Andersson Link: https://lore.kernel.org/r/06234768890dc7572226f23d432e5a69a4d5b305.1637048107.git.quic_vamslank@quicinc.com Signed-off-by: Linus Walleij --- .../bindings/pinctrl/qcom,sdx65-pinctrl.yaml | 195 +++++++++++++++++++++ 1 file changed, 195 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml new file mode 100644 index 000000000000..58dd34f4fcb5 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml @@ -0,0 +1,195 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,sdx65-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. SDX65 TLMM block + +maintainers: + - Vamsi krishna Lanka + +description: + This binding describes the Top Level Mode Multiplexer block found in the + SDX65 platform. + +properties: + compatible: + const: qcom,sdx65-tlmm + + reg: + description: Specifies the base address and size of the TLMM register space + maxItems: 1 + + interrupts: + description: Specifies the TLMM summary IRQ + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + description: Specifies the PIN numbers and Flags, as defined in + include/dt-bindings/interrupt-controller/irq.h + const: 2 + + gpio-controller: true + + '#gpio-cells': + description: Specifying the pin number and flags, as defined in + include/dt-bindings/gpio/gpio.h + const: 2 + + gpio-ranges: + maxItems: 1 + + gpio-reserved-ranges: + maxItems: 1 + +#PIN CONFIGURATION NODES +patternProperties: + '$-state': + oneOf: + - $ref: "#/$defs/qcom-sdx65-tlmm-state" + - patternProperties: + ".*": + $ref: "#/$defs/qcom-sdx65-tlmm-state" +'$defs': + qcom-sdx65-tlmm-state: + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this subnode. + items: + oneOf: + - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9])$" + - enum: [ ufs_reset, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data, sdc1_rclk ] + minItems: 1 + maxItems: 150 + + function: + description: + Specify the alternative function to be configured for the specified + pins. Functions are only valid for gpio pins. + enum: [ blsp_uart1, blsp_spi1, blsp_i2c1, blsp_uim1, atest_tsens, + bimc_dte1, dac_calib0, blsp_spi8, blsp_uart8, blsp_uim8, + qdss_cti_trig_out_b, bimc_dte0, dac_calib1, qdss_cti_trig_in_b, + dac_calib2, atest_tsens2, atest_usb1, blsp_spi10, blsp_uart10, + blsp_uim10, atest_bbrx1, atest_usb13, atest_bbrx0, atest_usb12, + mdp_vsync, edp_lcd, blsp_i2c10, atest_gpsadc1, atest_usb11, + atest_gpsadc0, edp_hot, atest_usb10, m_voc, dac_gpio, atest_char, + cam_mclk, pll_bypassnl, qdss_stm7, blsp_i2c8, qdss_tracedata_b, + pll_reset, qdss_stm6, qdss_stm5, qdss_stm4, atest_usb2, cci_i2c, + qdss_stm3, dac_calib3, atest_usb23, atest_char3, dac_calib4, + qdss_stm2, atest_usb22, atest_char2, qdss_stm1, dac_calib5, + atest_usb21, atest_char1, dbg_out, qdss_stm0, dac_calib6, + atest_usb20, atest_char0, dac_calib10, qdss_stm10, + qdss_cti_trig_in_a, cci_timer4, blsp_spi6, blsp_uart6, blsp_uim6, + blsp2_spi, qdss_stm9, qdss_cti_trig_out_a, dac_calib11, + qdss_stm8, cci_timer0, qdss_stm13, dac_calib7, cci_timer1, + qdss_stm12, dac_calib8, cci_timer2, blsp1_spi, qdss_stm11, + dac_calib9, cci_timer3, cci_async, dac_calib12, blsp_i2c6, + qdss_tracectl_a, dac_calib13, qdss_traceclk_a, dac_calib14, + dac_calib15, hdmi_rcv, dac_calib16, hdmi_cec, pwr_modem, + dac_calib17, hdmi_ddc, pwr_nav, dac_calib18, pwr_crypto, + dac_calib19, hdmi_hot, dac_calib20, dac_calib21, pci_e0, + dac_calib22, dac_calib23, dac_calib24, tsif1_sync, dac_calib25, + sd_write, tsif1_error, blsp_spi2, blsp_uart2, blsp_uim2, + qdss_cti, blsp_i2c2, blsp_spi3, blsp_uart3, blsp_uim3, blsp_i2c3, + uim3, blsp_spi9, blsp_uart9, blsp_uim9, blsp10_spi, blsp_i2c9, + blsp_spi7, blsp_uart7, blsp_uim7, qdss_tracedata_a, blsp_i2c7, + qua_mi2s, gcc_gp1_clk_a, ssc_irq, uim4, blsp_spi11, blsp_uart11, + blsp_uim11, gcc_gp2_clk_a, gcc_gp3_clk_a, blsp_i2c11, cri_trng0, + cri_trng1, cri_trng, qdss_stm18, pri_mi2s, qdss_stm17, blsp_spi4, + blsp_uart4, blsp_uim4, qdss_stm16, qdss_stm15, blsp_i2c4, + qdss_stm14, dac_calib26, spkr_i2s, audio_ref, lpass_slimbus, + isense_dbg, tsense_pwm1, tsense_pwm2, btfm_slimbus, ter_mi2s, + qdss_stm22, qdss_stm21, qdss_stm20, qdss_stm19, gcc_gp1_clk_b, + sec_mi2s, blsp_spi5, blsp_uart5, blsp_uim5, gcc_gp2_clk_b, + gcc_gp3_clk_b, blsp_i2c5, blsp_spi12, blsp_uart12, blsp_uim12, + qdss_stm25, qdss_stm31, blsp_i2c12, qdss_stm30, qdss_stm29, + tsif1_clk, qdss_stm28, tsif1_en, tsif1_data, sdc4_cmd, qdss_stm27, + qdss_traceclk_b, tsif2_error, sdc43, vfr_1, qdss_stm26, tsif2_clk, + sdc4_clk, qdss_stm24, tsif2_en, sdc42, qdss_stm23, qdss_tracectl_b, + sd_card, tsif2_data, sdc41, tsif2_sync, sdc40, mdp_vsync_p_b, + ldo_en, mdp_vsync_s_b, ldo_update, blsp11_uart_tx_b, blsp11_uart_rx_b, + blsp11_i2c_sda_b, prng_rosc, blsp11_i2c_scl_b, uim2, uim1, uim_batt, + pci_e2, pa_indicator, adsp_ext, ddr_bist, qdss_tracedata_11, + qdss_tracedata_12, modem_tsync, nav_dr, nav_pps, pci_e1, gsm_tx, + qspi_cs, ssbi2, ssbi1, mss_lte, qspi_clk, qspi0, qspi1, qspi2, qspi3, + gpio ] + + drive-strength: + enum: [2, 4, 6, 8, 10, 12, 14, 16] + default: 2 + description: + Selects the drive strength for the specified pins, in mA. + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + output-high: true + + output-low: true + + required: + - pins + - function + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - gpio-controller + - '#gpio-cells' + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include + tlmm: pinctrl@f100000 { + compatible = "qcom,sdx65-tlmm"; + reg = <0x03000000 0xdc2000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&tlmm 0 0 109>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + + serial-pins { + pins = "gpio8", "gpio9"; + function = "blsp_uart3"; + drive-strength = <2>; + bias-disable; + }; + + uart-w-subnodes-state { + rx { + pins = "gpio4"; + function = "blsp_uart1"; + bias-pull-up; + }; + + tx { + pins = "gpio5"; + function = "blsp_uart1"; + bias-disable; + }; + }; + }; +... -- cgit v1.2.3 From e3da3323dabf27c4aa9a51c7832e7f976fe072f4 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Fri, 12 Nov 2021 12:53:40 +0100 Subject: dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for PM8019 Add pmic-gpio compatible string for pm8019 pmic. Signed-off-by: Konrad Dybcio Reviewed-by: Bjorn Andersson Link: https://lore.kernel.org/r/20211112115342.17100-1-konrad.dybcio@somainline.org Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml index 8952b4cc1262..55a46dec56b6 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml @@ -26,6 +26,7 @@ properties: - qcom,pm8005-gpio - qcom,pm8008-gpio - qcom,pm8018-gpio + - qcom,pm8019-gpio - qcom,pm8038-gpio - qcom,pm8058-gpio - qcom,pm8150-gpio -- cgit v1.2.3 From f35172c030dba5a1ff9dfe47cbeb123be45d75c7 Mon Sep 17 00:00:00 2001 From: Loic Poulain Date: Tue, 16 Nov 2021 16:35:15 +0100 Subject: dt-bindings: qcom,pmic-gpio: Add pm2250 compatible string Add compatible strings for pm2250 SPMI GPIO to documentation. Signed-off-by: Loic Poulain Link: https://lore.kernel.org/r/1637076915-3280-2-git-send-email-loic.poulain@linaro.org Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml index 55a46dec56b6..3e02b695b0c3 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml @@ -17,6 +17,7 @@ properties: compatible: items: - enum: + - qcom,pm2250-gpio - qcom,pm660-gpio - qcom,pm660l-gpio - qcom,pm6150-gpio -- cgit v1.2.3 From 1dd19cae155208065277f01dc61fe8897b6d2a29 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 9 Nov 2021 09:11:39 +0900 Subject: dt-bindings: pinctrl: uniphier: Add child node definitions to describe pin mux and configuration In arch/arm/boot/dts/uniphier-pinctrl.dtsi, there are child nodes of pinctrl that defines pinmux and pincfg, however, there are no rules about that in dt-bindings. 'make dtbs_check' results an error with the following message: pinctrl: 'ain1', 'ain2', 'ainiec1', 'aout', 'aout1', 'aout2', ... ... 'usb2', 'usb3' do not match any of the regexes: 'pinctrl-[0-9]+' To avoid the issue, add the rules of pinmux and pincfg in each child node and grandchild node. Signed-off-by: Kunihiko Hayashi Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/1636416699-21033-1-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by: Linus Walleij --- .../pinctrl/socionext,uniphier-pinctrl.yaml | 38 ++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml index a804d9bc1602..27c5762b9cf8 100644 --- a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml @@ -26,11 +26,45 @@ properties: - socionext,uniphier-pxs3-pinctrl - socionext,uniphier-nx1-pinctrl +additionalProperties: + type: object + + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + properties: + phandle: true + function: true + groups: true + pins: true + bias-pull-up: true + bias-pull-down: true + bias-pull-pin-default: true + drive-strength: true + + additionalProperties: + type: object + + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + properties: + phandle: true + function: true + groups: true + pins: true + bias-pull-up: true + bias-pull-down: true + bias-pull-pin-default: true + drive-strength: true + + unevaluatedProperties: false + required: - compatible -additionalProperties: false - examples: - | // The UniPhier pinctrl should be a subnode of a "syscon" compatible node. -- cgit v1.2.3 From deee705a1c9cce9c7eb699d529f1c0b3c80d339d Mon Sep 17 00:00:00 2001 From: Dominik Kobinski Date: Thu, 25 Nov 2021 22:56:26 +0100 Subject: dt-bindings: pinctrl: qcom: pmic-gpio: Document pm8226 compatible Suggested-by: Ivaylo Ivanov Signed-off-by: Dominik Kobinski Link: https://lore.kernel.org/r/20211125215626.62447-1-dominikkobinski314@gmail.com Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml index 3e02b695b0c3..9400b665a46f 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml @@ -32,6 +32,7 @@ properties: - qcom,pm8058-gpio - qcom,pm8150-gpio - qcom,pm8150b-gpio + - qcom,pm8226-gpio - qcom,pm8350-gpio - qcom,pm8350b-gpio - qcom,pm8350c-gpio -- cgit v1.2.3 From 72f902d8b1870dd0c7824f0e7ce2915d564ca802 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Sat, 27 Nov 2021 01:06:34 +0100 Subject: Revert "dt-bindings: pinctrl: qcom: Add SDX65 pinctrl bindings" This reverts commit 3fe59cc4ff641b106cc24930204d4cd2c82f318f. The bindings were not properly reviewed and were also causing errors in the automatic checkers once applied. Signed-off-by: Linus Walleij --- .../bindings/pinctrl/qcom,sdx65-pinctrl.yaml | 195 --------------------- 1 file changed, 195 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml deleted file mode 100644 index 58dd34f4fcb5..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml +++ /dev/null @@ -1,195 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/pinctrl/qcom,sdx65-pinctrl.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Qualcomm Technologies, Inc. SDX65 TLMM block - -maintainers: - - Vamsi krishna Lanka - -description: - This binding describes the Top Level Mode Multiplexer block found in the - SDX65 platform. - -properties: - compatible: - const: qcom,sdx65-tlmm - - reg: - description: Specifies the base address and size of the TLMM register space - maxItems: 1 - - interrupts: - description: Specifies the TLMM summary IRQ - maxItems: 1 - - interrupt-controller: true - - '#interrupt-cells': - description: Specifies the PIN numbers and Flags, as defined in - include/dt-bindings/interrupt-controller/irq.h - const: 2 - - gpio-controller: true - - '#gpio-cells': - description: Specifying the pin number and flags, as defined in - include/dt-bindings/gpio/gpio.h - const: 2 - - gpio-ranges: - maxItems: 1 - - gpio-reserved-ranges: - maxItems: 1 - -#PIN CONFIGURATION NODES -patternProperties: - '$-state': - oneOf: - - $ref: "#/$defs/qcom-sdx65-tlmm-state" - - patternProperties: - ".*": - $ref: "#/$defs/qcom-sdx65-tlmm-state" -'$defs': - qcom-sdx65-tlmm-state: - type: object - description: - Pinctrl node's client devices use subnodes for desired pin configuration. - Client device subnodes use below standard properties. - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" - - properties: - pins: - description: - List of gpio pins affected by the properties specified in this subnode. - items: - oneOf: - - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9])$" - - enum: [ ufs_reset, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data, sdc1_rclk ] - minItems: 1 - maxItems: 150 - - function: - description: - Specify the alternative function to be configured for the specified - pins. Functions are only valid for gpio pins. - enum: [ blsp_uart1, blsp_spi1, blsp_i2c1, blsp_uim1, atest_tsens, - bimc_dte1, dac_calib0, blsp_spi8, blsp_uart8, blsp_uim8, - qdss_cti_trig_out_b, bimc_dte0, dac_calib1, qdss_cti_trig_in_b, - dac_calib2, atest_tsens2, atest_usb1, blsp_spi10, blsp_uart10, - blsp_uim10, atest_bbrx1, atest_usb13, atest_bbrx0, atest_usb12, - mdp_vsync, edp_lcd, blsp_i2c10, atest_gpsadc1, atest_usb11, - atest_gpsadc0, edp_hot, atest_usb10, m_voc, dac_gpio, atest_char, - cam_mclk, pll_bypassnl, qdss_stm7, blsp_i2c8, qdss_tracedata_b, - pll_reset, qdss_stm6, qdss_stm5, qdss_stm4, atest_usb2, cci_i2c, - qdss_stm3, dac_calib3, atest_usb23, atest_char3, dac_calib4, - qdss_stm2, atest_usb22, atest_char2, qdss_stm1, dac_calib5, - atest_usb21, atest_char1, dbg_out, qdss_stm0, dac_calib6, - atest_usb20, atest_char0, dac_calib10, qdss_stm10, - qdss_cti_trig_in_a, cci_timer4, blsp_spi6, blsp_uart6, blsp_uim6, - blsp2_spi, qdss_stm9, qdss_cti_trig_out_a, dac_calib11, - qdss_stm8, cci_timer0, qdss_stm13, dac_calib7, cci_timer1, - qdss_stm12, dac_calib8, cci_timer2, blsp1_spi, qdss_stm11, - dac_calib9, cci_timer3, cci_async, dac_calib12, blsp_i2c6, - qdss_tracectl_a, dac_calib13, qdss_traceclk_a, dac_calib14, - dac_calib15, hdmi_rcv, dac_calib16, hdmi_cec, pwr_modem, - dac_calib17, hdmi_ddc, pwr_nav, dac_calib18, pwr_crypto, - dac_calib19, hdmi_hot, dac_calib20, dac_calib21, pci_e0, - dac_calib22, dac_calib23, dac_calib24, tsif1_sync, dac_calib25, - sd_write, tsif1_error, blsp_spi2, blsp_uart2, blsp_uim2, - qdss_cti, blsp_i2c2, blsp_spi3, blsp_uart3, blsp_uim3, blsp_i2c3, - uim3, blsp_spi9, blsp_uart9, blsp_uim9, blsp10_spi, blsp_i2c9, - blsp_spi7, blsp_uart7, blsp_uim7, qdss_tracedata_a, blsp_i2c7, - qua_mi2s, gcc_gp1_clk_a, ssc_irq, uim4, blsp_spi11, blsp_uart11, - blsp_uim11, gcc_gp2_clk_a, gcc_gp3_clk_a, blsp_i2c11, cri_trng0, - cri_trng1, cri_trng, qdss_stm18, pri_mi2s, qdss_stm17, blsp_spi4, - blsp_uart4, blsp_uim4, qdss_stm16, qdss_stm15, blsp_i2c4, - qdss_stm14, dac_calib26, spkr_i2s, audio_ref, lpass_slimbus, - isense_dbg, tsense_pwm1, tsense_pwm2, btfm_slimbus, ter_mi2s, - qdss_stm22, qdss_stm21, qdss_stm20, qdss_stm19, gcc_gp1_clk_b, - sec_mi2s, blsp_spi5, blsp_uart5, blsp_uim5, gcc_gp2_clk_b, - gcc_gp3_clk_b, blsp_i2c5, blsp_spi12, blsp_uart12, blsp_uim12, - qdss_stm25, qdss_stm31, blsp_i2c12, qdss_stm30, qdss_stm29, - tsif1_clk, qdss_stm28, tsif1_en, tsif1_data, sdc4_cmd, qdss_stm27, - qdss_traceclk_b, tsif2_error, sdc43, vfr_1, qdss_stm26, tsif2_clk, - sdc4_clk, qdss_stm24, tsif2_en, sdc42, qdss_stm23, qdss_tracectl_b, - sd_card, tsif2_data, sdc41, tsif2_sync, sdc40, mdp_vsync_p_b, - ldo_en, mdp_vsync_s_b, ldo_update, blsp11_uart_tx_b, blsp11_uart_rx_b, - blsp11_i2c_sda_b, prng_rosc, blsp11_i2c_scl_b, uim2, uim1, uim_batt, - pci_e2, pa_indicator, adsp_ext, ddr_bist, qdss_tracedata_11, - qdss_tracedata_12, modem_tsync, nav_dr, nav_pps, pci_e1, gsm_tx, - qspi_cs, ssbi2, ssbi1, mss_lte, qspi_clk, qspi0, qspi1, qspi2, qspi3, - gpio ] - - drive-strength: - enum: [2, 4, 6, 8, 10, 12, 14, 16] - default: 2 - description: - Selects the drive strength for the specified pins, in mA. - - bias-pull-down: true - - bias-pull-up: true - - bias-disable: true - - output-high: true - - output-low: true - - required: - - pins - - function - - additionalProperties: false - -required: - - compatible - - reg - - interrupts - - interrupt-controller - - '#interrupt-cells' - - gpio-controller - - '#gpio-cells' - - gpio-ranges - -additionalProperties: false - -examples: - - | - #include - tlmm: pinctrl@f100000 { - compatible = "qcom,sdx65-tlmm"; - reg = <0x03000000 0xdc2000>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&tlmm 0 0 109>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = ; - - serial-pins { - pins = "gpio8", "gpio9"; - function = "blsp_uart3"; - drive-strength = <2>; - bias-disable; - }; - - uart-w-subnodes-state { - rx { - pins = "gpio4"; - function = "blsp_uart1"; - bias-pull-up; - }; - - tx { - pins = "gpio5"; - function = "blsp_uart1"; - bias-disable; - }; - }; - }; -... -- cgit v1.2.3 From 96028326dfb9a660f65526c514b7bffc34c1adb3 Mon Sep 17 00:00:00 2001 From: Jesse Taube Date: Thu, 25 Nov 2021 16:14:32 -0500 Subject: dt-bindings: pinctrl: add i.MXRT1050 pinctrl binding doc Add i.MXRT1050 pinctrl binding doc Cc: Giulio Benetti Signed-off-by: Jesse Taube Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20211125211443.1150135-3-Mr.Bossman075@gmail.com Signed-off-by: Linus Walleij --- .../devicetree/bindings/pinctrl/fsl,imxrt1050.yaml | 79 ++++++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.yaml new file mode 100644 index 000000000000..1278f7293560 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/fsl,imxrt1050.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale IMXRT1050 IOMUX Controller + +maintainers: + - Giulio Benetti + - Jesse Taube + +description: + Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory + for common binding part and usage. + +properties: + compatible: + const: fsl,imxrt1050-iomuxc + + reg: + maxItems: 1 + +# Client device subnode's properties +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + fsl,pins: + description: + each entry consists of 6 integers and represents the mux and config + setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, which can + be found in . The last + integer CONFIG is the pad setting value like pull-up on this pin. Please + refer to i.MXRT1050 Reference Manual for detailed CONFIG settings. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: | + "mux_reg" indicates the offset of mux register. + - description: | + "conf_reg" indicates the offset of pad configuration register. + - description: | + "input_reg" indicates the offset of select input register. + - description: | + "mux_val" indicates the mux value to be applied. + - description: | + "input_val" indicates the select input value to be applied. + - description: | + "pad_setting" indicates the pad configuration value to be applied. + + required: + - fsl,pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + iomuxc: iomuxc@401f8000 { + compatible = "fsl,imxrt1050-iomuxc"; + reg = <0x401f8000 0x4000>; + + pinctrl_lpuart1: lpuart1grp { + fsl,pins = + <0x0EC 0x2DC 0x000 0x2 0x0 0xf1>, + <0x0F0 0x2E0 0x000 0x2 0x0 0xf1>; + }; + }; -- cgit v1.2.3 From 896568e5b9c8a170912ff83760dca51703e276f1 Mon Sep 17 00:00:00 2001 From: Rafał Miłecki Date: Wed, 10 Nov 2021 17:57:19 +0100 Subject: dt-bindings: pinctrl: convert controller description to the json-schema MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This helps validating DTS and writing YAML files. Signed-off-by: Rafał Miłecki Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20211110165720.30242-1-zajec5@gmail.com Signed-off-by: Linus Walleij --- .../bindings/pinctrl/pinctrl-bindings.txt | 41 +------------------- .../devicetree/bindings/pinctrl/pinctrl.yaml | 45 ++++++++++++++++++++++ 2 files changed, 46 insertions(+), 40 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt index 9dae60acf950..6904072d3944 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt @@ -97,47 +97,8 @@ For example: }; == Pin controller devices == -Required properties: See the pin controller driver specific documentation -Optional properties: -#pinctrl-cells: Number of pin control cells in addition to the index within the - pin controller device instance - -pinctrl-use-default: Boolean. Indicates that the OS can use the boot default - pin configuration. This allows using an OS that does not have a - driver for the pin controller. This property can be set either - globally for the pin controller or in child nodes for individual - pin group control. - -Pin controller devices should contain the pin configuration nodes that client -devices reference. - -For example: - - pincontroller { - ... /* Standard DT properties for the device itself elided */ - - state_0_node_a { - ... - }; - state_1_node_a { - ... - }; - state_1_node_b { - ... - }; - } - -The contents of each of those pin configuration child nodes is defined -entirely by the binding for the individual pin controller device. There -exists no common standard for this content. The pinctrl framework only -provides generic helper bindings that the pin controller driver can use. - -The pin configuration nodes need not be direct children of the pin controller -device; they may be grandchildren, for example. Whether this is legal, and -whether there is any interaction between the child and intermediate parent -nodes, is again defined entirely by the binding for the individual pin -controller device. +See pinctrl.yaml == Generic pin multiplexing node content == diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl.yaml new file mode 100644 index 000000000000..d471563119a9 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Pin controller device + +maintainers: + - Linus Walleij + - Rafał Miłecki + +description: | + Pin controller devices should contain the pin configuration nodes that client + devices reference. + + The contents of each of those pin configuration child nodes is defined + entirely by the binding for the individual pin controller device. There + exists no common standard for this content. The pinctrl framework only + provides generic helper bindings that the pin controller driver can use. + + The pin configuration nodes need not be direct children of the pin controller + device; they may be grandchildren, for example. Whether this is legal, and + whether there is any interaction between the child and intermediate parent + nodes, is again defined entirely by the binding for the individual pin + controller device. + +properties: + $nodename: + pattern: "^(pinctrl|pinmux)(@[0-9a-f]+)?$" + + "#pinctrl-cells": + description: > + Number of pin control cells in addition to the index within the pin + controller device instance. + + pinctrl-use-default: + type: boolean + description: > + Indicates that the OS can use the boot default pin configuration. This + allows using an OS that does not have a driver for the pin controller. + This property can be set either globally for the pin controller or in + child nodes for individual pin group control. + +additionalProperties: true -- cgit v1.2.3 From c09acbc499e883a31e44d7ead3441c495b17df33 Mon Sep 17 00:00:00 2001 From: Rafał Miłecki Date: Thu, 2 Dec 2021 07:32:16 +0100 Subject: dt-bindings: pinctrl: use pinctrl.yaml MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Also fix some examples to avoid warnings like: brcm,ns-pinmux.example.dt.yaml: pin-controller@1800c1c0: $nodename:0: 'pin-controller@1800c1c0' does not match '^pinctrl|pinmux@[0-9a-f]+$' Signed-off-by: Rafał Miłecki Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20211202063216.24439-1-zajec5@gmail.com Signed-off-by: Linus Walleij --- .../devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 1 + Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml | 3 +++ Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml | 3 ++- Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml | 7 +++++-- Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml | 3 +++ Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml | 3 +++ Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml | 3 +++ Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.yaml | 3 +++ Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml | 3 +++ Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/fsl,imx8ulp-pinctrl.yaml | 3 +++ Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml | 8 ++++---- Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml | 3 +++ .../devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/mediatek,mt6797-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml | 3 +++ Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml | 3 +++ Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml | 3 +++ .../devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml | 1 + .../devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/qcom,qcm2290-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml | 1 + Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml | 1 + .../devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml | 1 + .../devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml | 1 + Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml | 3 +++ .../devicetree/bindings/pinctrl/ralink,rt2880-pinmux.yaml | 3 +++ Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml | 3 +++ Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml | 3 +++ .../devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml | 3 +++ Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml | 6 +++--- Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml | 5 ++++- Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml | 3 +++ .../devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 3 +++ 58 files changed, 165 insertions(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml index 3f94f6944740..fb0f69ce9c16 100644 --- a/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml @@ -184,6 +184,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml index cce63c3cc463..bfce850c2035 100644 --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml @@ -147,6 +147,7 @@ allOf: # boards are defining it at the moment so it would generate a lot of # warnings. + - $ref: "pinctrl.yaml#" - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml index 07b00de79755..61fc05840eb3 100644 --- a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml @@ -67,6 +67,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml index 100bb6dea3ec..c689bea7ce6e 100644 --- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml @@ -50,6 +50,9 @@ patternProperties: TXD3, TXD4, UART6, USB11D1, USB11H2, USB2D1, USB2H1, USBCKI, VGABIOS_ROM, VGAHS, VGAVS, VPI18, VPI24, VPI30, VPO12, VPO24, WDTRST1, WDTRST2] +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml index 904697bc9415..d316cc082107 100644 --- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml @@ -62,6 +62,9 @@ patternProperties: USB11BHID, USB2AD, USB2AH, USB2BD, USB2BH, USBCKI, VGABIOSROM, VGAHS, VGAVS, VPI24, VPO, WDTRST1, WDTRST2] +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - aspeed,external-nodes diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml index ad2866c99738..57b68d6c7c70 100644 --- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml @@ -83,6 +83,9 @@ patternProperties: UART7, UART8, UART9, USBA, USBB, VB, VGAHS, VGAVS, WDTRST1, WDTRST2, WDTRST3, WDTRST4] +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml index 08995a4f854b..ab019a1998e8 100644 --- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml @@ -37,6 +37,9 @@ patternProperties: enum: [ gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7, gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, gpio40 ] +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml index 58ffed44b3c4..8c9d4668c8c4 100644 --- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml @@ -41,6 +41,9 @@ patternProperties: vdsl_phy_override_1_grp, vdsl_phy_override_2_grp, vdsl_phy_override_3_grp, dsl_gpio8, dsl_gpio9 ] +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml index 0fd24f40afb1..a8e22ec02215 100644 --- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml @@ -36,6 +36,9 @@ patternProperties: gpio20, gpio25, gpio26, gpio27, gpio28, hsspi_cs1, usb_port1 ] +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml index 0c3ce256aa78..35867355a47a 100644 --- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml @@ -34,6 +34,9 @@ patternProperties: enum: [ ebi_cs_grp, uart1_grp, serial_led_grp, legacy_led_grp, led_grp, spi_cs_grp, utopia_grp, pwm_syn_clk, sys_irq_grp ] +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml index 6f68fee373bd..b584d4b27223 100644 --- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml @@ -41,6 +41,9 @@ patternProperties: gpio15, gpio16, gpio17, gpio18, gpio19, gpio20, gpio21, gpio22, gpio23, gpio24, gpio25, gpio26, gpio27, nand_grp ] +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml index f4168b9f4460..229323d9237d 100644 --- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml @@ -42,6 +42,9 @@ patternProperties: gpio24, gpio25, gpio26, gpio27, gpio28, gpio29, gpio30, gpio31, uart1_grp ] +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml index fc39e3e9f71c..8d1e5b1cdd5f 100644 --- a/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml +++ b/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml @@ -53,6 +53,7 @@ patternProperties: additionalProperties: false allOf: + - $ref: "pinctrl.yaml#" - if: properties: compatible: @@ -77,7 +78,7 @@ additionalProperties: false examples: - | - pin-controller@1800c1c0 { + pinctrl@1800c1c0 { compatible = "brcm,bcm4708-pinmux"; reg = <0x1800c1c0 0x24>; reg-names = "cru_gpio_control"; diff --git a/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml b/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml index 46fbc73ab26b..a44691d9c57d 100644 --- a/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml +++ b/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml @@ -137,6 +137,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg @@ -151,9 +154,9 @@ examples: #include #include - fpioa: pinmux@502B0000 { + fpioa: pinmux@502b0000 { compatible = "canaan,k210-fpioa"; - reg = <0x502B0000 0x100>; + reg = <0x502b0000 0x100>; clocks = <&sysclk K210_CLK_FPIOA>, <&sysclk K210_CLK_APB0>; clock-names = "ref", "pclk"; diff --git a/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml b/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml index a07dd197176a..80020539c3bb 100644 --- a/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml +++ b/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml @@ -181,6 +181,9 @@ properties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - gpio-controller diff --git a/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml b/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml index 4cb174bf31ff..e50d7ad5c229 100644 --- a/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml +++ b/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml @@ -117,6 +117,9 @@ properties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - pinctrl-0 - pinctrl-names diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml index 6d7d162e6171..6717f163390b 100644 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml @@ -58,6 +58,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.yaml index 7131cfd1fc45..b1cdbb56d4e4 100644 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.yaml @@ -58,6 +58,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml index d474bc1f393b..4eed3a4e153a 100644 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml @@ -58,6 +58,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml index 0af2b6c95c17..d4a8ea5551a5 100644 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml @@ -58,6 +58,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8ulp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8ulp-pinctrl.yaml index 86622c4f374b..693398d88223 100644 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8ulp-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8ulp-pinctrl.yaml @@ -56,6 +56,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml index a12d0ceb7637..c2c370448b81 100644 --- a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml @@ -28,9 +28,6 @@ maintainers: - Paul Cercueil properties: - nodename: - pattern: "^pinctrl@[0-9a-f]+$" - compatible: oneOf: - enum: @@ -121,6 +118,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg @@ -169,7 +169,7 @@ additionalProperties: examples: - | - pin-controller@10010000 { + pinctrl@10010000 { compatible = "ingenic,jz4770-pinctrl"; reg = <0x10010000 0x600>; diff --git a/Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml b/Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml index 2c0acb405e6c..b42548350188 100644 --- a/Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml +++ b/Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml @@ -47,6 +47,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml index f8e6e138dc13..6953c958ff7c 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml @@ -64,6 +64,9 @@ required: - gpio-controller - "#gpio-cells" +allOf: + - $ref: "pinctrl.yaml#" + patternProperties: '-[0-9]+$': type: object diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml index 152c151c27ad..e7601c0f5a69 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml @@ -59,6 +59,9 @@ properties: "#interrupt-cells": const: 2 +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6797-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6797-pinctrl.yaml index 76a6df75ed9c..d42215f59afd 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6797-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6797-pinctrl.yaml @@ -45,6 +45,9 @@ properties: "#interrupt-cells": const: 2 +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml index 0feecd376c69..78a0175cecc7 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml @@ -42,6 +42,9 @@ properties: "#interrupt-cells": const: 2 +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml index 7602b11e8bce..4eadea55df10 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml @@ -56,6 +56,9 @@ properties: "#interrupt-cells": const: 2 +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml index cc1509e9b981..2d13a57b8961 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml @@ -56,6 +56,9 @@ properties: "#interrupt-cells": const: 2 +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml index c4c071211611..3c84676a167d 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml @@ -108,6 +108,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml index 5e2bb2bf3a55..3cf74df12862 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml @@ -187,6 +187,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml index c64c93206817..b83c7f476e19 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml @@ -118,6 +118,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml index e47ebf934daf..5c5542f1627c 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml @@ -103,6 +103,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml index 3b02dc6626ed..f7bd4be1739e 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml @@ -14,6 +14,7 @@ description: | MDM9607 platform. allOf: + - $ref: "pinctrl.yaml#" - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# properties: diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml index 040d2ada3669..ab4a2b4cfda2 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml @@ -97,6 +97,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml index abe9f4c9b1e3..64c0a41ca0c3 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml @@ -133,6 +133,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-pinctrl.yaml index 13f338619d77..206f4f238736 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-pinctrl.yaml @@ -118,6 +118,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml index 7d6a2ab10eec..6c7c3f6a140e 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml @@ -123,6 +123,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml index a82dab898395..86509172603d 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml @@ -14,6 +14,7 @@ description: | SC8180X platform. allOf: + - $ref: "pinctrl.yaml#" - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# properties: diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml index 112dd59ce7ed..a38090b14aab 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml @@ -118,6 +118,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml index 8fc06f6a3ef4..cfcde405d30a 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml @@ -121,6 +121,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml index 5f7adaa81f83..c8eec845ade9 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml @@ -13,6 +13,7 @@ description: | in the SM6125 platform. allOf: + - $ref: "pinctrl.yaml#" - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# properties: diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml index 554992a681f3..898608671c4b 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml @@ -14,6 +14,7 @@ description: | in the SM6350 platform. allOf: + - $ref: "pinctrl.yaml#" - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# properties: diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml index 8508c57522fd..cfa2c50fdb93 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml @@ -115,6 +115,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml index 4f2667ea2805..6b7789db2f75 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml @@ -14,6 +14,7 @@ description: | in the SM8350 platform. allOf: + - $ref: "pinctrl.yaml#" - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# properties: diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml index 3b37cf102d41..be8cb0ead62f 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml @@ -51,6 +51,9 @@ properties: should not be accessed by the OS. Please see the ../gpio/gpio.txt for more information. +allOf: + - $ref: "pinctrl.yaml#" + required: - interrupts - interrupt-controller diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinmux.yaml index b32f2676cab5..f0c52feb24d7 100644 --- a/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinmux.yaml +++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinmux.yaml @@ -44,6 +44,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml index ac4e068aa03f..8548e3639b75 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml @@ -70,6 +70,9 @@ properties: power-domains: maxItems: 1 +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml index 7f80578dc229..8ed4b98a1628 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml @@ -31,6 +31,9 @@ properties: reg: maxItems: 1 +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml index ce1f7343788f..d761fddc2206 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml @@ -72,6 +72,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml index ef68dabcf4dc..302785d7d771 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml @@ -90,6 +90,9 @@ additionalProperties: additionalProperties: $ref: "#/additionalProperties/anyOf/0" +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml index 4a43af0d6e02..70b1788ab594 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml @@ -31,6 +31,9 @@ properties: description: The bus clock, sometimes described as pclk, for register accesses. +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml index 07c0a98ef9c6..b0eae3a67ab1 100644 --- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml @@ -67,6 +67,9 @@ properties: ranges: true +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - rockchip,grf diff --git a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml index 27c5762b9cf8..14a8c0215cc6 100644 --- a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml @@ -10,9 +10,6 @@ maintainers: - Masahiro Yamada properties: - $nodename: - pattern: "pinctrl" - compatible: enum: - socionext,uniphier-ld4-pinctrl @@ -62,6 +59,9 @@ additionalProperties: unevaluatedProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml index ac88e01ec430..83a18d0331b1 100644 --- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml @@ -183,6 +183,9 @@ patternProperties: required: - pinmux +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - '#address-cells' diff --git a/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml index 9f1dab0c2430..306524885a2b 100644 --- a/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml @@ -20,6 +20,9 @@ properties: reg: maxItems: 1 +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg @@ -80,7 +83,7 @@ examples: #address-cells = <2>; #size-cells = <2>; - pmux: pmux@24190000 { + pmux: pinmux@24190000 { compatible = "toshiba,tmpv7708-pinctrl"; reg = <0 0x24190000 0 0x10000>; diff --git a/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml index ac97dbf6998e..cfd0cc549a7b 100644 --- a/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml @@ -167,6 +167,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: "pinctrl.yaml#" + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml index 8ef0d07d35fe..2722dc7bb03d 100644 --- a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml @@ -290,6 +290,9 @@ patternProperties: additionalProperties: false +allOf: + - $ref: pinctrl.yaml# + required: - compatible -- cgit v1.2.3 From 82dc44e7c650618c4fe26dbfe290372f4904bbe2 Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Wed, 1 Dec 2021 12:54:33 +0530 Subject: dt-bindings: pinctrl: qcom: Add SM8450 pinctrl bindings Add device tree binding Documentation details for Qualcomm SM8450 TLMM device Signed-off-by: Vinod Koul Reviewed-by: Bjorn Andersson Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20211201072434.3968768-2-vkoul@kernel.org Signed-off-by: Linus Walleij --- .../bindings/pinctrl/qcom,sm8450-pinctrl.yaml | 143 +++++++++++++++++++++ 1 file changed, 143 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml new file mode 100644 index 000000000000..9c891246245b --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml @@ -0,0 +1,143 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. SM8450 TLMM block + +maintainers: + - Vinod Koul + +description: | + This binding describes the Top Level Mode Multiplexer (TLMM) block found + in the SM8450 platform. + +allOf: + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# + +properties: + compatible: + const: qcom,sm8450-tlmm + + reg: + maxItems: 1 + + interrupts: true + interrupt-controller: true + '#interrupt-cells': true + gpio-controller: true + gpio-reserved-ranges: true + '#gpio-cells': true + gpio-ranges: true + wakeup-parent: true + +required: + - compatible + - reg + +additionalProperties: false + +patternProperties: + '-state$': + oneOf: + - $ref: "#/$defs/qcom-sm8450-tlmm-state" + - patternProperties: + ".*": + $ref: "#/$defs/qcom-sm8450-tlmm-state" + +$defs: + qcom-sm8450-tlmm-state: + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + oneOf: + - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])$" + - enum: [ ufs_reset, sdc2_clk, sdc2_cmd, sdc2_data ] + minItems: 1 + maxItems: 36 + + function: + description: + Specify the alternative function to be configured for the specified + pins. + enum: [ aon_cam, atest_char, atest_usb, audio_ref, cam_mclk, cci_async, + cci_i2c, cci_timer, cmu_rng, coex_uart1, coex_uart2, cri_trng, + cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1, + ddr_pxi2, ddr_pxi3, dp_hot, gcc_gp1, gcc_gp2, gcc_gp3, + gpio, ibi_i3c, jitter_bist, mdp_vsync, mdp_vsync0, mdp_vsync1, + mdp_vsync2, mdp_vsync3, mi2s0_data0, mi2s0_data1, mi2s0_sck, + mi2s0_ws, mi2s2_data0, mi2s2_data1, mi2s2_sck, mi2s2_ws, + mss_grfc0, mss_grfc1, mss_grfc10, mss_grfc11, mss_grfc12, + mss_grfc2, mss_grfc3, mss_grfc4, mss_grfc5, mss_grfc6, + mss_grfc7, mss_grfc8, mss_grfc9, nav, pcie0_clkreqn, + pcie1_clkreqn, phase_flag, pll_bist, pll_clk, pri_mi2s, + prng_rosc, qdss_cti, qdss_gpio, qlink0_enable, qlink0_request, + qlink0_wmss, qlink1_enable, qlink1_request, qlink1_wmss, + qlink2_enable, qlink2_request, qlink2_wmss, qspi0, qspi1, + qspi2, qspi3, qspi_clk, qspi_cs, qup0, qup1, qup10, qup11, + qup12, qup13, qup14, qup15, qup16, qup17, qup18, qup19, qup2, + qup20, qup21, qup3, qup4, qup5, qup6, qup7, qup8, qup9, qup_l4, + qup_l5, qup_l6, sd_write, sdc40, sdc41, sdc42, sdc43, sdc4_clk, + sdc4_cmd, sec_mi2s, tb_trig, tgu_ch0, tgu_ch1, tgu_ch2, + tgu_ch3, tmess_prng0, tmess_prng1, tmess_prng2, tmess_prng3, + tsense_pwm1, tsense_pwm2, uim0_clk, uim0_data, uim0_present, + uim0_reset, uim1_clk, uim1_data, uim1_present, uim1_reset, + usb2phy_ac, usb_phy, vfr_0, vfr_1, vsense_trigger ] + + bias-disable: true + bias-pull-down: true + bias-pull-up: true + drive-strength: true + input-enable: true + output-high: true + output-low: true + + required: + - pins + - function + + additionalProperties: false + +examples: + - | + #include + pinctrl@f100000 { + compatible = "qcom,sm8450-tlmm"; + reg = <0x0f100000 0x300000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&tlmm 0 0 211>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + + gpio-wo-subnode-state { + pins = "gpio1"; + function = "gpio"; + }; + + uart-w-subnodes-state { + rx { + pins = "gpio26"; + function = "qup7"; + bias-pull-up; + }; + + tx { + pins = "gpio27"; + function = "qup7"; + bias-disable; + }; + }; + }; +... -- cgit v1.2.3 From bd92baaa262dc1342f1514a3937f151d37ee740d Mon Sep 17 00:00:00 2001 From: Lakshmi Sowjanya D Date: Wed, 1 Dec 2021 12:56:25 +0530 Subject: dt-bindings: pinctrl: Add bindings for Intel Thunderbay pinctrl driver Add Device Tree bindings documentation and an entry in MAINTAINERS file for Intel Thunder Bay SoC's pin controller. Signed-off-by: Lakshmi Sowjanya D Link: https://lore.kernel.org/r/20211201072626.19599-2-lakshmi.sowjanya.d@intel.com Signed-off-by: Linus Walleij --- .../bindings/pinctrl/intel,pinctrl-thunderbay.yaml | 119 +++++++++++++++++++++ MAINTAINERS | 5 + 2 files changed, 124 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml b/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml new file mode 100644 index 000000000000..0ec476248f21 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml @@ -0,0 +1,119 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/intel,pinctrl-thunderbay.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel Thunder Bay pin controller Device Tree Bindings + +maintainers: + - Lakshmi Sowjanya D + +description: | + Intel Thunder Bay SoC integrates a pin controller which enables control + of pin directions, input/output values and configuration + for a total of 67 pins. + +properties: + compatible: + const: intel,thunderbay-pinctrl + + reg: + maxItems: 1 + + gpio-controller: true + + '#gpio-cells': + const: 2 + + gpio-ranges: + maxItems: 1 + + interrupts: + description: + Specifies the interrupt lines to be used by the controller. + maxItems: 2 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + +patternProperties: + '^gpio@[0-9a-f]*$': + type: object + + description: + Child nodes can be specified to contain pin configuration information, + which can then be utilized by pinctrl client devices. + The following properties are supported. + + properties: + pins: + description: | + The name(s) of the pins to be configured in the child node. + Supported pin names are "GPIO0" up to "GPIO66". + + bias-disable: true + + bias-pull-down: true + + bias-pull-up: true + + drive-strength: + description: Drive strength for the pad. + enum: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] + + bias-bus-hold: + type: boolean + + input-schmitt-enable: + type: boolean + + slew-rate: + description: GPIO slew rate control. + 0 - Slow + 1 - Fast + enum: [0, 1] + +additionalProperties: false + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + - gpio-ranges + - interrupts + - interrupt-controller + - '#interrupt-cells' + +examples: + - | + #include + #include + // Example 1 + pinctrl0: gpio@0 { + compatible = "intel,thunderbay-pinctrl"; + reg = <0x600b0000 0x88>; + gpio-controller; + #gpio-cells = <0x2>; + gpio-ranges = <&pinctrl0 0 0 67>; + interrupts = , + ; + interrupt-controller; + #interrupt-cells = <2>; + }; + + // Example 2 + pinctrl1: gpio@1 { + compatible = "intel,thunderbay-pinctrl"; + reg = <0x600c0000 0x88>; + gpio-controller; + #gpio-cells = <0x2>; + gpio-ranges = <&pinctrl1 0 0 53>; + interrupts = , + ; + interrupt-controller; + #interrupt-cells = <2>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 5250298d2817..7741bcc23502 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15117,6 +15117,11 @@ L: linux-omap@vger.kernel.org S: Maintained F: drivers/pinctrl/pinctrl-single.c +PIN CONTROLLER - THUNDERBAY +M: Lakshmi Sowjanya D +S: Supported +F: drivers/pinctrl/pinctrl-thunderbay.c + PKTCDVD DRIVER M: linux-block@vger.kernel.org S: Orphan -- cgit v1.2.3 From 744d04fb4836cc1778cbe853fcac503794ba6fdf Mon Sep 17 00:00:00 2001 From: Vamsi Krishna Lanka Date: Thu, 16 Dec 2021 15:18:45 -0800 Subject: dt-bindings: pinctrl: qcom: Add SDX65 pinctrl bindings Add device tree binding Documentation details for Qualcomm SDX65 pinctrl driver. Signed-off-by: Vamsi Krishna Lanka Reviewed-by: Bjorn Andersson Link: https://lore.kernel.org/r/ff9abf953c274a1e34f59114642f67ecf02acb6f.1639696427.git.quic_vamslank@quicinc.com Signed-off-by: Linus Walleij --- .../bindings/pinctrl/qcom,sdx65-pinctrl.yaml | 191 +++++++++++++++++++++ 1 file changed, 191 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml new file mode 100644 index 000000000000..cdfcf29dffee --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml @@ -0,0 +1,191 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,sdx65-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. SDX65 TLMM block + +maintainers: + - Vamsi krishna Lanka + +description: + This binding describes the Top Level Mode Multiplexer block found in the + SDX65 platform. + +properties: + compatible: + const: qcom,sdx65-tlmm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + description: Specifies the PIN numbers and Flags, as defined in + include/dt-bindings/interrupt-controller/irq.h + const: 2 + + gpio-controller: true + + '#gpio-cells': + description: Specifying the pin number and flags, as defined in + include/dt-bindings/gpio/gpio.h + const: 2 + + gpio-ranges: + maxItems: 1 + + gpio-reserved-ranges: + maxItems: 1 + +#PIN CONFIGURATION NODES +patternProperties: + '-state$': + oneOf: + - $ref: "#/$defs/qcom-sdx65-tlmm-state" + - patternProperties: + ".*": + $ref: "#/$defs/qcom-sdx65-tlmm-state" +'$defs': + qcom-sdx65-tlmm-state: + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this subnode. + items: + oneOf: + - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-7])$" + - enum: [ ufs_reset, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data, sdc1_rclk ] + minItems: 1 + maxItems: 150 + + function: + description: + Specify the alternative function to be configured for the specified + pins. Functions are only valid for gpio pins. + enum: [ blsp_uart1, blsp_spi1, blsp_i2c1, blsp_uim1, atest_tsens, + bimc_dte1, dac_calib0, blsp_spi8, blsp_uart8, blsp_uim8, + qdss_cti_trig_out_b, bimc_dte0, dac_calib1, qdss_cti_trig_in_b, + dac_calib2, atest_tsens2, atest_usb1, blsp_spi10, blsp_uart10, + blsp_uim10, atest_bbrx1, atest_usb13, atest_bbrx0, atest_usb12, + mdp_vsync, edp_lcd, blsp_i2c10, atest_gpsadc1, atest_usb11, + atest_gpsadc0, edp_hot, atest_usb10, m_voc, dac_gpio, atest_char, + cam_mclk, pll_bypassnl, qdss_stm7, blsp_i2c8, qdss_tracedata_b, + pll_reset, qdss_stm6, qdss_stm5, qdss_stm4, atest_usb2, cci_i2c, + qdss_stm3, dac_calib3, atest_usb23, atest_char3, dac_calib4, + qdss_stm2, atest_usb22, atest_char2, qdss_stm1, dac_calib5, + atest_usb21, atest_char1, dbg_out, qdss_stm0, dac_calib6, + atest_usb20, atest_char0, dac_calib10, qdss_stm10, + qdss_cti_trig_in_a, cci_timer4, blsp_spi6, blsp_uart6, blsp_uim6, + blsp2_spi, qdss_stm9, qdss_cti_trig_out_a, dac_calib11, + qdss_stm8, cci_timer0, qdss_stm13, dac_calib7, cci_timer1, + qdss_stm12, dac_calib8, cci_timer2, blsp1_spi, qdss_stm11, + dac_calib9, cci_timer3, cci_async, dac_calib12, blsp_i2c6, + qdss_tracectl_a, dac_calib13, qdss_traceclk_a, dac_calib14, + dac_calib15, hdmi_rcv, dac_calib16, hdmi_cec, pwr_modem, + dac_calib17, hdmi_ddc, pwr_nav, dac_calib18, pwr_crypto, + dac_calib19, hdmi_hot, dac_calib20, dac_calib21, pci_e0, + dac_calib22, dac_calib23, dac_calib24, tsif1_sync, dac_calib25, + sd_write, tsif1_error, blsp_spi2, blsp_uart2, blsp_uim2, + qdss_cti, blsp_i2c2, blsp_spi3, blsp_uart3, blsp_uim3, blsp_i2c3, + uim3, blsp_spi9, blsp_uart9, blsp_uim9, blsp10_spi, blsp_i2c9, + blsp_spi7, blsp_uart7, blsp_uim7, qdss_tracedata_a, blsp_i2c7, + qua_mi2s, gcc_gp1_clk_a, ssc_irq, uim4, blsp_spi11, blsp_uart11, + blsp_uim11, gcc_gp2_clk_a, gcc_gp3_clk_a, blsp_i2c11, cri_trng0, + cri_trng1, cri_trng, qdss_stm18, pri_mi2s, qdss_stm17, blsp_spi4, + blsp_uart4, blsp_uim4, qdss_stm16, qdss_stm15, blsp_i2c4, + qdss_stm14, dac_calib26, spkr_i2s, audio_ref, lpass_slimbus, + isense_dbg, tsense_pwm1, tsense_pwm2, btfm_slimbus, ter_mi2s, + qdss_stm22, qdss_stm21, qdss_stm20, qdss_stm19, gcc_gp1_clk_b, + sec_mi2s, blsp_spi5, blsp_uart5, blsp_uim5, gcc_gp2_clk_b, + gcc_gp3_clk_b, blsp_i2c5, blsp_spi12, blsp_uart12, blsp_uim12, + qdss_stm25, qdss_stm31, blsp_i2c12, qdss_stm30, qdss_stm29, + tsif1_clk, qdss_stm28, tsif1_en, tsif1_data, sdc4_cmd, qdss_stm27, + qdss_traceclk_b, tsif2_error, sdc43, vfr_1, qdss_stm26, tsif2_clk, + sdc4_clk, qdss_stm24, tsif2_en, sdc42, qdss_stm23, qdss_tracectl_b, + sd_card, tsif2_data, sdc41, tsif2_sync, sdc40, mdp_vsync_p_b, + ldo_en, mdp_vsync_s_b, ldo_update, blsp11_uart_tx_b, blsp11_uart_rx_b, + blsp11_i2c_sda_b, prng_rosc, blsp11_i2c_scl_b, uim2, uim1, uim_batt, + pci_e2, pa_indicator, adsp_ext, ddr_bist, qdss_tracedata_11, + qdss_tracedata_12, modem_tsync, nav_dr, nav_pps, pci_e1, gsm_tx, + qspi_cs, ssbi2, ssbi1, mss_lte, qspi_clk, qspi0, qspi1, qspi2, qspi3, + gpio ] + + drive-strength: + enum: [2, 4, 6, 8, 10, 12, 14, 16] + default: 2 + description: + Selects the drive strength for the specified pins, in mA. + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + output-high: true + + output-low: true + + required: + - pins + - function + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - gpio-controller + - '#gpio-cells' + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include + tlmm: pinctrl@f100000 { + compatible = "qcom,sdx65-tlmm"; + reg = <0x03000000 0xdc2000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&tlmm 0 0 109>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + + gpio-wo-subnode-state { + pins = "gpio1"; + function = "gpio"; + }; + + uart-w-subnodes-state { + rx { + pins = "gpio4"; + function = "blsp_uart1"; + bias-pull-up; + }; + + tx { + pins = "gpio5"; + function = "blsp_uart1"; + bias-disable; + }; + }; + }; +... -- cgit v1.2.3 From 79dcd4e840ccfaf8018ec96415fdc0250e945c77 Mon Sep 17 00:00:00 2001 From: Tinghan Shen Date: Mon, 20 Dec 2021 20:18:24 +0800 Subject: dt-bindings: pinctrl: mt8195: add wrapping node of pin configurations On mt8195, the pinctrl node has pinctrl groups to group pin configurations by users' need. In each pinctrl group, it has subnode(s) to list pins needed and pin configurations. By supporting multiple subnodes, we can configure different pin characteristics (driving/pull-up/pull-down/etc.) in a pinctrl group. Update pinctrl-mt8195.yaml to add subnode in pinctrl groups and an example to illustrate the usage. Signed-off-by: Tinghan Shen Acked-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20211220121825.6446-4-tinghan.shen@mediatek.com Signed-off-by: Linus Walleij --- .../bindings/pinctrl/pinctrl-mt8195.yaml | 338 ++++++++++++--------- 1 file changed, 188 insertions(+), 150 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml index 3cf74df12862..328ea59c5466 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml @@ -55,137 +55,159 @@ properties: Identifying i2c pins pull up/down type which is RSEL. It can support RSEL define or si unit value(ohm) to set different resistance. -#PIN CONFIGURATION NODES +# PIN CONFIGURATION NODES patternProperties: '-pins$': type: object - description: | - A pinctrl node should contain at least one subnodes representing the - pinctrl groups available on the machine. Each subnode will list the - pins it needs, and how they should be configured, with regard to muxer - configuration, pullups, drive strength, input enable/disable and - input schmitt. - An example of using macro: - pincontroller { - /* GPIO0 set as multifunction GPIO0 */ - gpio_pin { - pinmux = ; - }; - /* GPIO8 set as multifunction SDA0 */ - i2c0_pin { - pinmux = ; - }; - }; - $ref: "pinmux-node.yaml" - - properties: - pinmux: - description: | - Integer array, represents gpio pin number and mux setting. - Supported pin number and mux varies for different SoCs, and are defined - as macros in dt-bindings/pinctrl/-pinfunc.h directly. - - drive-strength: - enum: [2, 4, 6, 8, 10, 12, 14, 16] - - bias-pull-down: - description: | - For pull down type is normal, it don't need add RSEL & R1R0 define - and resistance value. - For pull down type is PUPD/R0/R1 type, it can add R1R0 define to - set different resistance. It can support "MTK_PUPD_SET_R1R0_00" & - "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11" - define in mt8195. - For pull down type is RSEL, it can add RSEL define & resistance value(ohm) - to set different resistance by identifying property "mediatek,rsel_resistance_in_si_unit". - It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" - & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" & "MTK_PULL_SET_RSEL_100" - & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" - define in mt8195. It can also support resistance value(ohm) "75000" & "5000" in mt8195. - oneOf: - - enum: [100, 101, 102, 103] - - description: mt8195 pull down PUPD/R0/R1 type define value. - - enum: [200, 201, 202, 203, 204, 205, 206, 207] - - description: mt8195 pull down RSEL type define value. - - enum: [75000, 5000] - - description: mt8195 pull down RSEL type si unit value(ohm). - - An example of using RSEL define: - pincontroller { - i2c0_pin { - pinmux = ; - bias-pull-down = ; - }; - }; - An example of using si unit resistance value(ohm): - &pio { - mediatek,rsel_resistance_in_si_unit; - } - pincontroller { - i2c0_pin { - pinmux = ; - bias-pull-down = <75000>; - }; - }; - - bias-pull-up: + additionalProperties: false + patternProperties: + '^pins': + type: object + additionalProperties: false description: | - For pull up type is normal, it don't need add RSEL & R1R0 define - and resistance value. - For pull up type is PUPD/R0/R1 type, it can add R1R0 define to - set different resistance. It can support "MTK_PUPD_SET_R1R0_00" & - "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11" - define in mt8195. - For pull up type is RSEL, it can add RSEL define & resistance value(ohm) - to set different resistance by identifying property "mediatek,rsel_resistance_in_si_unit". - It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" - & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" & "MTK_PULL_SET_RSEL_100" - & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" - define in mt8195. It can also support resistance value(ohm) - "1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & "75000" in mt8195. - oneOf: - - enum: [100, 101, 102, 103] - - description: mt8195 pull up PUPD/R0/R1 type define value. - - enum: [200, 201, 202, 203, 204, 205, 206, 207] - - description: mt8195 pull up RSEL type define value. - - enum: [1000, 1500, 2000, 3000, 4000, 5000, 10000, 75000] - - description: mt8195 pull up RSEL type si unit value(ohm). - An example of using RSEL define: + A pinctrl node should contain at least one subnodes representing the + pinctrl groups available on the machine. Each subnode will list the + pins it needs, and how they should be configured, with regard to muxer + configuration, pullups, drive strength, input enable/disable and + input schmitt. + An example of using macro: pincontroller { - i2c0_pin { - pinmux = ; - bias-pull-up = ; + /* GPIO0 set as multifunction GPIO0 */ + gpio-pins { + pins { + pinmux = ; + } }; - }; - An example of using si unit resistance value(ohm): - &pio { - mediatek,rsel_resistance_in_si_unit; - } - pincontroller { - i2c0_pin { - pinmux = ; - bias-pull-up = <1000>; + /* GPIO8 set as multifunction SDA0 */ + i2c0-pins { + pins { + pinmux = ; + } }; }; - - bias-disable: true - - output-high: true - - output-low: true - - input-enable: true - - input-disable: true - - input-schmitt-enable: true - - input-schmitt-disable: true - - required: - - pinmux - - additionalProperties: false + $ref: "pinmux-node.yaml" + + properties: + pinmux: + description: | + Integer array, represents gpio pin number and mux setting. + Supported pin number and mux varies for different SoCs, and are + defined as macros in dt-bindings/pinctrl/-pinfunc.h + directly. + + drive-strength: + enum: [2, 4, 6, 8, 10, 12, 14, 16] + + bias-pull-down: + description: | + For pull down type is normal, it don't need add RSEL & R1R0 define + and resistance value. + For pull down type is PUPD/R0/R1 type, it can add R1R0 define to + set different resistance. It can support "MTK_PUPD_SET_R1R0_00" & + "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & + "MTK_PUPD_SET_R1R0_11" define in mt8195. + For pull down type is RSEL, it can add RSEL define & resistance + value(ohm) to set different resistance by identifying property + "mediatek,rsel_resistance_in_si_unit". + It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" + & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" + & "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" + & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" + define in mt8195. It can also support resistance value(ohm) + "75000" & "5000" in mt8195. + oneOf: + - enum: [100, 101, 102, 103] + - description: mt8195 pull down PUPD/R0/R1 type define value. + - enum: [200, 201, 202, 203, 204, 205, 206, 207] + - description: mt8195 pull down RSEL type define value. + - enum: [75000, 5000] + - description: mt8195 pull down RSEL type si unit value(ohm). + + An example of using RSEL define: + pincontroller { + i2c0_pin { + pins { + pinmux = ; + bias-pull-down = ; + } + }; + }; + An example of using si unit resistance value(ohm): + &pio { + mediatek,rsel_resistance_in_si_unit; + } + pincontroller { + i2c0_pin { + pins { + pinmux = ; + bias-pull-down = <75000>; + } + }; + }; + + bias-pull-up: + description: | + For pull up type is normal, it don't need add RSEL & R1R0 define + and resistance value. + For pull up type is PUPD/R0/R1 type, it can add R1R0 define to + set different resistance. It can support "MTK_PUPD_SET_R1R0_00" & + "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & + "MTK_PUPD_SET_R1R0_11" define in mt8195. + For pull up type is RSEL, it can add RSEL define & resistance + value(ohm) to set different resistance by identifying property + "mediatek,rsel_resistance_in_si_unit". + It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" + & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" + & "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" + & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" + define in mt8195. It can also support resistance value(ohm) + "1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & + "75000" in mt8195. + oneOf: + - enum: [100, 101, 102, 103] + - description: mt8195 pull up PUPD/R0/R1 type define value. + - enum: [200, 201, 202, 203, 204, 205, 206, 207] + - description: mt8195 pull up RSEL type define value. + - enum: [1000, 1500, 2000, 3000, 4000, 5000, 10000, 75000] + - description: mt8195 pull up RSEL type si unit value(ohm). + An example of using RSEL define: + pincontroller { + i2c0-pins { + pins { + pinmux = ; + bias-pull-up = ; + } + }; + }; + An example of using si unit resistance value(ohm): + &pio { + mediatek,rsel_resistance_in_si_unit; + } + pincontroller { + i2c0-pins { + pins { + pinmux = ; + bias-pull-up = <1000>; + } + }; + }; + + bias-disable: true + + output-high: true + + output-low: true + + input-enable: true + + input-disable: true + + input-schmitt-enable: true + + input-schmitt-disable: true + + required: + - pinmux allOf: - $ref: "pinctrl.yaml#" @@ -204,30 +226,46 @@ additionalProperties: false examples: - | - #include - #include - pio: pinctrl@10005000 { - compatible = "mediatek,mt8195-pinctrl"; - reg = <0x10005000 0x1000>, - <0x11d10000 0x1000>, - <0x11d30000 0x1000>, - <0x11d40000 0x1000>, - <0x11e20000 0x1000>, - <0x11eb0000 0x1000>, - <0x11f40000 0x1000>, - <0x1000b000 0x1000>; - reg-names = "iocfg0", "iocfg_bm", "iocfg_bl", - "iocfg_br", "iocfg_lm", "iocfg_rb", - "iocfg_tl", "eint"; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pio 0 0 144>; - interrupt-controller; - interrupts = ; - #interrupt-cells = <2>; - - pio-pins { - pinmux = ; - output-low; - }; - }; + #include + #include + # + pio: pinctrl@10005000 { + compatible = "mediatek,mt8195-pinctrl"; + reg = <0x10005000 0x1000>, + <0x11d10000 0x1000>, + <0x11d30000 0x1000>, + <0x11d40000 0x1000>, + <0x11e20000 0x1000>, + <0x11eb0000 0x1000>, + <0x11f40000 0x1000>, + <0x1000b000 0x1000>; + reg-names = "iocfg0", "iocfg_bm", "iocfg_bl", + "iocfg_br", "iocfg_lm", "iocfg_rb", + "iocfg_tl", "eint"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pio 0 0 144>; + interrupt-controller; + interrupts = ; + #interrupt-cells = <2>; + + pio-pins { + pins { + pinmux = ; + output-low; + }; + }; + + spi0-pins { + pins-spi { + pinmux = , + , + ; + bias-disable; + }; + pins-spi-mi { + pinmux = ; + bias-pull-down; + }; + }; + }; -- cgit v1.2.3