From ac434f2877b97e18c3df7d9b1e8e2371befd9890 Mon Sep 17 00:00:00 2001 From: Hal Feng Date: Tue, 4 Jun 2024 16:47:27 +0800 Subject: dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for StarFive JH7110 SoC The UART of StarFive JH7110 has two reset signals. Both of them are necessary for JH7110 to initialize UART. Signed-off-by: Hal Feng Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/20240604084729.57239-2-hal.feng@starfivetech.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/serial/snps-dw-apb-uart.yaml | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml index 1001d2a6ace8..4cdb0dcaccf3 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml @@ -13,6 +13,20 @@ allOf: - $ref: serial.yaml# - $ref: rs485.yaml# + - if: + properties: + compatible: + contains: + const: starfive,jh7110-uart + then: + properties: + resets: + minItems: 2 + else: + properties: + resets: + maxItems: 1 + properties: compatible: oneOf: @@ -48,6 +62,7 @@ properties: - enum: - starfive,jh7100-hsuart - starfive,jh7100-uart + - starfive,jh7110-uart - const: snps,dw-apb-uart - const: snps,dw-apb-uart @@ -82,7 +97,8 @@ properties: type: boolean resets: - maxItems: 1 + minItems: 1 + maxItems: 2 reg-shift: true -- cgit v1.2.3 From 220fb8ff6d326d91fed8a0a44e3ac0a2f34d3f9c Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Tue, 4 Jun 2024 18:05:09 +0100 Subject: dt-bindings: serial: renesas,scif: Move ref for serial.yaml at the end In preparation for adding more validation checks move the ref for 'serial.yaml' to the end and also move reset check in 'allOf' block. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240604170513.522631-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/serial/renesas,scif.yaml | 30 +++++++++++----------- 1 file changed, 15 insertions(+), 15 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml index f3a3eb2831e9..54f885f720f0 100644 --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml @@ -9,9 +9,6 @@ title: Renesas Serial Communication Interface with FIFO (SCIF) maintainers: - Geert Uytterhoeven -allOf: - - $ref: serial.yaml# - properties: compatible: oneOf: @@ -161,18 +158,21 @@ required: - clock-names - power-domains -if: - properties: - compatible: - contains: - enum: - - renesas,rcar-gen2-scif - - renesas,rcar-gen3-scif - - renesas,rcar-gen4-scif - - renesas,scif-r9a07g044 -then: - required: - - resets +allOf: + - $ref: serial.yaml# + + - if: + properties: + compatible: + contains: + enum: + - renesas,rcar-gen2-scif + - renesas,rcar-gen3-scif + - renesas,rcar-gen4-scif + - renesas,scif-r9a07g044 + then: + required: + - resets unevaluatedProperties: false -- cgit v1.2.3 From d057a1e3e475c6d9e24ce2e79c3f3daf367e33d8 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Tue, 4 Jun 2024 18:05:10 +0100 Subject: dt-bindings: serial: renesas,scif: Validate 'interrupts' and 'interrupt-names' This commit adds support to validate the 'interrupts' and 'interrupt-names' properties for every supported SoC. This ensures proper handling and configuration of interrupt-related properties across supported platforms. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/20240604170513.522631-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/serial/renesas,scif.yaml | 73 ++++++++++++++++------ 1 file changed, 55 insertions(+), 18 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml index 54f885f720f0..a750676064cf 100644 --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml @@ -87,11 +87,6 @@ properties: oneOf: - items: - description: A combined interrupt - - items: - - description: Error interrupt - - description: Receive buffer full interrupt - - description: Transmit buffer empty interrupt - - description: Break interrupt - items: - description: Error interrupt - description: Receive buffer full interrupt @@ -99,21 +94,17 @@ properties: - description: Break interrupt - description: Data Ready interrupt - description: Transmit End interrupt + minItems: 4 interrupt-names: - oneOf: - - items: - - const: eri - - const: rxi - - const: txi - - const: bri - - items: - - const: eri - - const: rxi - - const: txi - - const: bri - - const: dri - - const: tei + minItems: 4 + items: + - const: eri + - const: rxi + - const: txi + - const: bri + - const: dri + - const: tei clocks: minItems: 1 @@ -174,6 +165,52 @@ allOf: required: - resets + - if: + properties: + compatible: + contains: + enum: + - renesas,rcar-gen1-scif + - renesas,rcar-gen2-scif + - renesas,rcar-gen3-scif + - renesas,rcar-gen4-scif + then: + properties: + interrupts: + maxItems: 1 + + interrupt-names: false + + - if: + properties: + compatible: + contains: + enum: + - renesas,scif-r7s72100 + then: + properties: + interrupts: + minItems: 4 + maxItems: 4 + + interrupt-names: + maxItems: 4 + + - if: + properties: + compatible: + contains: + enum: + - renesas,scif-r7s9210 + - renesas,scif-r9a07g044 + then: + properties: + interrupts: + minItems: 6 + + interrupt-names: + minItems: 6 + unevaluatedProperties: false examples: -- cgit v1.2.3 From 034e4422ddb5ec9075d550f4668be0a3e85e6a3e Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Tue, 4 Jun 2024 18:05:11 +0100 Subject: dt-bindings: serial: renesas,scif: Make 'interrupt-names' property as required As all the SoCs having multiple interrupts have 'interrupt-names' property in their respective DTSIs, make 'interrupt-names' property as required so that we can validate them using dtbs_check. Signed-off-by: Lad Prabhakar Acked-by: Conor Dooley Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20240604170513.522631-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/serial/renesas,scif.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml index a750676064cf..fcead2150874 100644 --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml @@ -180,6 +180,9 @@ allOf: maxItems: 1 interrupt-names: false + else: + required: + - interrupt-names - if: properties: -- cgit v1.2.3 From 964a80cfbf56f5fa88f09d704c311ed6db0a361f Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Tue, 4 Jun 2024 18:05:12 +0100 Subject: dt-bindings: serial: Add documentation for Renesas RZ/V2H(P) (R9A09G057) SCIF support Document support for the Serial Communication Interface with FIFO (SCIF) available in the Renesas RZ/V2H(P) (R9A09G057) SoC. The SCIF interface in the Renesas RZ/V2H(P) is similar to that available in the RZ/G2L (R9A07G044) SoC, with the following differences: - RZ/V2H(P) SoC has three additional interrupts: one for Tx end/Rx ready and two for Rx and Tx buffer full, all of which are edge-triggered. - RZ/V2H(P) supports asynchronous mode, whereas RZ/G2L supports both synchronous and asynchronous modes. - There are differences in the configuration of certain registers such as SCSMR, SCFCR, and SCSPTR between the two SoCs. To handle these differences in the driver, a new SoC-specific compatible string is added, ensuring proper handling of the unique features and register configurations of the RZ/V2H(P) SoC. Signed-off-by: Lad Prabhakar Reviewed-by: Conor Dooley Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20240604170513.522631-5-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/serial/renesas,scif.yaml | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml index fcead2150874..afc7c05898a1 100644 --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml @@ -80,6 +80,8 @@ properties: - renesas,scif-r9a08g045 # RZ/G3S - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback + - const: renesas,scif-r9a09g057 # RZ/V2H(P) + reg: maxItems: 1 @@ -94,6 +96,9 @@ properties: - description: Break interrupt - description: Data Ready interrupt - description: Transmit End interrupt + - description: Transmit End/Data Ready interrupt + - description: Receive buffer full interrupt (EDGE trigger) + - description: Transmit buffer empty interrupt (EDGE trigger) minItems: 4 interrupt-names: @@ -105,6 +110,9 @@ properties: - const: bri - const: dri - const: tei + - const: tei-dri + - const: rxi-edge + - const: txi-edge clocks: minItems: 1 @@ -161,6 +169,7 @@ allOf: - renesas,rcar-gen3-scif - renesas,rcar-gen4-scif - renesas,scif-r9a07g044 + - renesas,scif-r9a09g057 then: required: - resets @@ -210,9 +219,30 @@ allOf: properties: interrupts: minItems: 6 + maxItems: 6 interrupt-names: minItems: 6 + maxItems: 6 + + - if: + properties: + compatible: + contains: + const: renesas,scif-r9a09g057 + then: + properties: + clocks: + maxItems: 1 + + clock-names: + maxItems: 1 + + interrupts: + minItems: 9 + + interrupt-names: + minItems: 9 unevaluatedProperties: false -- cgit v1.2.3 From 638bf322452265fceec63448fb880c703df887e4 Mon Sep 17 00:00:00 2001 From: Rafał Miłecki Date: Wed, 5 Jun 2024 10:54:32 +0200 Subject: dt-bindings: serial: mediatek,uart: add MT7988 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add compatible string for serial on MT7988 SoC. Signed-off-by: Rafał Miłecki Reviewed-by: AngeloGioacchino Del Regno Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20240605085433.26513-1-zajec5@gmail.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/serial/mediatek,uart.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/serial/mediatek,uart.yaml b/Documentation/devicetree/bindings/serial/mediatek,uart.yaml index 303d02ca4e1b..ff61ffdcad1d 100644 --- a/Documentation/devicetree/bindings/serial/mediatek,uart.yaml +++ b/Documentation/devicetree/bindings/serial/mediatek,uart.yaml @@ -37,6 +37,7 @@ properties: - mediatek,mt7623-uart - mediatek,mt7629-uart - mediatek,mt7986-uart + - mediatek,mt7988-uart - mediatek,mt8127-uart - mediatek,mt8135-uart - mediatek,mt8173-uart -- cgit v1.2.3 From 418af7eeb4e187ce6049dc6c611cbc299cc8ec77 Mon Sep 17 00:00:00 2001 From: Kanak Shilledar Date: Wed, 12 Jun 2024 21:08:43 +0530 Subject: dt-bindings: serial: vt8500-uart: convert to json-schema Convert the VIA VT8500 and WonderMedia WM8xxx UART Controller to newer DT schema. Created DT schema based on the .txt file which had `compatible`, `reg`, `interrupts` and `clocks` as required properties. Additions to the original binding - changed the file name from vt8500-uart to via,vt8500-uart.yaml - removed unnecessary alias from the example. Signed-off-by: Kanak Shilledar Acked-by: Alexey Charkov Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20240612153847.52647-2-kanakshilledar@gmail.com Signed-off-by: Greg Kroah-Hartman --- .../bindings/serial/via,vt8500-uart.yaml | 46 ++++++++++++++++++++++ .../devicetree/bindings/serial/vt8500-uart.txt | 27 ------------- 2 files changed, 46 insertions(+), 27 deletions(-) create mode 100644 Documentation/devicetree/bindings/serial/via,vt8500-uart.yaml delete mode 100644 Documentation/devicetree/bindings/serial/vt8500-uart.txt (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/serial/via,vt8500-uart.yaml b/Documentation/devicetree/bindings/serial/via,vt8500-uart.yaml new file mode 100644 index 000000000000..9c6819241a49 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/via,vt8500-uart.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/via,vt8500-uart.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: VIA VT8500 and WonderMedia WM8xxx UART Controller + +maintainers: + - Alexey Charkov + +allOf: + - $ref: serial.yaml + +properties: + compatible: + enum: + - via,vt8500-uart # up to WM8850/WM8950 + - wm,wm8880-uart # for WM8880 and later + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + +required: + - compatible + - clocks + - interrupts + - reg + +unevaluatedProperties: false + +examples: + - | + serial@d8200000 { + compatible = "via,vt8500-uart"; + reg = <0xd8200000 0x1040>; + interrupts = <32>; + clocks = <&clkuart0>; + }; diff --git a/Documentation/devicetree/bindings/serial/vt8500-uart.txt b/Documentation/devicetree/bindings/serial/vt8500-uart.txt deleted file mode 100644 index 2b64e6107fb3..000000000000 --- a/Documentation/devicetree/bindings/serial/vt8500-uart.txt +++ /dev/null @@ -1,27 +0,0 @@ -* VIA VT8500 and WonderMedia WM8xxx UART Controller - -Required properties: -- compatible: should be "via,vt8500-uart" (for VIA/WonderMedia chips up to and - including WM8850/WM8950), or "wm,wm8880-uart" (for WM8880 and later) - -- reg: base physical address of the controller and length of memory mapped - region. - -- interrupts: hardware interrupt number - -- clocks: shall be the input parent clock phandle for the clock. This should - be the 24Mhz reference clock. - -Aliases may be defined to ensure the correct ordering of the uarts. - -Example: - aliases { - serial0 = &uart0; - }; - - uart0: serial@d8200000 { - compatible = "via,vt8500-uart"; - reg = <0xd8200000 0x1040>; - interrupts = <32>; - clocks = <&clkuart0>; - }; -- cgit v1.2.3 From a9411ef13f8fada29775fd21a3dfab7dcc49216a Mon Sep 17 00:00:00 2001 From: Hui Wang Date: Tue, 18 Jun 2024 19:26:19 +0800 Subject: dt-bindings: serial: sc16is7xx: add reset-gpios In some designs, the chip reset pin is connected to a GPIO, and this GPIO needs to be set correctly before probing the driver, so add a reset-gpios in the device tree. Acked-by: Conor Dooley Reviewed-by: Lech Perczak Tested-by: Hugo Villeneuve Reviewed-by: Hugo Villeneuve Signed-off-by: Hui Wang Link: https://lore.kernel.org/r/20240618112620.152848-1-hui.wang@canonical.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/serial/nxp,sc16is7xx.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.yaml b/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.yaml index 5dec15b7e7c3..88871480018e 100644 --- a/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.yaml +++ b/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.yaml @@ -28,6 +28,9 @@ properties: clocks: maxItems: 1 + reset-gpios: + maxItems: 1 + clock-frequency: description: When there is no clock provider visible to the platform, this @@ -91,6 +94,7 @@ unevaluatedProperties: false examples: - | #include + #include i2c { #address-cells = <1>; #size-cells = <0>; @@ -120,6 +124,7 @@ examples: compatible = "nxp,sc16is752"; reg = <0x54>; clocks = <&clk20m>; + reset-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; interrupt-parent = <&gpio3>; interrupts = <7 IRQ_TYPE_EDGE_FALLING>; nxp,modem-control-line-ports = <0 1>; /* Ports 0 and 1 as modem control lines */ -- cgit v1.2.3