From c99d64d8322043a3a67f62bb03f6b70ef99138c9 Mon Sep 17 00:00:00 2001 From: "shenwei.wang@nxp.com" Date: Fri, 8 Jun 2018 14:22:37 -0500 Subject: dt-bindings: pwm: fsl-ftm: Add compatible string for i.MX8QM i.MX8QM integrates a new version of FTM IP block. It adds eight PWM enable bits in FTM_SC register. Add a new compatible string of "fsl,imx8qm-ftm-pwm" for i.MX8QM to differentiate it from the previous SoCs. Signed-off-by: Shenwei Wang Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt') diff --git a/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt index 3899d6a557c1..576ad002bc83 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt @@ -16,7 +16,10 @@ modes in device tree. Required properties: -- compatible: Should be "fsl,vf610-ftm-pwm". +- compatible : should be "fsl,-ftm-pwm" and one of the following + compatible strings: + - "fsl,vf610-ftm-pwm" for PWM compatible with the one integrated on VF610 + - "fsl,imx8qm-ftm-pwm" for PWM compatible with the one integrated on i.MX8QM - reg: Physical base address and length of the controller's registers - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of the cells format. -- cgit v1.2.3