From fc42ef5121687d917bbdd96805fb70c28a2ad023 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Fri, 4 Oct 2013 23:19:54 +0200 Subject: Documentation: dt: Remove clock gates IDs list for Allwinner SoCs That documentation was mostly useful when we didn't have any documentation for those SoCs, which is not the case anymore. Remove this, since it should live in the DT anyway. Signed-off-by: Maxime Ripard Cc: Mark Rutland --- Documentation/devicetree/bindings/clock/sunxi.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings/clock/sunxi.txt') diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt index 00a5c26454eb..91a748fed13d 100644 --- a/Documentation/devicetree/bindings/clock/sunxi.txt +++ b/Documentation/devicetree/bindings/clock/sunxi.txt @@ -45,8 +45,8 @@ Additionally, "allwinner,*-gates-clk" clocks require: Clock consumers should specify the desired clocks they use with a "clocks" phandle cell. Consumers that are using a gated clock should -provide an additional ID in their clock property. The values of this -ID are documented in sunxi/-gates.txt. +provide an additional ID in their clock property. This ID is the +offset of the bit controlling this particular gate in the register. For example: -- cgit v1.2.3