From 88cc9fc41c7318565bcf28a843b1e4e3f2acf894 Mon Sep 17 00:00:00 2001 From: Aisheng Dong Date: Tue, 18 Dec 2018 15:22:54 +0000 Subject: dt-bindings: arm: fsl-scu: add imx8qm pinctrl support Update binding doc to support imx8qm pinctrl. Cc: Rob Herring Cc: Stefan Agner Cc: Shawn Guo Cc: Sascha Hauer Cc: Fabio Estevam Cc: Mark Rutland Cc: devicetree@vger.kernel.org Cc: Pengutronix Kernel Team Signed-off-by: Dong Aisheng Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/arm/freescale') diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt index 46d0af1f0872..831d5dfd24c8 100644 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt @@ -96,13 +96,16 @@ Pinctrl bindings based on SCU Message Protocol This binding uses the i.MX common pinctrl binding[3]. Required properties: -- compatible: Should be "fsl,imx8qxp-iomuxc". +- compatible: Should be one of: + "fsl,imx8qm-iomuxc", + "fsl,imx8qxp-iomuxc". Required properties for Pinctrl sub nodes: - fsl,pins: Each entry consists of 3 integers which represents the mux and config setting for one pin. The first 2 integers are specified using a PIN_FUNC_ID macro, which can be found in + , . The last integer CONFIG is the pad setting value like pull-up on this pin. -- cgit v1.2.3