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2023-04-14KVM: selftests: Add a common helper for the PMU event filter guest codeAaron Lewis1-11/+18
Split out the common parts of the Intel and AMD guest code in the PMU event filter test into a helper function. This is in preparation for adding additional counters to the test. No functional changes intended. Signed-off-by: Aaron Lewis <aaronlewis@google.com> Link: https://lore.kernel.org/r/20230407233254.957013-2-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-14KVM: selftests: Fix spelling mistake "perrmited" -> "permitted"Colin Ian King1-1/+1
There is a spelling mistake in a test report message. Fix it. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Link: https://lore.kernel.org/r/20230414080809.1678603-1-colin.i.king@gmail.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-11KVM: selftests: Add test to verify KVM's supported XCR0Aaron Lewis3-0/+153
Check both architectural rules and KVM's ABI for KVM_GET_SUPPORTED_CPUID to ensure the supported xfeatures[1] don't violate any of them. The architectural rules[2] and KVM's contract with userspace ensure for a given feature, e.g. sse, avx, amx, etc... their associated xfeatures are either all sets or none of them are set, and any dependencies are enabled if needed. [1] EDX:EAX of CPUID.(EAX=0DH,ECX=0) [2] SDM vol 1, 13.3 ENABLING THE XSAVE FEATURE SET AND XSAVE-ENABLED FEATURES Cc: Mingwei Zhang <mizhang@google.com> Signed-off-by: Aaron Lewis <aaronlewis@google.com> [sean: expand comments, use a fancy X86_PROPERTY] Reviewed-by: Aaron Lewis <aaronlewis@google.com> Tested-by: Aaron Lewis <aaronlewis@google.com> Link: https://lore.kernel.org/r/20230405004520.421768-7-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-11KVM: selftests: Add all known XFEATURE masks to common codeAaron Lewis2-30/+33
Add all known XFEATURE masks to processor.h to make them more broadly available in KVM selftests. Relocate and clean up the exiting AMX (XTILE) defines in processor.h, e.g. drop the intermediate define and use BIT_ULL. Signed-off-by: Aaron Lewis <aaronlewis@google.com> Reviewed-by: Aaron Lewis <aaronlewis@google.com> Tested-by: Aaron Lewis <aaronlewis@google.com> Link: https://lore.kernel.org/r/20230405004520.421768-6-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-11KVM: selftests: Rework dynamic XFeature helper to take mask, not bitSean Christopherson3-11/+14
Take the XFeature mask in __vm_xsave_require_permission() instead of the bit so that there's no need to define macros for both the bit and the mask. Asserting that only a single bit is set and retrieving said bit is easy enough via log2 helpers. Opportunistically clean up the error message for the ARCH_REQ_XCOMP_GUEST_PERM sanity check. Reviewed-by: Aaron Lewis <aaronlewis@google.com> Tested-by: Aaron Lewis <aaronlewis@google.com> Link: https://lore.kernel.org/r/20230405004520.421768-5-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-11KVM: selftests: Move XGETBV and XSETBV helpers to common codeAaron Lewis2-21/+21
The instructions XGETBV and XSETBV are useful to other tests. Move them to processor.h to make them more broadly available. No functional change intended. Reviewed-by: Jim Mattson <jmattson@google.com> Signed-off-by: Aaron Lewis <aaronlewis@google.com> Reviewed-by: Mingwei Zhang <mizhang@google.com> [sean: reword shortlog] Reviewed-by: Aaron Lewis <aaronlewis@google.com> Tested-by: Aaron Lewis <aaronlewis@google.com> Link: https://lore.kernel.org/r/20230405004520.421768-4-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-08KVM: selftests: Fix spelling mistake "KVM_HYPERCAL_EXIT_SMC" -> ↵Colin Ian King1-1/+1
"KVM_HYPERCALL_EXIT_SMC" There is a spelling mistake in a test assert message. Fix it. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Reviewed-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230406080226.122955-1-colin.i.king@gmail.com
2023-04-08KVM: arm64: Test that SMC64 arch calls are reservedOliver Upton1-0/+8
Assert that the SMC64 view of the Arm architecture range is reserved by KVM and cannot be filtered by userspace. Signed-off-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230408121732.3411329-3-oliver.upton@linux.dev
2023-04-07KVM: selftests: Verify LBRs are disabled if vPMU is disabledSean Christopherson1-0/+29
Verify that disabling the guest's vPMU via CPUID also disables LBRs. KVM has had at least one bug where LBRs would remain enabled even though the intent was to disable everything PMU related. Link: https://lore.kernel.org/r/20230311004618.920745-22-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-07KVM: selftests: Add negative testcase for PEBS format in PERF_CAPABILITIESSean Christopherson1-0/+10
Expand the immutable features sub-test for PERF_CAPABILITIES to verify KVM rejects any attempt to use a PEBS format other than the host's. Link: https://lore.kernel.org/r/20230311004618.920745-21-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-07KVM: selftests: Refactor LBR_FMT test to avoid use of separate macroSean Christopherson1-7/+6
Rework the LBR format test to use the bitfield instead of a separate mask macro, mainly so that adding a nearly-identical PEBS format test doesn't have to copy-paste-tweak the macro too. No functional change intended. Link: https://lore.kernel.org/r/20230311004618.920745-20-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-07KVM: selftests: Drop "all done!" printf() from PERF_CAPABILITIES testSean Christopherson1-2/+0
Drop the arbitrary "done" message from the VMX PMU caps test, it's pretty obvious the test is done when the process exits. Link: https://lore.kernel.org/r/20230311004618.920745-19-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-07KVM: selftests: Test post-KVM_RUN writes to PERF_CAPABILITIESSean Christopherson1-0/+13
Now that KVM disallows changing PERF_CAPABILITIES after KVM_RUN, expand the host side checks to verify KVM rejects any attempts to change bits from userspace. Link: https://lore.kernel.org/r/20230311004618.920745-18-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-07KVM: selftests: Expand negative testing of guest writes to PERF_CAPABILITIESSean Christopherson1-7/+54
Test that the guest can't write 0 to PERF_CAPABILITIES, can't write the current value, and can't toggle _any_ bits. There is no reason to special case the LBR format. Link: https://lore.kernel.org/r/20230311004618.920745-17-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-07KVM: selftests: Test all immutable non-format bits in PERF_CAPABILITIESSean Christopherson1-3/+27
Add negative testing of all immutable bits in PERF_CAPABILITIES, i.e. single bits that are reserved-0 or are effectively reserved-1 by KVM. Omit LBR and PEBS format bits from the test as it's easier to test them manually than it is to add safeguards to the comment path, e.g. toggling a single bit can yield a format of '0', which is legal as a "disable" value. Link: https://lore.kernel.org/r/20230311004618.920745-16-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-07KVM: selftests: Test all fungible features in PERF_CAPABILITIESSean Christopherson1-5/+24
Verify that userspace can set all fungible features in PERF_CAPABILITIES. Drop the now unused #define of the "full-width writes" flag. Link: https://lore.kernel.org/r/20230311004618.920745-15-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-07KVM: selftests: Drop now-redundant checks on PERF_CAPABILITIES writesSean Christopherson1-6/+0
Now that vcpu_set_msr() verifies the expected "read what was wrote" semantics of all durable MSRs, including PERF_CAPABILITIES, drop the now-redundant manual checks in the VMX PMU caps test. Link: https://lore.kernel.org/r/20230311004618.920745-14-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-07KVM: selftests: Verify KVM preserves userspace writes to "durable" MSRsSean Christopherson1-1/+16
Assert that KVM provides "read what you wrote" semantics for all "durable" MSRs (for lack of a better name). The extra coverage is cheap from a runtime performance perspective, and verifying the behavior in the common helper avoids gratuitous copy+paste in individual tests. Note, this affects all tests that set MSRs from userspace! Link: https://lore.kernel.org/r/20230311004618.920745-13-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-07KVM: selftests: Print out failing MSR and value in vcpu_set_msr()Sean Christopherson1-8/+24
Reimplement vcpu_set_msr() as a macro and pretty print the failing MSR (when possible) and the value if KVM_SET_MSRS fails instead of using the using the standard KVM_IOCTL_ERROR(). KVM_SET_MSRS is somewhat odd in that it returns the index of the last successful write, i.e. will be '0' on failure barring an entirely different KVM bug. And for writing MSRs, the MSR being written and the value being written are almost always relevant to the failure, i.e. just saying "failed!" doesn't help debug. Place the string goo in a separate macro in anticipation of using it to further expand MSR testing. Link: https://lore.kernel.org/r/20230311004618.920745-12-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-07KVM: selftests: Assert that full-width PMC writes are supported if PDCM=1Sean Christopherson1-0/+3
KVM emulates full-width PMC writes in software, assert that KVM reports full-width writes as supported if PERF_CAPABILITIES is supported. Link: https://lore.kernel.org/r/20230311004618.920745-11-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-07KVM: selftests: Move 0/initial value PERF_CAPS checks to dedicated sub-testSean Christopherson1-6/+19
Use a separate sub-test to verify userspace can clear PERF_CAPABILITIES and restore it to the KVM-supported value, as the testcase isn't unique to the LBR format. Link: https://lore.kernel.org/r/20230311004618.920745-10-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-07KVM: selftests: Split PMU caps sub-tests to avoid writing MSR after KVM_RUNSean Christopherson1-20/+31
Split the PERF_CAPABILITIES subtests into two parts so that the LBR format testcases don't execute after KVM_RUN. Similar to the guest CPUID model, KVM will soon disallow changing PERF_CAPABILITIES after KVM_RUN, at which point attempting to set the MSR after KVM_RUN will yield false positives and/or false negatives depending on what the test is trying to do. Land the LBR format test in a more generic "immutable features" test in anticipation of expanding its scope to other immutable features. Link: https://lore.kernel.org/r/20230311004618.920745-6-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-06KVM: selftests: Close opened file descriptor in stable_tsc_check_supported()Hao Ge1-2/+6
Close the "current_clocksource" file descriptor before returning or exiting from stable_tsc_check_supported() in vmx_nested_tsc_scaling_test. Signed-off-by: Hao Ge <gehao@kylinos.cn> Reviewed-by: Vipin Sharma <vipinsh@google.com> Link: https://lore.kernel.org/r/20230405101350.259000-1-gehao@kylinos.cn Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-04-05KVM: selftests: Add test for SMCCC filterOliver Upton2-0/+261
Add a selftest for the SMCCC filter, ensuring basic UAPI constraints (e.g. reserved ranges, non-overlapping ranges) are upheld. Additionally, test that the DENIED and FWD_TO_USER work as intended. Signed-off-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230404154050.2270077-14-oliver.upton@linux.dev
2023-04-05KVM: selftests: Add a helper for SMCCC calls with SMC instructionOliver Upton2-19/+46
Build a helper for doing SMCs in selftests by macro-izing the current HVC implementation and taking the conduit instruction as an argument. Signed-off-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230404154050.2270077-13-oliver.upton@linux.dev
2023-03-30KVM: selftests: Comment newly defined aarch64 ID registersMark Brown1-5/+5
All otherwise unspecified aarch64 ID registers should be read as zero so we cover the whole ID register space in the get-reg-list test but we've added comments for those that have been named. Add comments for ID_AA64PFR2_EL1, ID_AA64SMFR0_EL1, ID_AA64ISAR2_EL1, ID_AA64MMFR3_EL1 and ID_AA64MMFR4_EL1 which have been defined since the comments were added so someone looking for them will see that they are covered. Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230210-kvm-arm64-getreg-comments-v1-1-a16c73be5ab4@kernel.org
2023-03-30KVM: selftests: arm64: Fix ttbr0_el1 encoding for PA bits > 48Ryan Roberts1-2/+5
Bits [51:48] of the pgd address are stored at bits [5:2] of ttbr0_el1. page_table_test stores its page tables at the far end of IPA space so was tripping over this when run on a system that supports FEAT_LPA (or FEAT_LPA2). Signed-off-by: Ryan Roberts <ryan.roberts@arm.com> Reviewed-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230308110948.1820163-4-ryan.roberts@arm.com
2023-03-30KVM: selftests: arm64: Fix pte encode/decode for PA bits > 48Ryan Roberts1-8/+24
The high bits [51:48] of a physical address should appear at [15:12] in a 64K pte, not at [51:48] as was previously being programmed. Fix this with new helper functions that do the conversion correctly. This also sets us up nicely for adding LPA2 encodings in future. Fixes: 7a6629ef746d ("kvm: selftests: add virt mem support for aarch64") Signed-off-by: Ryan Roberts <ryan.roberts@arm.com> Reviewed-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230308110948.1820163-3-ryan.roberts@arm.com
2023-03-30KVM: selftests: Fixup config fragment for access_tracking_perf_testRyan Roberts1-0/+1
access_tracking_perf_test requires CONFIG_IDLE_PAGE_TRACKING. However this is missing from the config fragment, so add it in so that this test is no longer skipped. Signed-off-by: Ryan Roberts <ryan.roberts@arm.com> Reviewed-by: Sean Christopherson <seanjc@google.com> Reviewed-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230308110948.1820163-2-ryan.roberts@arm.com
2023-03-30KVM: arm64: selftests: Augment existing timer test to handle variable offsetMarc Zyngier1-1/+15
Allow a user to specify the global offset on the command-line. Reviewed-by: Colton Lewis <coltonlewis@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230330174800.2677007-21-maz@kernel.org
2023-03-30KVM: arm64: selftests: Deal with spurious timer interruptsMarc Zyngier1-15/+25
Make sure the timer test can properly handle a spurious timer interrupt, something that is far from being unlikely. This involves checking for the GIC IAR return value (don't bother handling the interrupt if it was spurious) as well as the timer control register (don't do anything if the interrupt is masked or the timer disabled). Take this opportunity to rewrite the timer handler in a more readable way. This solves a bunch of failures that creep up on systems that are slow to retire the interrupt, something that the GIC architecture makes no guarantee about. Reviewed-by: Colton Lewis <coltonlewis@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230330174800.2677007-20-maz@kernel.org
2023-03-30KVM: arm64: selftests: Add physical timer registers to the sysreg listMarc Zyngier1-1/+4
Now that KVM exposes CNTPCT_EL0, CNTP_CTL_EL0 and CNT_CVAL_EL0 to userspace, add them to the get-reg-list selftest. Reviewed-by: Colton Lewis <coltonlewis@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230330174800.2677007-19-maz@kernel.org
2023-03-25KVM: selftests: Check that XTILEDATA supports XFDAaron Lewis2-0/+2
Check that XTILEDATA supports XFD. In amx_test, add the requirement that the guest allows the xfeature, XTILEDATA, to be set in XFD. Otherwise, the test may fail. Signed-off-by: Aaron Lewis <aaronlewis@google.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Link: https://lore.kernel.org/r/20230221163655.920289-14-mizhang@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-03-25KVM: selftests: Check that the palette table exists before using itAaron Lewis2-0/+6
Check that the palette table exists before using it. The maximum number of AMX palette tables is enumerated by CPUID.1DH:EAX. Assert that the palette used in amx_test, CPUID.1DH.1H, does not exceed that maximum. Signed-off-by: Aaron Lewis <aaronlewis@google.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Link: https://lore.kernel.org/r/20230221163655.920289-13-mizhang@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-03-25KVM: selftests: Move XSAVE and OSXSAVE CPUID checks into AMX's init_regs()Aaron Lewis1-7/+3
Move the checks on XSAVE and OSXSAVE into init_regs() so that the XSAVE check is done before setting CR4.OSXSAVE, i.e. before a potential #GP, and so that the OSXSAVE check is performend immediately after enabling XSAVE in CR4. Signed-off-by: Aaron Lewis <aaronlewis@google.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Link: https://lore.kernel.org/r/20230221163655.920289-12-mizhang@google.com [sean: keep XSAVE check, rewrite changelog accordingly] Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-03-25KVM: selftests: Assert that both XTILE{CFG,DATA} are XSAVE-enabledAaron Lewis1-1/+1
Assert that both XTILE{CFG,DATA} are written and read back via XSETBV and XGETBV respectively. The original check in amx_test only ensures at least one of the XTILE bits are set, XTILECFG or XTILEDATA, when it really should be checking that both are set. Fixes: bf70636d9443 ("selftest: kvm: Add amx selftest") Signed-off-by: Aaron Lewis <aaronlewis@google.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Link: https://lore.kernel.org/r/20230221163655.920289-11-mizhang@google.com [sean: massage changelog] Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-03-25KVM: selftests: Assert that XTILE is XSAVE-enabledAaron Lewis1-6/+1
Assert that XTILE is XSAVE-enabled. check_xsave_supports_xtile() doesn't actually check anything since its return value is not used. Add the intended assert. Opportunistically, move the assert to a more appropriate location: immediately after XSETBV and remove check_xsave_supports_xtile(). Fixes: 5dc19f1c7dd3 ("KVM: selftests: Convert AMX test to use X86_PROPRETY_XXX") Signed-off-by: Aaron Lewis <aaronlewis@google.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Link: https://lore.kernel.org/r/20230221163655.920289-10-mizhang@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-03-25KVM: selftests: Verify XTILE_DATA in XSTATE isn't affected by IA32_XFDMingwei Zhang1-0/+10
Add asserts to verify the XSTATE metadata for XTILE_DATA isn't affected by disabling AMX tile data via IA32_XFD. XFD doesn't intercept XSAVE, it only prevents setting bits in XCR0, i.e. regardless of XFD, AMX state is managed by XSAVE/XRSTOR as long as the corresponding bits are set XCR0. Signed-off-by: Mingwei Zhang <mizhang@google.com> Link: https://lore.kernel.org/r/20230221163655.920289-9-mizhang@google.com [sean: massage changelog] Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-03-25KVM: selftests: Assert that XTILE_DATA is set in IA32_XFD on #NMMingwei Zhang1-0/+2
Add an extra check to IA32_XFD to ensure that XTILE_DATA is actually set, i.e. is consistent with the AMX architecture. In addition, repeat the checks after the guest/host world switch to ensure the values of IA32_XFD and IA32_XFD_ERR are well preserved. Signed-off-by: Mingwei Zhang <mizhang@google.com> Link: https://lore.kernel.org/r/20230221163655.920289-7-mizhang@google.com [sean: massage changelog] Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-03-25KVM: selftests: Add check of CR0.TS in the #NM handler in amx_testMingwei Zhang1-0/+1
Be extra paranoid and assert that CR0.TS is clear when verifying the #NM in the AMX test is due to the expected XFeature Disable error, i.e. that the #NM isn't due to CR0.TS=1. Signed-off-by: Mingwei Zhang <mizhang@google.com> Link: https://lore.kernel.org/r/20230221163655.920289-6-mizhang@google.com [sean: reword changelog to make it clear this is pure paranoia] Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-03-25KVM: selftests: Enable checking on xcomp_bv in amx_testMingwei Zhang1-0/+1
After tilerelease instruction, AMX tiles are in INIT state. According to Intel SDM vol 1. 13.10: "If RFBM[i] = 1, XSTATE_BV[i] is set to the value of XINUSE[i].", XSTATE_BV[18] should be cleared after xsavec. On the other hand, according to Intel SDM vol 1. 13.4.3: "If XCOMP_BV[i] = 1, state component i is located at a byte offset locationI from the base address of the XSAVE area". Since at the time of xsavec, XCR0[18] is set indicating AMX tile data component is still enabled, xcomp_bv[18] should be set. Complete the checks by adding the assert to xcomp_bv[18] after xsavec. Signed-off-by: Mingwei Zhang <mizhang@google.com> Link: https://lore.kernel.org/r/20230221163655.920289-5-mizhang@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-03-25KVM: selftests: Fix an error in comment of amx_testMingwei Zhang1-1/+4
After the execution of __tilerelease(), AMX component will be in INIT state. Therefore, execution of XSAVEC saving the AMX state into memory will cause the xstate_bv[18] cleared in xheader. However, the xcomp_bv[18] will remain set. Fix the error in comment. Also, update xsavec() to XSAVEC because xcomp_bv[18] is set due to the instruction, not the function. Finally, use XTILEDATA instead 'bit 18' in comments. Cc: Jim Mattson <jmattson@google.com> Cc: Venkatesh Srinivas <venkateshs@google.com> Cc: Aaron Lewis <aaronlewis@google.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Link: https://lore.kernel.org/r/20230221163655.920289-4-mizhang@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-03-25KVM: selftests: Add a fully functional "struct xstate" for x86Mingwei Zhang2-25/+23
Add a working xstate data structure for the usage of AMX and potential future usage on other xstate components. AMX selftest requires checking both the xstate_bv and xcomp_bv. Existing code relies on pointer arithmetics to fetch xstate_bv and does not support xcomp_bv. So, add a working xstate data structure into processor.h for x86. Suggested-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Link: https://lore.kernel.org/r/20230221163655.920289-3-mizhang@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-03-25KVM: selftests: Add 'malloc' failure check in vcpu_save_stateIvan Orlov1-0/+1
There is a 'malloc' call in vcpu_save_state function, which can be unsuccessful. This patch will add the malloc failure checking to avoid possible null dereference and give more information about test fail reasons. Signed-off-by: Ivan Orlov <ivan.orlov0322@gmail.com> Link: https://lore.kernel.org/r/20230322144528.704077-1-ivan.orlov0322@gmail.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-03-25KVM: selftests: Adjust VM's initial stack address to align with SysV ABI specAckerley Tng1-1/+17
Align the guest stack to match calling sequence requirements in section "The Stack Frame" of the System V ABI AMD64 Architecture Processor Supplement, which requires the value (%rsp + 8), NOT %rsp, to be a multiple of 16 when control is transferred to the function entry point. I.e. in a normal function call, %rsp needs to be 16-byte aligned _before_ CALL, not after. This fixes unexpected #GPs in guest code when the compiler uses SSE instructions, e.g. to initialize memory, as many SSE instructions require memory operands (including those on the stack) to be 16-byte-aligned. Signed-off-by: Ackerley Tng <ackerleytng@google.com> Link: https://lore.kernel.org/r/20230227180601.104318-1-ackerleytng@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-03-25KVM: selftests: Report enable_pmu module value when test is skippedLike Xu2-0/+2
Running x86_64/pmu_event_filter_test or x86_64/vmx_pmu_caps_test with enable_pmu globally disabled will report the following into: 1..0 # SKIP - Requirement not met: use_intel_pmu() || use_amd_pmu() or 1..0 # SKIP - Requirement not met: kvm_cpu_has(X86_FEATURE_PDCM) this can be confusing, so add a check on kvm.enable_pmu. Signed-off-by: Like Xu <likexu@tencent.com> Link: https://lore.kernel.org/r/20230313085311.25327-3-likexu@tencent.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-03-24KVM: selftests: Add a helper to read kvm boolean module parametersLike Xu2-0/+6
Add a helper function for reading kvm boolean module parameters values. No functional change intended. Signed-off-by: Like Xu <likexu@tencent.com> Link: https://lore.kernel.org/r/20230214084920.59787-2-likexu@tencent.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-03-24KVM: selftests: Fix nsec to sec conversion in demand_paging_testAnish Moorthy1-1/+1
demand_paging_test uses 1E8 as the denominator to convert nanoseconds to seconds, which is wrong. Use NSEC_PER_SEC instead to fix the issue and make the conversion obvious. Reported-by: James Houghton <jthoughton@google.com> Signed-off-by: Anish Moorthy <amoorthy@google.com> Reviewed-by: Oliver Upton <oliver.upton@linux.dev> Reviewed-by: Sean Christopherson <seanjc@google.com> Link: https://lore.kernel.org/r/20230223001805.2971237-1-amoorthy@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-03-14KVM: selftests: Sync KVM exit reasons in selftestsVipin Sharma1-2/+15
Add missing KVM_EXIT_* reasons in KVM selftests from include/uapi/linux/kvm.h Signed-off-by: Vipin Sharma <vipinsh@google.com> Message-Id: <20230204014547.583711-5-vipinsh@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-03-14KVM: selftests: Add macro to generate KVM exit reason stringsSean Christopherson1-26/+28
Add and use a macro to generate the KVM exit reason strings array instead of relying on developers to correctly copy+paste+edit each string. Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20230204014547.583711-4-vipinsh@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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