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2025-04-30ASoC: Intel: catpt: avoid type mismatch in dev_dbg() formatArnd Bergmann1-1/+1
Depending on the architecture __ffs() returns either an 'unsigned long' or 'unsigned int' result. Compile-testing this driver on targets that use the latter produces a warning: sound/soc/intel/catpt/dsp.c: In function 'catpt_dsp_set_srampge': sound/soc/intel/catpt/dsp.c:181:44: error: format '%ld' expects argument of type 'long int', but argument 4 has type 'u32' {aka 'unsigned int'} [-Werror=format=] 181 | dev_dbg(cdev->dev, "sanitize block %ld: off 0x%08x\n", | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Change the type of the local variable to match the format string and avoid the warning on any architecture. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://patch.msgid.link/20250429073545.3558494-1-arnd@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-05-06ASoC: Intel: catpt: clarify Copyright informationPierre-Louis Bossart1-1/+1
For some reason a number of files included the "All rights reserved" statement. Good old copy-paste made sure this mistake proliferated. Remove the "All rights reserved" in all Intel-copyright to align with internal guidance. Acked-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com> Link: https://lore.kernel.org/r/20240503140359.259762-6-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-07ASoC: Intel: catpt: Carefully use PCI bitwise constantsAndy Shevchenko1-2/+2
PM constants for PCI devices are defined with bitwise annotation. When used as is, sparse complains about that: .../catpt/dsp.c:390:9: warning: restricted pci_power_t degrades to integer .../catpt/dsp.c:414:9: warning: restricted pci_power_t degrades to integer Force them to be u32 in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://msgid.link/r/20240307163734.3852754-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-17ASoC: Intel: catpt: Test dmaengine_submit() result before moving onCezary Rojewski1-2/+12
After calling dmaengine_submit(), the submitted transfer descriptor belongs to the DMA engine. Pointer to that descriptor may no longer be valid after the call and should be tested before awaiting transfer completion. Reported-by: Kevin Tian <kevin.tian@intel.com> Suggested-by: Dave Jiang <dave.jiang@intel.com> Fixes: 4fac9b31d0b9 ("ASoC: Intel: Add catpt base members") Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20211216115743.2130622-2-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-11-17Merge series "ASoC: Intel: catpt: Offload fixes and code optimization" from ↵Mark Brown1-51/+5
Cezary Rojewski <cezary.rojewski@intel.com>: First two of the series address bugs connected mainly to offload streams: - scenarios with very low buffer sizes: RESET_STREAM IPC timeouts - fix lp clock selection when switching between PAUSE <-> RESUME states: glitches on first offload when no additional stream is opened simultaneously Follow ups are: code reduction and optimization oriented patches. This has been foretold in: [PATCH v10 00/14] ASoC: Intel: Catpt - Lynx and Wildcat point https://www.spinics.net/lists/alsa-devel/msg116440.html Note: LPT power up/down sequences might get aligned with WPT once enough testing is done as capabilities are shared for both DSPs. First, optimize applying of user settings - prevent redundand calls from happening - and then as mentioned above, streamline power on/off sequence for LPT and WPT. Cezary Rojewski (5): ASoC: Intel: catpt: Skip position update for unprepared streams ASoC: Intel: catpt: Correct clock selection for dai trigger ASoC: Intel: catpt: Optimize applying user settings ASoC: Intel: catpt: Streamline power routines across LPT and WPT ASoC: Intel: catpt: Cleanup after power routines streamlining sound/soc/intel/catpt/core.h | 10 ++- sound/soc/intel/catpt/device.c | 18 +++--- sound/soc/intel/catpt/dsp.c | 56 ++-------------- sound/soc/intel/catpt/pcm.c | 113 ++++++++++++++++----------------- 4 files changed, 74 insertions(+), 123 deletions(-) -- 2.17.1 base-commit: 3650b228f83adda7e5ee532e2b90429c03f7b9ec
2020-11-16ASoC: Intel: catpt: Cleanup after power routines streamliningCezary Rojewski1-46/+0
With LPT switching to WPT-based power on/off routines, functions that have been previously used by it are rendered redundant so remove them. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20201116133332.8530-6-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-11-16ASoC: Intel: catpt: Streamline power routines across LPT and WPTCezary Rojewski1-5/+5
There is no need for separate power on/off routines for LPT and WPT as as the protocol is shared for both platforms. Make WPT routines generic and reuse them in LPT case too. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20201116133332.8530-5-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-10-14ASoC: Intel: catpt: Relax clock selection conditionsCezary Rojewski1-3/+6
Stress tests show that DSP may occasionally be late with signaling WAIT state when all pins are made use of simultaneously plus start/stop (pause) gets involved. While this isn't tied to standard audio scenarios where only System Pin (playback and capture) is involved, ensure user is not hindered when playing with more advanced scenarios. >From DSP perspective, clock acts as a resource: low clock equals less resources, high clock more resources. Relax clock selection procedure so only low -> high switch is allowed when awaiting WAIT signal times out. Once active stream count decreases, DSP will have more time internally to adjust thus low clock selection becomes possible again. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20201012103221.30759-2-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-10-02ASoC: Intel: catpt: Define DSP operationsCezary Rojewski1-0/+334
Implement dsp lifecycle functions such as core RESET and STALL, SRAM power control and LP clock selection. This also adds functions for handling transport over DW DMA controller. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200929141247.8058-5-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-10-02ASoC: Intel: catpt: Add IPC message handlersCezary Rojewski1-0/+106
Declare global and stream IPC message handlers for all known message types. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200929141247.8058-4-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-10-02ASoC: Intel: Add catpt base membersCezary Rojewski1-0/+138
Declare base structures, registers and extension routines for the catpt solution. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200929141247.8058-2-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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