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The PM core will grow pm_link infrastructure in 2.6.33 which can be
used to implement the intended functionality of the ASoC-specific
device suspend and resume callbacks so drop them.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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More and more devices feature PLLs and FLLs with the ability to select
between multiple input clocks. In order to better support these devices
a new argument, source, has been added to the set_pll() configuration
API. Using set_clkdiv() is often difficult due to the need to stop the
PLL/FLL before any reconfiguration can be done.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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While writes tend to be able to use a fairly bus independant format to
do the writes reads are all bus specific. To allow us to factor out
this code include the bus type as a parameter when setting up the
cache.
Initially just use this to factor out hw_write_t for I2C.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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A lot of CODECs share the same register data formats and therefore
replicate the code to manage access to and caching of the register
map. In order to reduce code duplication centralised versions of
this code will be introduced with drivers able to configure the use
of the common code by calling the new snd_soc_codec_set_cache_io()
API call during startup.
As an initial user the 7 bit address/9 bit data format used by many
Wolfson devices is supported for write only CODECs and the drivers
with straightforward register cache implementations are converted to
use it.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The WM8960 is a low power, high quality stereo codec designed for
portable digital audio applications.
Stereo class D speaker drivers provide 1W per channel into 8W loads.
Guaranteed low leakage, excellent PSRR and pop/click suppression
mechanisms enable direct battery connection for the speaker supply.
The device also integrates a complete microphone interface and a stereo
headphone driver. External component requirements are drastically
reduced as no separate microphone, speaker or headphone amplifiers are
required. Advanced on-chip digital signal processing performs automatic
level control for the microphone or line input.
Stereo 24-bit sigma-delta ADCs and DACs are used with low power
over-sampling digital interpolation and decimation filters and a
flexible digital audio interface.
The master clock can be input directly or generated internally by an
onboard PLL, supporting most commonly-used clocking schemes.
This driver was originally written by Liam Girdwood, with substantial
subsequent additions and updates for feature completeness and changes in
the ASoC framework from me.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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