index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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author
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path:
root
/
kernel
/
irq
/
generic-chip.c
Age
Commit message (
Expand
)
Author
Files
Lines
2013-06-10
irqdomain: Eliminate revmap type
Grant Likely
1
-4
/
+1
2013-06-10
irqdomain: Add a name field
Grant Likely
1
-0
/
+1
2013-05-29
genirq: irqchip: Add mask to block out invalid irqs
Grant Likely
1
-0
/
+3
2013-05-29
genirq: Generic chip: Add linear irq domain support
Thomas Gleixner
1
-6
/
+181
2013-05-29
genirq: Generic chip: Split out code into separate functions
Thomas Gleixner
1
-16
/
+34
2013-05-29
genirq: irqchip: Add a mask calculation function
Thomas Gleixner
1
-2
/
+6
2013-05-29
genirq: Generic chip: Cache per irq bit mask
Thomas Gleixner
1
-9
/
+14
2013-05-29
genirq: Generic chip: Handle separate mask registers
Gerlando Falauto
1
-7
/
+10
2013-05-29
genirq: Generic chip: Add support for per chip type mask cache
Gerlando Falauto
1
-6
/
+10
2013-05-29
genirq: Generic chip: Remove the local cur_regs() function
Gerlando Falauto
1
-14
/
+17
2011-11-01
kernel: Fix files explicitly needing EXPORT_SYMBOL infrastructure
Paul Gortmaker
1
-0
/
+1
2011-10-24
irq: Add EXPORT_SYMBOL_GPL to function of irq generic-chip
Nobuhiro Iwamatsu
1
-0
/
+4
2011-07-26
genirq: Fix wrong bit operation
jhbird.choi@samsung.com
1
-2
/
+2
2011-07-07
genirq: replace irq_gc_ack() with {set,clr}_bit variants (fwd)
Simon Guinot
1
-2
/
+16
2011-04-23
genirq: Add chip suspend and resume callbacks
Thomas Gleixner
1
-0
/
+93
2011-04-23
genirq: Implement a generic interrupt chip
Thomas Gleixner
1
-0
/
+261