| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2021-11-23 | dt-bindings: clock: sunxi: Export CLK_DRAM for devfreq | Samuel Holland | 1 | -1/+1 |
| 2019-11-05 | clk: sunxi-ng: h3: Export MBUS clock | Jernej Skrabec | 1 | -1/+1 |
| 2018-03-02 | clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO | Jernej Skrabec | 1 | -0/+2 |
| 2017-05-31 | clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM | Chen-Yu Tsai | 1 | -0/+2 |
| 2017-03-06 | clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver | Icenowy Zheng | 1 | -1/+4 |
| 2016-07-09 | clk: sunxi-ng: Add H3 clocks | Maxime Ripard | 1 | -0/+145 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |