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path: root/include/asm-mips/cpu-features.h
AgeCommit message (Expand)AuthorFilesLines
2007-12-01[MIPS] Fix use of smp_processor_id() in preemptible code.Pavel Kiryukhin1-3/+3
2007-10-12[MIPS] Allow hardwiring of the CPU type to a single type for optimization.Ralf Baechle1-1/+4
2007-10-12[MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.Ralf Baechle1-3/+0
2007-07-10[MIPS] Enable support for the userlocal hardware registerRalf Baechle1-0/+4
2007-03-17[MIPS] FPU ownership management & preemption fixesAtsushi Nemoto1-0/+3
2006-07-14[MIPS] Use the proper technical term for naming some of the cache macros.Ralf Baechle1-2/+2
2006-07-14[MIPS] Default cpu_has_mipsmt to a runtime checkChris Dearman1-5/+1
2006-06-30[MIPS] Fix configuration of R2 CPU features and multithreading.Ralf Baechle1-12/+8
2006-04-26Don't include linux/config.h from anywhere else in include/David Woodhouse1-1/+0
2006-04-19[MIPS] FPU affinity for MT ASE.Ralf Baechle1-1/+1
2006-03-18[MIPS] local_r4k_flush_cache_page fixAtsushi Nemoto1-0/+3
2006-01-10MIPS: Reorganize ISA constants strictly as bitmasks.Ralf Baechle1-24/+21
2006-01-10MIPS: Introduce machinery for testing for MIPSxxR1/2.Ralf Baechle1-0/+24
2005-10-29Cleanup the mess in cpu_cache_init.Ralf Baechle1-2/+13
2005-10-29Detect the MIPS R2 vectored interrupt, external interrupt controllerRalf Baechle1-0/+24
2005-10-29Redo RM9000 workaround which along with other DSP ASE changes wasRalf Baechle1-11/+0
2005-10-29Support the MIPS32 / MIPS64 DSP ASE.Ralf Baechle1-0/+4
2005-10-29Cleanup decoding of MIPSxx config registers.Ralf Baechle1-3/+13
2005-09-05[PATCH] mips: clean up 32/64-bit configurationRalf Baechle1-2/+2
2005-04-17Linux-2.6.12-rc2Linus Torvalds1-0/+159
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