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2025-06-19drm/xe/xe3: Add support for media IP version 30.02Matt Roper3-0/+15
Media version 30.02 should be treated the same as other Xe3 IP, but will have a slightly different set of workarounds. -v2: Extend the range in existing WA entry (Bala) -v3: Revert v2, Do not extend the range for the time being(Matt) Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com> Link: https://lore.kernel.org/r/20250613193146.3549862-4-dnyaneshwar.bhadane@intel.com
2025-06-19drm/xe/xe3: Add support for graphics IP version 30.03Matt Roper3-0/+9
Graphics version 30.03 should be treated the same as other Xe3 IP, but will have a slightly different set of workarounds. -v2: Merge and extend the WA onto existing entry (Bala) -v3: Revert v2's feedback changes and keep entry saparate (Matt). Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@inte.com> Link: https://lore.kernel.org/r/20250613193146.3549862-3-dnyaneshwar.bhadane@intel.com
2025-06-19drm/i915/xe3lpd: Add support for display version 30.02Matt Roper1-0/+1
Display version 30.02 should be treated the same as other Xe3 IP, but will have a slightly different set of workarounds. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://lore.kernel.org/r/20250613193146.3549862-2-dnyaneshwar.bhadane@intel.com
2025-06-19clk: qcom: cmnpll: Add IPQ5424 SoC supportLuo Jie1-5/+30
The CMN PLL in IPQ5424 SoC supplies the fixed clock to NSS at 300 MHZ and to PPE at 375 MHZ. Other output clocks from CMN PLL on this SoC, and their rates are same as IPQ9574. Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://lore.kernel.org/r/20250610-qcom_ipq5424_cmnpll-v3-2-ceada8165645@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-19drm/i915/xe3lpd: Extend WA 16023981245 for display 30.02Dnyaneshwar Bhadane1-1/+2
wa_16023981245 need to be extended for display version 30.02 Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> Reviewed-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://lore.kernel.org/r/20250613193146.3549862-10-dnyaneshwar.bhadane@intel.com
2025-06-19drm/i915/wcl: C10 phy connected to port A and BDnyaneshwar Bhadane1-1/+7
WCL added a c10 phy connected to port B. PTL code is currently restricting c10 to phy_a only. PTL doesn't have a PHY connected to PORT B; as such,there will never be a case where PTL uses PHY B. WCL uses PORT A and B with the C10 PHY.Reusing the condition for WCL and extending it for PORT B should not cause any issues for PTL. -v2: Reuse and extend PTL condition for WCL (Matt) Bspec: 73944 Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://lore.kernel.org/r/20250613193146.3549862-9-dnyaneshwar.bhadane@intel.com
2025-06-19drm/i915/xe3lpd: Extend DMC load path for displayDnyaneshwar Bhadane1-1/+2
Display version 30.02 should be treated the same as other Xe3 IP. So exteding DMC load path the condition for it. Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> Reviewed-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://lore.kernel.org/r/20250613193146.3549862-8-dnyaneshwar.bhadane@intel.com
2025-06-19drm/i915: Set max cdclk for display 30.02Matt Atwood1-1/+3
Display version 30.02 has a lower max cdclk rate than 30.00. Bspec: 68861 Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://lore.kernel.org/r/20250613193146.3549862-6-dnyaneshwar.bhadane@intel.com
2025-06-19drm/i915/xe3lpd: Update bandwidth parameters for display version 30.02Matt Atwood1-1/+10
Bandwidth parameters for WCL have been updated with respect to previous display releases. Encode them into xe3lpd_3002_sa_info and use that new struct. -v2: Resolve conflict to apply patch. Bspec: 68859 Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://lore.kernel.org/r/20250613193146.3549862-5-dnyaneshwar.bhadane@intel.com
2025-06-19mux: Convert mux_control_ops to a flex array member in mux_chipThorsten Blum1-4/+3
Convert mux_control_ops to a flexible array member at the end of the mux_chip struct and add the __counted_by() compiler attribute to improve access bounds-checking via CONFIG_UBSAN_BOUNDS and CONFIG_FORTIFY_SOURCE. Use struct_size() to calculate the number of bytes to allocate for a new mux chip and to remove the following Coccinelle/coccicheck warning: WARNING: Use struct_size Use size_add() to safely add any extra bytes. No functional changes intended. Link: https://github.com/KSPP/linux/issues/83 Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev> Link: https://lore.kernel.org/r/20250610104106.1948-2-thorsten.blum@linux.dev Signed-off-by: Kees Cook <kees@kernel.org>
2025-06-19Octeontx2-pf: Fix Backpresure configurationHariprasad Kelam1-2/+2
NIX block can receive packets from multiple links such as MAC (RPM), LBK and CPT. ----------------- RPM --| NIX | ----------------- | | LBK Each link supports multiple channels for example RPM link supports 16 channels. In case of link oversubsribe, NIX will assert backpressure on receive channels. The previous patch considered a single channel per link, resulting in backpressure not being enabled on the remaining channels Fixes: a7ef63dbd588 ("octeontx2-af: Disable backpressure between CPT and NIX") Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20250617063403.3582210-1-hkelam@marvell.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-19net/mlx4e: Don't redefine IB_MTU_XXX enumMark Zhang1-9/+3
Rely on existing IB_MTU_XXX definitions which exist in ib_verbs.h. Reviewed-by: Patrisious Haddad <phaddad@nvidia.com> Signed-off-by: Mark Zhang <markzhang@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/382c91ee506e7f1f3c1801957df6b28963484b7d.1750147222.git.leon@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-19Merge branch '100GbE' of ↵Jakub Kicinski4-7/+69
git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue Tony Nguyen says: ==================== Intel Wired LAN Driver Updates 2025-06-17 (ice, e1000e) For ice: Krishna Kumar modifies aRFS match criteria to correctly identify matching filters. Grzegorz fixes a memory leak in eswitch legacy mode. For e1000e: Vitaly sets clock frequency on some Nahum systems which may misreport their value. * '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue: e1000e: set fixed clock frequency indication for Nahum 11 and Nahum 13 ice: fix eswitch code memory leak in reset scenario net: ice: Perform accurate aRFS flow match ==================== Link: https://patch.msgid.link/20250617172444.1419560-1-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-19net: ftgmac100: select FIXED_PHYHeiner Kallweit1-0/+1
Depending on e.g. DT configuration this driver uses a fixed link. So we shouldn't rely on the user to enable FIXED_PHY, select it in Kconfig instead. We may end up with a non-functional driver otherwise. Fixes: 38561ded50d0 ("net: ftgmac100: support fixed link") Cc: stable@vger.kernel.org Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Link: https://patch.msgid.link/476bb33b-5584-40f0-826a-7294980f2895@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-18virt: sev-guest: Contain snp_guest_request_ioctl in sev-guestAlexey Kardashevskiy1-3/+6
SNP Guest Request uses only exitinfo2 which is a return value from GHCB, has meaning beyond ioctl and therefore belongs to struct snp_guest_req. Move exitinfo2 there and remove snp_guest_request_ioctl from the SEV platform code. No functional change intended. Signed-off-by: Alexey Kardashevskiy <aik@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Reviewed-by: Dionna Glaze <dionnaglaze@google.com> Link: https://lore.kernel.org/20250611040842.2667262-2-aik@amd.com
2025-06-18eth: sxgbe: migrate to new RXFH callbacksJakub Kicinski1-38/+7
Migrate to new callbacks added by commit 9bb00786fc61 ("net: ethtool: add dedicated callbacks for getting and setting rxfh fields"). RXFH is all this driver supports in RXNFC so old callbacks are completely removed. Reviewed-by: Joe Damato <joe@dama.to> Link: https://patch.msgid.link/20250617014848.436741-6-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-18eth: dpaa2: migrate to new RXFH callbacksJakub Kicinski1-12/+24
Migrate to new callbacks added by commit 9bb00786fc61 ("net: ethtool: add dedicated callbacks for getting and setting rxfh fields"). Reviewed-by: Joe Damato <joe@dama.to> Link: https://patch.msgid.link/20250617014848.436741-5-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-18eth: dpaa: migrate to new RXFH callbacksJakub Kicinski1-37/+7
Migrate to new callbacks added by commit 9bb00786fc61 ("net: ethtool: add dedicated callbacks for getting and setting rxfh fields"). RXFH is all this driver supports in RXNFC so old callbacks are completely removed. Reviewed-by: Joe Damato <joe@dama.to> Link: https://patch.msgid.link/20250617014848.436741-4-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-18eth: mvpp2: migrate to new RXFH callbacksJakub Kicinski3-10/+33
Migrate to new callbacks added by commit 9bb00786fc61 ("net: ethtool: add dedicated callbacks for getting and setting rxfh fields"). Reviewed-by: Joe Damato <joe@dama.to> Link: https://patch.msgid.link/20250617014848.436741-3-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-18eth: niu: migrate to new RXFH callbacksJakub Kicinski1-8/+9
Migrate to new callbacks added by commit 9bb00786fc61 ("net: ethtool: add dedicated callbacks for getting and setting rxfh fields"). Reviewed-by: Joe Damato <joe@dama.to> Link: https://patch.msgid.link/20250617014848.436741-2-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-18eth: otx2: migrate to new RXFH callbacksJakub Kicinski1-12/+19
Migrate to new callbacks added by commit 9bb00786fc61 ("net: ethtool: add dedicated callbacks for getting and setting rxfh fields"). Link: https://patch.msgid.link/20250617014555.434790-6-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-18eth: thunder: migrate to new RXFH callbacksJakub Kicinski1-23/+14
Migrate to new callbacks added by commit 9bb00786fc61 ("net: ethtool: add dedicated callbacks for getting and setting rxfh fields"). The driver has no other RXNFC functionality so the SET callback can be now removed. Link: https://patch.msgid.link/20250617014555.434790-5-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-18eth: ena: migrate to new RXFH callbacksJakub Kicinski1-28/+11
Migrate to new callbacks added by commit 9bb00786fc61 ("net: ethtool: add dedicated callbacks for getting and setting rxfh fields"). The driver has no other RXNFC functionality so the SET callback can be now removed. Reviewed-by: David Arinzon <darinzon@amazon.com> Link: https://patch.msgid.link/20250617014555.434790-4-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-18eth: bnxt: migrate to new RXFH callbacksJakub Kicinski1-11/+13
Migrate to new callbacks added by commit 9bb00786fc61 ("net: ethtool: add dedicated callbacks for getting and setting rxfh fields"). Reviewed-by: Michael Chan <michael.chan@broadcom.com> Link: https://patch.msgid.link/20250617014555.434790-3-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-18eth: bnx2x: migrate to new RXFH callbacksJakub Kicinski1-20/+13
Migrate to new callbacks added by commit 9bb00786fc61 ("net: ethtool: add dedicated callbacks for getting and setting rxfh fields"). The driver has no other RXNFC functionality so the SET callback can be now removed. Reviewed-by: Subbaraya Sundeep <sbhatta@marvell.com> Link: https://patch.msgid.link/20250617014555.434790-2-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-18cpufreq: userspace: set CPUFREQ_GOV_STRICT_TARGET flagShashank Balaji1-0/+1
When the userspace governor is used, the user intends to set a fixed CPU frequency for a policy, for whatever reason. The CPUFREQ_GOV_STRICT_TARGET flag is the required behaviour. Without this flag, the intel_pstate driver, with HWP enabled, will set HWP_MIN_PERF to the target frequency and HWP_MAX_PERF to the policy maximum, when configuring the HWP_REQUEST MSR. This lets the hardware choose any frequency between the target frequency and the policy maximum, which is not the intended behaviour. To fix this, `cat scaling_setspeed > scaling_max_freq` had to be done. With this patch, that is no longer necessary. Setting scaling_setspeed is sufficient, as expected. Signed-off-by: Shashank Balaji <shashank.mahadasyam@sony.com> Link: https://patch.msgid.link/20250527-userspace-governor-doc-v2-1-0e22c69920f2@sony.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-06-18thermal: int340x: processor_thermal: Add Wildcat Lake PCI IDSrinivas Pandruvada3-0/+6
Add Wildcat Lake PCI ID for processor thermal device. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://patch.msgid.link/20250617231940.3314546-1-srinivas.pandruvada@linux.intel.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-06-18ACPICA: Refuse to evaluate a method if arguments are missingRafael J. Wysocki1-0/+7
As reported in [1], a platform firmware update that increased the number of method parameters and forgot to update a least one of its callers, caused ACPICA to crash due to use-after-free. Since this a result of a clear AML issue that arguably cannot be fixed up by the interpreter (it cannot produce missing data out of thin air), address it by making ACPICA refuse to evaluate a method if the caller attempts to pass fewer arguments than expected to it. Closes: https://github.com/acpica/acpica/issues/1027 [1] Reported-by: Peter Williams <peter@newton.cx> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Hans de Goede <hansg@kernel.org> Tested-by: Hans de Goede <hansg@kernel.org> # Dell XPS 9640 with BIOS 1.12.0 Link: https://patch.msgid.link/5909446.DvuYhMxLoT@rjwysocki.net Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-06-18ACPI: Enable CONFIG_ACPI_DEBUG by defaultMario Limonciello1-0/+1
CONFIG_ACPI_DEBUG can be helpful for getting debug messages on OEM systems to identify a BIOS bug. It's a relatively small size increase to turn it on by default (50kb) and that saves asking people to enable it when an issue comes up because it wasn't in defconfig. Enable it by default. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://patch.msgid.link/20250609030706.465202-1-superm1@kernel.org Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-06-18cpufreq: CPPC: Remove forward declaration of cppc_cpufreq_register_em()Lifeng Zheng1-13/+12
cppc_cpufreq_register_em() is only used in populate_efficiency_class(). A forward declaration of it is not necessary. Move cppc_cpufreq_register_em() in front of populate_efficiency_class() and remove the forward declaration of cppc_cpufreq_register_em(). No functional change. Signed-off-by: Lifeng Zheng <zhenglifeng1@huawei.com> Link: https://patch.msgid.link/20250526113057.3086513-4-zhenglifeng1@huawei.com [ rjw: Changelog edits ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-06-18cpufreq: CPPC: Do not return a value from populate_efficiency_class()Lifeng Zheng1-6/+3
The return value of populate_efficiency_class() is never needed and the result of it doesn't affect the initialization of cppc_cpufreq. It makes more sense to change it into a void function. Signed-off-by: Lifeng Zheng <zhenglifeng1@huawei.com> Link: https://patch.msgid.link/20250526113057.3086513-3-zhenglifeng1@huawei.com [ rjw: Subject and changelog edits ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-06-18cpufreq: CPPC: Remove cpu_data_listLifeng Zheng1-25/+0
After commit a28b2bfc099c ("cppc_cpufreq: replace per-cpu data array with a list"), cpu_data can be got from policy->driver_data, so cpu_data_list is not actually needed and can be removed. Signed-off-by: Lifeng Zheng <zhenglifeng1@huawei.com> Link: https://patch.msgid.link/20250526113057.3086513-2-zhenglifeng1@huawei.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-06-18ACPI: DPTF: Support for Wildcat LakeSrinivas Pandruvada5-0/+12
Add Wildcat Lake ACPI IDs for DPTF. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://patch.msgid.link/20250617231824.3314507-1-srinivas.pandruvada@linux.intel.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-06-18PCI/MSI: Remove duplicated to_pci_dev() conversionChris Li1-3/+3
In pci_msi_update_mask(), "lock = &to_pci_dev()" does the to_pci_dev() lookup, and there's another one buried inside msi_desc_to_pci_dev(). Introduce a local variable to remove that duplication. Signed-off-by: Chris Li <chrisl@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/all/20250617-pci-msi-avoid-dup-pcidev-v1-1-ed75b0419023@kernel.org
2025-06-18ACPI: APEI: EINJ: Enable EINJv2 error injectionsZaid Alali1-11/+47
Enable injection using EINJv2 mode of operation. [Tony: Mostly Zaid's original code. I just changed how the error ID and syndrome bits are implemented. Also swapped out some camelcase variable names] Co-developed-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Zaid Alali <zaidal@os.amperecomputing.com> Link: https://patch.msgid.link/20250617193026.637510-7-zaidal@os.amperecomputing.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-06-18ACPI: APEI: EINJ: Create debugfs files to enter device id and syndromeTony Luck1-0/+97
EINJv2 allows users to inject multiple errors at the same time by specifying the device id and syndrome bits for each error in a flex array. Create files in the einj debugfs directory to enter data for each device id and syndrome value. Note that the specification says these are 128-bit little-endian values. Linux doesn't have a handy helper to manage objects of this type. Signed-off-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Zaid Alali <zaidal@os.amperecomputing.com> Link: https://patch.msgid.link/20250617193026.637510-6-zaidal@os.amperecomputing.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-06-18ACPI: APEI: EINJ: Discover EINJv2 parametersZaid Alali1-2/+24
The EINJv2 set_error_type_with_address structure has a flex array to hold the component IDs and syndrome values used when injecting multiple errors at once. Discover the size of this array by taking the address from the ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS entry in the EINJ table and reading the BIOS copy of the structure. Derive the maximum number of components from the length field in the einjv2_extension_struct at the end of the BIOS copy. Map the whole of the structure into kernel memory (and unmap on module unload). [Tony: Code unchanged from Zaid's original. New commit message] Reviewed-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Zaid Alali <zaidal@os.amperecomputing.com> Link: https://patch.msgid.link/20250617193026.637510-5-zaidal@os.amperecomputing.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-06-18ACPI: APEI: EINJ: Add einjv2 extension structZaid Alali1-0/+24
Add einjv2 extension struct and EINJv2 error types to prepare the driver for EINJv2 support. ACPI specifications[1] enables EINJv2 by extending set_error_type_with_address struct. Link: https://uefi.org/specs/ACPI/6.6/18_Platform_Error_Interfaces.html#einjv2-extension-structure [1] Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Zaid Alali <zaidal@os.amperecomputing.com> Link: https://patch.msgid.link/20250617193026.637510-4-zaidal@os.amperecomputing.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-06-18ACPI: APEI: EINJ: Enable the discovery of EINJv2 capabilitiesZaid Alali3-16/+63
Enable the driver to show all supported error injections for EINJ and EINJv2 at the same time. EINJv2 capabilities can be discovered by checking the return value of get_error_type, where bit 30 set indicates EINJv2 support. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Zaid Alali <zaidal@os.amperecomputing.com> Link: https://patch.msgid.link/20250617193026.637510-3-zaidal@os.amperecomputing.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-06-18ACPI: APEI: EINJ: Fix kernel test sparse warningsZaid Alali1-46/+60
This patch fixes the kernel test robot warning reported here: Link: https://lore.kernel.org/all/202410241620.oApALow5-lkp@intel.com/ Use pointers annotated with the __iomem marker for all iomem map calls, and creates a local copy of the mapped IO memory for future access in the code. memcpy_fromio() and memcpy_toio() are used to read/write data from/to mapped IO memory. Reviewed-by: Ira Weiny <ira.weiny@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Zaid Alali <zaidal@os.amperecomputing.com> Link: https://patch.msgid.link/20250617193026.637510-2-zaidal@os.amperecomputing.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-06-18EDAC/igen6: Fix NULL pointer dereferenceQiuxu Zhuo1-11/+13
A kernel panic was reported with the following kernel log: EDAC igen6: Expected 2 mcs, but only 1 detected. BUG: unable to handle page fault for address: 000000000000d570 ... Hardware name: Notebook V54x_6x_TU/V54x_6x_TU, BIOS Dasharo (coreboot+UEFI) v0.9.0 07/17/2024 RIP: e030:ecclog_handler+0x7e/0xf0 [igen6_edac] ... igen6_probe+0x2a0/0x343 [igen6_edac] ... igen6_init+0xc5/0xff0 [igen6_edac] ... This issue occurred because one memory controller was disabled by the BIOS but the igen6_edac driver still checked all the memory controllers, including this absent one, to identify the source of the error. Accessing the null MMIO for the absent memory controller resulted in the oops above. Fix this issue by reverting the configuration structure to non-const and updating the field 'res_cfg->num_imc' to reflect the number of detected memory controllers. Fixes: 20e190b1c1fd ("EDAC/igen6: Skip absent memory controllers") Reported-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com> Closes: https://lore.kernel.org/all/aFFN7RlXkaK_loQb@mail-itl/ Suggested-by: Borislav Petkov <bp@alien8.de> Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Tested-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com> Link: https://lore.kernel.org/r/20250618162307.1523736-1-qiuxu.zhuo@intel.com
2025-06-18Merge tag 'ata-6.16-rc3' of ↵Linus Torvalds5-21/+55
git://git.kernel.org/pub/scm/linux/kernel/git/libata/linux Pull ata fixes from Niklas Cassel: - Force PIO for ATAPI devices on VT6415/VT6330 as the controller locks up on ATAPI DMA (Tasos) - Fix ACPI PATA cable type detection such that the controller is not forced down to a slow transfer mode (Tasos) - Fix build error on 32-bit UML (Johannes) - Fix a PCI region leak in the pata_macio driver so that the driver no longer fails to load after rmmod (Philipp) - Use correct DMI BIOS build date for ThinkPad W541 quirk (me) - Disallow LPM for ASUSPRO-D840SA motherboard as this board interestingly enough gets graphical corruptions on the iGPU when LPM is enabled (me) - Disallow LPM for Asus B550-F motherboard as this board will get command timeouts on ports 5 and 6, yet LPM with the same drive works fine on all other ports (Mikko) * tag 'ata-6.16-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/libata/linux: ata: ahci: Disallow LPM for Asus B550-F motherboard ata: ahci: Disallow LPM for ASUSPRO-D840SA motherboard ata: ahci: Use correct BIOS build date for ThinkPad W541 quirk ata: pata_macio: Fix PCI region leak ata: pata_cs5536: fix build on 32-bit UML ata: libata-acpi: Do not assume 40 wire cable if no devices are enabled ata: pata_via: Force PIO for ATAPI devices on VT6415/VT6330
2025-06-18drm/amdgpu/sdma5.2: init engine reset mutexAlex Deucher1-0/+1
Missing the mutex init. Fixes: 47454f2dc0bf ("drm/amdgpu: Register the new sdma function pointers for sdma_v5_2") Reviewed-by: Jesse Zhang <Jesse.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit ea685ff30a51a25dd9be90786933ada49a088f65)
2025-06-18drm/amdkfd: Fix race in GWS queue schedulingJay Cornwall1-1/+1
q->gws is not updated atomically with qpd->mapped_gws_queue. If a runlist is created between pqm_set_gws and update_queue it will contain a queue which uses GWS in a process with no GWS allocated. This will result in a scheduler hang. Use q->properties.is_gws which is changed while holding the DQM lock. Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit b98370220eb3110e82248e3354e16a489a492cfb) Cc: stable@vger.kernel.org
2025-06-18drm/amdgpu/sdma5: init engine reset mutexAlex Deucher1-0/+1
Missing the mutex init. Fixes: e56d4bf57fab ("drm/amdgpu/: drm/amdgpu: Register the new sdma function pointers for sdma_v5_0") Reviewed-by: Jesse Zhang <Jesse.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 3f4caf092f02f0de169c6122639af481c7edc8f9)
2025-06-18drm/amdgpu: switch job hw_fence to amdgpu_fenceAlex Deucher6-32/+32
Use the amdgpu fence container so we can store additional data in the fence. This also fixes the start_time handling for MCBP since we were casting the fence to an amdgpu_fence and it wasn't. Fixes: 3f4c175d62d8 ("drm/amdgpu: MCBP based on DRM scheduler (v9)") Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit bf1cd14f9e2e1fdf981eed273ddd595863f5288c) Cc: stable@vger.kernel.org
2025-06-18drm/amdgpu: Fix SDMA UTC_L1 handling during start/stop sequencesJesse Zhang1-1/+5
This commit makes two key fixes to SDMA v4.4.2 handling: 1. disable UTC_L1 in sdma_cntl register when stopping SDMA engines by reading the current value before modifying UTC_L1_ENABLE bit. 2. Ensure UTC_L1_ENABLE is consistently managed by: - Adding the missing register write when enabling UTC_L1 during start - Keeping UTC_L1 enabled by default as per hardware requirements v2: Correct SDMA_CNTL setting (Philip) Suggested-by: Jonathan Kim <jonathan.kim@amd.com> Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 375bf564654e85a7b1b0657b191645b3edca1bda) Cc: stable@vger.kernel.org
2025-06-18drm/amdgpu: Release reset locks during failuresLijo Lazar1-25/+55
Make sure to release reset domain lock in case of failures. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Ce Sun <cesun102@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Fixes: 11bb33766f66 ("drm/amdgpu: refactor amdgpu_device_gpu_recover") Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 1ab11a82681eb33a66f423216cb063e7f40c6f85)
2025-06-18drm/amd/display: Check dce_hwseq before dereferencing itAlex Hung1-1/+1
[WHAT] hws was checked for null earlier in dce110_blank_stream, indicating hws can be null, and should be checked whenever it is used. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 79db43611ff61280b6de58ce1305e0b2ecf675ad) Cc: stable@vger.kernel.org
2025-06-18drm/amdgpu: VCN v5_0_1 to prevent FW checking RB during DPG pauseSonny Jiang1-1/+5
Add a protection to ensure programming are all complete prior VCPU starting. This is a WA for an unintended VCPU running. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit c29521b529fa5e225feaf709d863a636ca0cbbfa) Cc: stable@vger.kernel.org
generated by cgit v1.2.3 (git 2.39.0) at 2026-06-08 21:59:03 +0300