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2024-07-24drm/radeon: change rdev->ddev to rdev_to_drm(rdev)Wu Hoi Pok36-159/+159
This patch changes the way "drm_device" is accessed. It uses "rdev_to_drm(rdev)" instead of accessing the struct member directly. Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Wu Hoi Pok <wuhoipok@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/radeon: add helper rdev_to_drm(rdev)Wu Hoi Pok1-0/+5
Add helper rdev_to_drm(rdev), similar to amdgpu, most function should access the "drm_device" with "rdev_to_drm(rdev)" instead, where amdgpu has "adev_to_drm(adev)". It also makes changing from "*drm_device" to "drm_device" in "radeon_devicce" later on easier. Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Wu Hoi Pok <wuhoipok@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/radeon: use variable flags as parameterWu Hoi Pok1-1/+1
To be consistent with amdgpu driver, use "flags" as the parameter because it is already assigned as "ent->driver_data". Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Wu Hoi Pok <wuhoipok@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/radeon: remove load callback from kms_driverWu Hoi Pok1-1/+4
The ".load" callback in "struct drm_driver" is deprecated. In order to remove the callback, we have to manually call "radeon_driver_load_kms" instead. Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Wu Hoi Pok <wuhoipok@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/radeon: change variable name "dev" to "ddev" for consistencyWu Hoi Pok1-8/+8
In the probe function of amdgpu, it uses "ddev" as the name of "struct drm_device *", so I suggest renaming it to be consistent. Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Wu Hoi Pok <wuhoipok@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: 3.2.292Aric Cyr1-1/+1
* FW Release 0.0.225.0 * DML2 fixes * Allow display DCC for DCN401 * Refactor DWB, OPP, MPC, MMHUBBUB * Fix dscclk Programming issue on DCN401 Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Remove unused dml2_core_ip_params structRodrigo Siqueira1-78/+0
Acked-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Remove unnecessary DSC power gating for DCN401Joshua Aberback1-2/+0
[Why] In some cases during topology changes, a pipe that was used to drive a stream being removed can be re-assigned to drive a different stream. In these cases, DSC power gating is not handled properly, leading to situations where DSC is being setup while power gated. [How] - remove enable_stream_gating and disable_stream_gating for DCN401 Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: free bo used for dmub bounding boxAurabindo Pillai1-2/+11
fix a memleak introduced by not removing the buffer object for use with early dmub bounding box value storage Fixes: 234e94555800 ("drm/amd/display: Enable copying of bounding box data from VBIOS DMUB") Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Add visual confirm for Idle StateDuncan Ma4-0/+8
[Why] Visual Confirm would tell us if it ever entered idle state. [How] Add debug option for IPS visual confirm Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Duncan Ma <duncan.ma@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Set Cursor Matrix to bypass instead of Input PlaneDaniel Sa1-12/+2
why: When the cursor disappears/reappears on fullscreen video, there is a short transitional period where the cursor's color matrix is using the same format as the video plane. This sets the cursor to the wrong color momentarily before the UI plane appears, correcting the color. how: Instead of defaulting to using the color space from the input plane, default to bypass mode. Reviewed-by: Nevenko Stupar <nevenko.stupar@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Daniel Sa <daniel.sa@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Check stream pointer is initialized before accessingSung Joon Kim1-4/+3
[why & how] We calculate static screen wait frames based on the current timing info in the active stream. If stream is not initialized, then we should skip the calculation and go with the default values. Reviewed-by: Gabe Teeger <gabe.teeger@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Sung Joon Kim <sungjoon.kim@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Export additional FAMS2 global configuration options from DMLDillon Varone7-95/+110
[WHY&HOW] Some global configuration options were previously hardcoded in DC, now they are exported by DML and sent to FW. Reviewed-by: Martin Leung <martin.leung@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Dillon Varone <dillon.varone@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Refactoring DWB related files from dcn30 FilesMudimela8-4/+10
[Why] To refactor DWB related files from dcn30 Files [How] Moved DWB related files from dcn30 to specific DWB folder and updated Makefiles to fix Compilation. Reviewed-by: Martin Leung <martin.leung@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Mudimela <lmudimel@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: add dmcub support checkFudongwang1-0/+3
[Why & How] For DCN harvest case, if there is no dmcub support, we should return false to avoid bugcheck later. Reviewed-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Fudongwang <fudong.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Increase array size of dummy_booleanAlex Hung1-1/+1
[WHY] dml2_core_shared_mode_support and dml_core_mode_support access the third element of dummy_boolean, i.e. hw_debug5 = &s->dummy_boolean[2], when dummy_boolean has size of 2. Any assignment to hw_debug5 causes an OVERRUN. [HOW] Increase dummy_boolean's array size to 3. This fixes 2 OVERRUN issues reported by Coverity. Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Check null pointers before multiple usesAlex Hung7-56/+76
[WHAT & HOW] Poniters, such as stream_enc and dc->bw_vbios, are null checked previously in the same function, so Coverity warns "implies that stream_enc and dc->bw_vbios might be null". They are used multiple times in the subsequent code and need to be checked. This fixes 10 FORWARD_NULL issues reported by Coverity. Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Check null pointers before usedAlex Hung8-14/+17
[WHAT & HOW] Poniters, such as dc->clk_mgr, are null checked previously in the same function, so Coverity warns "implies that "dc->clk_mgr" might be null". As a result, these pointers need to be checked when used again. This fixes 10 FORWARD_NULL issues reported by Coverity. Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Check link_res->hpo_dp_link_enc before using itAlex Hung1-0/+7
[WHAT & HOW] Functions dp_enable_link_phy and dp_disable_link_phy can pass link_res without initializing hpo_dp_link_enc and it is necessary to check for null before dereferencing. This fixes 2 FORWARD_NULL issues reported by Coverity. Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Add P-State Keepout to dcn401 Global SyncDillon Varone20-13/+83
[WHY&HOW] OTG has new functionality to allow P-State relative to VStartup. Keepout region for this should be configured based on DML outputs same as other global sync params. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Dillon Varone <dillon.varone@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: remove dc dependencies from SPL librarySamson Tam17-432/+1646
[Why] Make SPL library dc-independent so it can be reused by other components [How] Create separate set of fixed31_32 calls in SPL Make all inputs and outputs to SPL use primitive types For ratios and inits, return as uint32 from SPL. So add conversion from uint32 back to fixed point in SPL-to-dc translate function Reviewed-by: Relja Vojvodic <relja.vojvodic@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Samson Tam <samson.tam@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Issue with 3 or more mcaches per surfaceNevenko Stupar1-11/+11
[Why & How] Current logic in mcache admissibility check has flaw if calculated number of maches are 3 or more per surface, so sometimes the check may pass when it should fail, and sometimes may fail when it should pass, fix the issue and also adding additional check to make sure that required number of mcaches per surface cannot be higher than number of pipes + 1, used on that surface. Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Nevenko Stupar <nevenko.stupar@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Calculate ODM width using odm slice rect, not recoutAlvin Lee1-4/+4
[Description] There are scenarios where ODM4:1 is used but the surface is entirely outside of the first and last ODM slice. In this case the recout.width for the first and last slice is 0 because there's no overlap with the surface and that ODM slice, but this causes the x_pos for the cursor in this scenario to be calculated incorrectly. Instead we should use the ODM slice width instead of the recout width. Reviewed-by: Nevenko Stupar <nevenko.stupar@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Add blanked streams override to DML2.1Dillon Varone1-0/+7
[WHY] DML2.1 currently has no concept of a "blanked" stream. For cases like DPMS off, things like UCLK p-state is always allowed, so PMO is not required to optimize for it. [HOW] Add flag to DML2.1 display configuration to indicate all streams are blanked, so certain operations and optimizations can be skipped for optimal programming when displays are blanked. Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Dillon Varone <dillon.varone@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Fix VRR cannot enableTom Chung1-21/+2
[Why] Sometimes the VRR cannot enable after login to the desktop. User space may call the DRM_IOCTL_MODE_GETCONNECTOR right after the DRM_IOCTL_MODE_RMFB. After calling DRM_IOCTL_MODE_RMFB to remove all the frame buffer and it will cause the driver to disable the crtc and disable the link while calling the link_set_dpms_off(). It will cause the dpcd read failed in amdgpu_dm_update_freesync_caps() while try to get the DP_MSA_TIMING_PAR_IGNORED capability and think the sink side does not support VRR. [How] Use the dpcd_caps.allow_invalid_MSA_timing_param flag instead of reading from dpcd directly. dpcd_caps.allow_invalid_MSA_timing_param flag is updated during HPD. It is safe to replace the original method. Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Refactoring MPCMounika Adhuri10-5/+30
[Why] To refactor MPC files [How] Moved MPC files to respective folders and updated makefiles appropriately. Reviewed-by: Martin Leung <martin.leung@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Mounika Adhuri <moadhuri@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: DML2.1 resynchronizationChaitanya Dhere43-1669/+566
July update for DML2.1 library from hardware team targeting DCN401 Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Do 1-to-1 mapping between OPP and DSC in DML2Sung Joon Kim1-1/+1
[why] To determine which block instance to power-gate, we look at the available pipe resource for both plane and stream. On MPO, DSC3 was falsely powered on even though only 1 stream path was enabled because the resource mapping was not done correctly. [how] Acquire the correct DSC instance to power on / off based on the instance of OPP which determines the backend pipe index. Reviewed-by: Swapnil Patel <swapnil.patel@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Sung Joon Kim <sungjoon.kim@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Refactoring MMHUBBUBRevalla Hari Krishna4-1/+10
[Why] To refactor MMHUBBUB files [How] Moved mmhubbub files from dcn20 to /mmhubbub/ folder and update makefile to fix compilation. Reviewed-by: Martin Leung <martin.leung@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Revalla Hari Krishna <harikrishna.revalla@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Deallocate DML memory if allocation failsChris Park1-2/+8
[Why] When DC state create DML memory allocation fails, memory is not deallocated subsequently, resulting in uninitialized structure that is not NULL. [How] Deallocate memory if DML memory allocation fails. Reviewed-by: Joshua Aberback <joshua.aberback@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Chris Park <chris.park@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Check stream before comparing themAlex Hung1-0/+2
[WHAT & HOW] amdgpu_dm can pass a null stream to dc_is_stream_unchanged. It is necessary to check for null before dereferencing them. This fixes 1 FORWARD_NULL issue reported by Coverity. Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Check null pointers before using themAlex Hung1-4/+8
[WHAT & HOW] These pointers are null checked previously in the same function, indicating they might be null as reported by Coverity. As a result, they need to be checked when used again. This fixes 3 FORWARD_NULL issue reported by Coverity. Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Pass non-null to dcn20_validate_apply_pipe_split_flagsAlex Hung2-2/+4
[WHAT & HOW] "dcn20_validate_apply_pipe_split_flags" dereferences merge, and thus it cannot be a null pointer. Let's pass a valid pointer to avoid null dereference. This fixes 2 FORWARD_NULL issues reported by Coverity. Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Check phantom_stream before it is usedAlex Hung1-0/+3
dcn32_enable_phantom_stream can return null, so returned value must be checked before used. This fixes 1 NULL_RETURNS issue reported by Coverity. Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Check null-initialized variablesAlex Hung1-3/+4
[WHAT & HOW] drr_timing and subvp_pipe are initialized to null and they are not always assigned new values. It is necessary to check for null before dereferencing. This fixes 2 FORWARD_NULL issues reported by Coverity. Reviewed-by: Nevenko Stupar <nevenko.stupar@amd.com> Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Initialize denominators' default to 1Alex Hung3-4/+4
[WHAT & HOW] Variables used as denominators and maybe not assigned to other values, should not be 0. Change their default to 1 so they are never 0. This fixes 10 DIVIDE_BY_ZERO issues reported by Coverity. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Refactoring OPPRevalla Hari Krishna7-2/+17
[Why] To refactor OPP files [How] Moved opp related files to specific opp folder and updated Makefiles. Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Revalla Hari Krishna <harikrishna.revalla@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Fix DP-DVI dongle hotplugGabe Teeger1-4/+1
[why] Hotplugging with a DVI-DP dongle on pre-rdna embedded platform working about half the time. The regression was found to be the setting of link->type here. [what] Reverts fix besides the logging added. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Gabe Teeger <gabe.teeger@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Disable subvp based on HW cursor requirementAlvin Lee3-1/+11
[Description] - There are situations where HW cursor is required - In these scenarios we should disable subvp based on the HW cursor requirement Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: When resync fifo ensure to use correct pipe ctxAlvin Lee6-12/+30
We resync the FIFO after each pipe update in apply_ctx_to_hw. However, this means that some pipes (in hardware) are based on the new context and some are based on the current_state (since the pipes are updated on at a time). In this case we must ensure to use the pipe_ctx that's currently still configured in hardware when turning off / on OTG's and reconfiguring ODM during the resync. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Add option to allow transition when odm is forcedSridevi Arvindekar2-1/+8
Added option to allow transition for forced odm. Add the variation to the nightly run. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Sridevi Arvindekar <sarvinde@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: avoid disable otg when dig was disabledJingwen Zhu3-3/+25
[Why] This is a workaround for an dcn3.1 hang that happens if otg dispclk is ramped while otg is on and stream enc is off. But this w/a should not trigger when we have a dig active. [How] Avoid disable otg when dig FE/BE FIFO was not switched. Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Jingwen Zhu <jingwen.zhu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Implement bias and scale pre sclRelja Vojvodic7-14/+43
why: New scaler needs the input to be full range color space. This will also fix issues that come up due to not having a predefined limited color space matrix for certain color spaces how: Use bias and scale HW to expand the range of limited color spaces to full before the scaler Reviewed-by: Krunoslav Kovac <krunoslav.kovac@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Relja Vojvodic <relja.vojvodic@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: apply vmin optimization even if it doesn't reach vmin levelWenjing Liu2-7/+20
[why] Based on power measurement result, in most cases when display clock is higher than Vmin display clock, lowering display clock using dynamic ODM will improve overall power consumption by 0 to 4 watts even if we can't reach Vmin. [how] Allow vmin optimization applied even if dispclk can't reach Vmin. Reviewed-by: Jun Lei <jun.lei@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: fix dscclk programming sequence on DCN401Wenjing Liu8-59/+58
[why] The mux to switch between refclk and dto_dsc_clk is non double buffered. However dto dsc clk's phase and modulo divider registers are currently configured as double buffered update. This causes a problem when we switch to use dto dsc clk and program phase and modulo in the same sequence. In this sequence dsc clk is switched to dto but the clock divider programming doesn't take effect until next frame. When we try to program DSCC registers, SMN bus will hang because dto dsc clk divider phase is set to 0. [how] Configure phase and modulo to take effect immediately. Always switch to dto dsc clk before DSC clock is unagted. Switch back to refclk after DSC clock is gated. Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Reviewed-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Revert "Check HDCP returned status"Alex Hung1-9/+9
This reverts commit 5d93060d430b359e16e7c555c8f151ead1ac614b due to a power consumption regression. Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Replace assert with error message in dp_retrieve_lttpr_cap()Roman Li1-1/+5
[Why] When assert in dp_retrieve_lttpr_cap() is hit, dmesg has traces like: RIP: 0010:dp_retrieve_lttpr_cap+0xcc/0x1a0 [amdgpu] Call Trace: <TASK> dp_retrieve_lttpr_cap+0xcc/0x1a0 [amdgpu] report_bug+0x1e8/0x240 handle_bug+0x46/0x80 link_detect+0x35/0x580 [amdgpu] It happens when LTTPRs fail to increment dpcd repeater count. We have a recovery action in place for such cases. Assert is misleading, an indicative error in dmesg is more useful. [How] Remove ASSERT and use DC_LOG_ERROR instead. Reviewed-by: Michael Strauss <michael.strauss@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Added logging for automated DPM testingRyan Seto7-57/+237
[Why] Added clock logs to automate DPM testing [How] Added logs and helper functions to output clocks Co-authored-by: Ryan Seto <ryanseto@amd.com> Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Ryan Seto <ryanseto@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: Don't consider cursor for no plane case in DML1Alvin Lee1-0/+2
[Description] For no plane scenarios we should not consider cursor as there cannot be any cursor if there's no planes. This fixes an issue where dc_commit_streams fails due to prefetch bandwidth requirements (the display config + dummy planes + cursor causes the prefetch bandwidth to exceed what is possible). Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-24drm/amd/display: quality improvements for EASF and ISHARPSamson Tam19-710/+3161
[Why] Update coefficients and LUT tables for scaler and sharpener to improve quality and support different use cases (SDR/HDR) [How] Move scaler coefficients to new file dc_spl_scl_easf_filters.c Remove older coefficients file dc_sp_scl_filters_old.c Update default taps for EASF support Update LLS policy for DON'T CARE case Update cositing offset from 0.5 to 0.25 Add support to adjust sharpness based on level, use case, and scaling ratio ( using discrete levels ) Apply sharpness to all RGB surfaces and both NV12 and P010 video ( in fullscreen only ). Upscale and 1:1 ratios only Enable scaler when sharpening 1:1 ratios Add support for coefficients that are in S1.10 format (convert to S1.12 format) Reviewed-by: Jun Lei <jun.lei@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Samson Tam <samson.tam@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-01 14:24:22 +0300