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2023-05-22drm/i915/pmu: Export counters from all tilesTvrtko Ursulin1-27/+55
Start exporting frequency and RC6 counters from all tiles. Existing counters keep their names and config values and new one use the namespace added in the previous patch, with the "-gtN" added to their names. Interrupts counter is an odd one off. Because it is the global device counters (not only GT) we choose not to add per tile versions for now. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Aravind Iddamsetty <aravind.iddamsetty@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230519154946.3751971-8-umesh.nerlige.ramappa@intel.com
2023-05-22drm/i915/pmu: Prepare for multi-tile non-engine countersTvrtko Ursulin2-44/+111
Reserve some bits in the counter config namespace which will carry the tile id and prepare the code to handle this. No per tile counters have been added yet. v2: - Fix checkpatch issues - Use 4 bits for gt id in non-engine counters. Drop FIXME. - Set MAX GTs to 4. Drop FIXME. v3: (Ashutosh, Tvrtko) - Drop BUG_ON that would never fire - Make enable u64 - Pull in some code from next patch v4: Set I915_PMU_MAX_GTS to 2 (Tvrtko) v5: s/u64/u32 where needed (Ashutosh) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230519154946.3751971-7-umesh.nerlige.ramappa@intel.com
2023-05-22drm/i915/pmu: Add reference counting to the sampling timerTvrtko Ursulin2-2/+14
We do not want to have timers per tile and waste CPU cycles and energy via multiple wake-up sources, for a relatively un-important task of PMU sampling, so keeping a single timer works well. But we also do not want the first GT which goes idle to turn off the timer. Add some reference counting, via a mask of unparked GTs, to solve this. v2: Drop the check for unparked in i915_sample (Ashutosh) v3: Revert v2 (Tvrtko) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230519154946.3751971-6-umesh.nerlige.ramappa@intel.com
2023-05-22drm/i915/pmu: Transform PMU parking code to be GT basedTvrtko Ursulin3-14/+15
Trivial prep work for full multi-tile enablement later. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230519154946.3751971-5-umesh.nerlige.ramappa@intel.com
2023-05-22drm/i915/pmu: Skip sampling engines with no enabled countersTvrtko Ursulin1-0/+3
As we have more and more engines do not waste time sampling the ones no- one is monitoring. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230519154946.3751971-4-umesh.nerlige.ramappa@intel.com
2023-05-22drm/i915/pmu: Support PMU for all enginesTvrtko Ursulin1-3/+10
Given how the metrics are already exported, we also need to run sampling over engines from all GTs. Problem of GT frequencies is left for later. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230519154946.3751971-3-umesh.nerlige.ramappa@intel.com
2023-05-22drm/i915/pmu: Change bitmask of enabled events to u32Tvrtko Ursulin1-8/+18
Having it as u64 was a confusing (but harmless) mistake. Also add some asserts to make sure the internal field does not overflow in the future. v2: Fix WARN_ON firing for INTERRUPT event (Umesh) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230519154946.3751971-2-umesh.nerlige.ramappa@intel.com
2023-05-22drm/nouveau/acr/ga102: set variable ga102_gsps storage-class-specifier to staticTom Rix1-1/+1
smatch reports drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c:49:1: warning: symbol 'ga102_gsps' was not declared. Should it be static? This variable is only used in its defining file, so it should be static Signed-off-by: Tom Rix <trix@redhat.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Signed-off-by: Karol Herbst <kherbst@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230517133112.873856-1-trix@redhat.com
2023-05-22drm/nouveau: constify pointers to hwmon_channel_infoKrzysztof Kozlowski1-1/+1
Statically allocated array of pointers to hwmon_channel_info can be made const for safety. Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Karol Herbst <kherbst@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230511175443.281970-1-krzysztof.kozlowski@linaro.org
2023-05-22drm/nouveau: dispnv50: fix missing-prototypes warningArnd Bergmann2-3/+2
nv50_display_create() is declared in another header, along with a couple of declarations that are now outdated: drivers/gpu/drm/nouveau/dispnv50/disp.c:2517:1: error: no previous prototype for 'nv50_display_create' Fixes: ba801ef068c1 ("drm/nouveau/kms: display destroy/init/fini hooks can be static") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Karol Herbst <kherbst@redhat.com> Signed-off-by: Karol Herbst <kherbst@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230417210329.2469722-1-arnd@kernel.org
2023-05-22drm: bridge: samsung-dsim: Implement support for clock/data polarity swapMarek Vasut1-1/+26
Implement support for DSI clock and data lane DN/DP polarity swap by means of decoding 'lane-polarities' DT property. The controller does support DN/DP swap of clock lane and all data lanes, the controller does not support polarity swap of individual data lane bundles, add a check which verifies all data lanes have the same polarity. This has been validated on an imx8mm board that actually has the MIPI DSI clock lanes inverted. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230514114625.98372-2-festevam@gmail.com
2023-05-22drm/i915: Support Async Flip on Linear buffersArun R Murthy1-0/+14
Starting from Gen12 Async Flip is supported on linear buffers. This patch enables support for async on linear buffer. UseCase: In Hybrid graphics, for hardware unsupported pixel formats it will be converted to linear memory and then composed. v2: Added use case v3: Added FIXME for ICL indicating the restrictions Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906041806.4095575-1-arun.r.murthy@intel.com
2023-05-22drm/panel: Add Samsung S6D7AA0 panel controller driverArtur Weber3-0/+593
Initial driver for S6D7AA0-controlled panels. Currently, the following panels are supported: - S6D7AA0-LSL080AL02 (Samsung Galaxy Tab 3 8.0) - S6D7AA0-LSL080AL03 (Samsung Galaxy Tab A 8.0 2015) - S6D7AA0-LTL101AT01 (Samsung Galaxy Tab A 9.7 2015) It should be possible to extend this driver to work with other panels using this IC. Tested-by: Nikita Travkin <nikita@trvn.ru> #ltl101at01 Signed-off-by: Artur Weber <aweber.kernel@gmail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230519170354.29610-3-aweber.kernel@gmail.com
2023-05-22drm/i915: constify pointers to hwmon_channel_infoKrzysztof Kozlowski1-2/+2
Statically allocated array of pointers to hwmon_channel_info can be made const for safety. Acked-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230511175446.282041-1-krzysztof.kozlowski@linaro.org
2023-05-20drm/display/dsc: add YCbCr 4:2:2 and 4:2:0 RC parametersDmitry Baryshkov1-0/+450
Include RC parameters for YCbCr 4:2:2 and 4:2:0 configurations. Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230517102807.2181589-9-dmitry.baryshkov@linaro.org Acked-by: Dave Airlie <airlied@redhat.com>
2023-05-20drm/display/dsc: include the rest of pre-SCR parametersDmitry Baryshkov1-0/+72
DSC model contains pre-SCR RC parameters for other bpp/bpc combinations, include them here for completeness. The values were generated from the 'pre_scr_cfg_files_for_reference' files found in DSC models 20210623. The same fileset is a part of DSC model 20161212. Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230517102807.2181589-8-dmitry.baryshkov@linaro.org Acked-by: Dave Airlie <airlied@redhat.com>
2023-05-20drm/display/dsc: split DSC 1.2 and DSC 1.1 (pre-SCR) parametersDmitry Baryshkov2-26/+123
The array of rc_parameters contains a mixture of parameters from DSC 1.1 and DSC 1.2 standards. Split these tow configuration arrays in preparation to adding more configuration data. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Suraj Kandpal Reviewed-by: Suraj Kandpal Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230517102807.2181589-7-dmitry.baryshkov@linaro.org Acked-by: Dave Airlie <airlied@redhat.com>
2023-05-20drm/display/dsc: use flat array for rc_parameters lookupDmitry Baryshkov1-120/+108
Next commits are going to add support for additional RC parameter lookup tables. These tables are going to use different bpp/bpc combinations, thus it makes little sense to keep the 2d array for RC parameters. Switch to using the flat array. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230517102807.2181589-6-dmitry.baryshkov@linaro.org Acked-by: Dave Airlie <airlied@redhat.com>
2023-05-20drm/i915/dsc: stop using interim structure for calculated paramsDmitry Baryshkov1-74/+26
Stop using an interim structure rc_parameters for storing calculated params and then setting drm_dsc_config using that structure. Instead put calculated params into the struct drm_dsc_config directly. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230517102807.2181589-5-dmitry.baryshkov@linaro.org
2023-05-20drm/i915/dsc: move DSC tables to DRM DSC helperDmitry Baryshkov2-312/+379
Move DSC RC tables to DRM DSC helper. No additional code changes and/or cleanups are a part of this commit, it will be cleaned up in the followup commits. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230517102807.2181589-4-dmitry.baryshkov@linaro.org Acked-by: Dave Airlie <airlied@redhat.com>
2023-05-20drm/i915/dsc: move rc_buf_thresh values to common helperDmitry Baryshkov2-23/+36
The rc_buf_thresh values are common to all DSC implementations. Move them to the common helper together with the code to propagate them to the drm_dsc_config. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230517102807.2181589-3-dmitry.baryshkov@linaro.org Acked-by: Dave Airlie <airlied@redhat.com>
2023-05-20drm/i915/dsc: change DSC param tables to follow the DSC modelDmitry Baryshkov1-2/+20
After cross-checking DSC models (20150914, 20161212, 20210623) change values in rc_parameters tables to follow config files present inside the DSC model. Handle two places, where i915 tables diverged from the model, by patching the rc values in the code. Note: I left one case uncorrected, 8bpp/10bpc/range_max_qp[0], because the table in the VESA DSC 1.1 sets it to 4. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230517102807.2181589-2-dmitry.baryshkov@linaro.org
2023-05-20drm/i915: Fix memory leaks in function live_nop_switchCong Liu1-6/+8
Be sure to properly free the allocated memory before exiting the live_nop_switch function. Signed-off-by: Cong Liu <liucong2@kylinos.cn> Suggested-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230517050204.4111874-1-liucong2@kylinos.cn
2023-05-19drm/i915/hdmi: C20 computed PLL frequenciesClint Taylor2-6/+137
Use algorithm to generate HDMI C20 PLL clock frequencies. v2: checkpatch fixes BSPEC: 64568 Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Cc: Mika Kahola <mika.kahola@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com> [mattrope: Wrapped one overly long line] Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230515231725.3815199-3-clinton.a.taylor@intel.com
2023-05-19drm/i915: Add 16bit register/mask operatorsClint Taylor1-0/+48
Add the support macros to define/extract bits as 16bits. v2: checkpatch fixes Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230515231725.3815199-2-clinton.a.taylor@intel.com
2023-05-19drm/sched: Rename to drm_sched_wakeup_if_can_queue()Luben Tuikov2-5/+5
Rename drm_sched_wakeup() to drm_sched_wakeup_if_canqueue() since the former is misleading, as it wakes up the GPU scheduler _only if_ more jobs can be queued to the underlying hardware. This distinction is important to make, since the wake conditional in the GPU scheduler thread wakes up when other conditions are also true, e.g. when there are jobs to be cleaned. For instance, a user might want to wake up the scheduler only because there are more jobs to clean, but whether we can queue more jobs is irrelevant. v2: Separate "canqueue" to "can_queue". (Alex D.) Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Link: https://lore.kernel.org/r/20230517233550.377847-2-luben.tuikov@amd.com Reviewed-by: Alex Deucher <Alexander.Deucher@amd.com>
2023-05-19drm/sched: Rename to drm_sched_can_queue()Luben Tuikov1-5/+4
Rename drm_sched_ready() to drm_sched_can_queue(). "ready" can mean many things and is thus meaningless in this context. Instead, rename to a name which precisely conveys what is being checked. Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Reviewed-by: Alex Deucher <Alexander.Deucher@amd.com> Link: https://lore.kernel.org/r/20230517233550.377847-1-luben.tuikov@amd.com
2023-05-19Merge tag 'drm-misc-next-2023-05-11' of ↵Dave Airlie108-1358/+2295
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 6.5: UAPI Changes: Cross-subsystem Changes: - arch: Consolidate <asm/fb.h> Core Changes: - aperture: Ignore firmware framebuffers with non-primary devices - fbdev: Use fbdev's I/O helpers - sysfs: Expose DRM connector ID - tests: More tests for drm_rect Driver Changes: - armada: Implement fbdev emulation as a client - bridge: - fsl-ldb: Support i.MX6SX - lt9211: Remove blanking packets - lt9611: Remove blanking packets - tc358768: Implement input bus formats reporting, fix various timings and clocks settings - ti-sn65dsi86: Implement wait_hpd_asserted - nouveau: Improve NULL pointer checks before dereference - panel: - nt36523: Support Lenovo J606F - st7703: Support Anbernic RG353V-V2 - new panels: InnoLux G070ACE-L01 - sun4i: Fix MIPI-DSI dotclock - vc4: RGB Range toggle property, BT601 and BT2020 support for HDMI - vkms: Convert to drmm helpers, Add reflection and rotation support Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/2pxmxdzsk2ekjy6xvbpj67zrhtwvkkhfspuvdm5pfm5i54hed6@sooct7yq6z4w
2023-05-18drm/i915/mtl: Extend Wa_16014892111 to MTL A-stepRadhakrishna Sripada1-1/+3
Like DG2, MTL a-step hardware is subject to Wa_16014892111 which requires that any changes made to the DRAW_WATERMARK register be done via an INDIRECT_CTX batch buffer rather than through a regular context workaround. The bspec gives the same non-default recommended tuning value for DRAW_WATERMARK as DG2, so we can re-use the INDIRECT_CTX code to apply that tuning setting on A-step hardware. Application of the tuning setting on B-step and later does not need INDIRECT_CTX handling and is already done in mtl_ctx_workarounds_init() as usual. v2: Limit the WA for A-step v3: Update the commit message. v4: Reorder platform checks and update commit message. Bspec: 68331 Cc: Haridhar Kalvala <haridhar.kalvala@intel.com> Cc: Gustavo Sousa <gustavo.sousa@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230517233111.297542-2-radhakrishna.sripada@intel.com
2023-05-18drm/i915/mtl: Add MTL performance tuning changesRadhakrishna Sripada1-1/+22
MTL reuses the tuning parameters for DG2. Extend the dg2 performance tuning parameters to MTL. v2: Add DRAW_WATERMARK tuning parameter. v3: Limit DRAW_WATERMARK tuning to non A0 step. v4: Reorder platform checks. Restrict Blend fill caching optimization to Render GT. v5: Move mtl tuning params to its own function Bspec: 68331 Cc: Haridhar Kalvala <haridhar.kalvala@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230517233111.297542-1-radhakrishna.sripada@intel.com
2023-05-18drm/i915/mtl: do not enable render power-gating on MTLAndrzej Hajda1-2/+8
Multiple CI tests fails with forcewake ack timeouts if render power gating is enabled. BSpec 52698 states it should be 0 for MTL, but apparently this info is outdated. Anyway since the patch makes MTL pass basic tests added FIXME tag informing this is temporary workaround. v2: added FIXME tag Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4983 Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230517-mtl_disable_render_pg-v2-1-0b51180a43f0@intel.com
2023-05-18drm/i915/mtl: Fix expected reg value for Thunderbolt PLL disablingMika Kahola1-3/+1
While disabling Thunderbolt PLL, we request PLL to be stopped and wait for ACK bit to be cleared. The expected value should be '0' instead of '~XELPDP_TBT_CLOCK_ACK' or otherwise we incorrectly receive dmesg warn "PHY PLL not unlocked in 10us". Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230512120003.587360-1-mika.kahola@intel.com
2023-05-18fbdev: Rename fb_mem*() helpersThomas Zimmermann8-10/+10
Update the names of the fb_mem*() helpers to be consistent with their regular counterparts. Hence, fb_memset() now becomes fb_memset_io(), fb_memcpy_fromfb() now becomes fb_memcpy_fromio() and fb_memcpy_tofb() becomes fb_memcpy_toio(). No functional changes. v6: * update new file fb_io_fops.c Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Sui Jingfeng <suijingfeng@loongson.cn> Link: https://patchwork.freedesktop.org/patch/msgid/20230512102444.5438-8-tzimmermann@suse.de
2023-05-18fbdev: Include <linux/fb.h> instead of <asm/fb.h>Thomas Zimmermann3-4/+1
Replace include statements for <asm/fb.h> with <linux/fb.h>. Fixes the coding style: if a header is available in asm/ and linux/, it is preferable to include the header from linux/. This only affects a few source files, most of which already include <linux/fb.h>. Suggested-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Sui Jingfeng <suijingfeng@loongson.cn> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230512102444.5438-6-tzimmermann@suse.de
2023-05-18fbdev: Include <linux/io.h> in various driversThomas Zimmermann3-0/+5
The code uses writel() and similar I/O-memory helpers. Include the header file to get the declarations. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Sui Jingfeng <suijingfeng@loongson.cn> Link: https://patchwork.freedesktop.org/patch/msgid/20230512102444.5438-5-tzimmermann@suse.de
2023-05-18ipu-v3: Include <linux/io.h>Thomas Zimmermann1-0/+1
The code uses readl() and writel(). Include the header file to get the declarations. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Sui Jingfeng <suijingfeng@loongson.cn> Link: https://patchwork.freedesktop.org/patch/msgid/20230512102444.5438-4-tzimmermann@suse.de
2023-05-18fbdev/matrox: Remove trailing whitespacesThomas Zimmermann2-5/+5
Fix coding style. No functional changes. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Sui Jingfeng <suijingfeng@loongson.cn> Tested-by: Sui Jingfeng <suijingfeng@loongson.cn> Link: https://patchwork.freedesktop.org/patch/msgid/20230512102444.5438-3-tzimmermann@suse.de
2023-05-18fbdev/hitfb: Cast I/O offset to addressThomas Zimmermann1-53/+69
Cast I/O offsets to pointers to use them with I/O functions. The I/O functions expect pointers of type 'volatile void __iomem *', but the offsets are plain integers. Build warnings are ../drivers/video/fbdev/hitfb.c: In function 'hitfb_accel_wait': ../arch/x86/include/asm/hd64461.h:18:33: warning: passing argument 1 of 'fb_readw' makes pointer from integer without a cast [-Wint-conversion] 18 | #define HD64461_IO_OFFSET(x) (HD64461_IOBASE + (x)) | ^~~~~~~~~~~~~~~~~~~~~~ | | | unsigned int ../arch/x86/include/asm/hd64461.h:93:33: note: in expansion of macro 'HD64461_IO_OFFSET' 93 | #define HD64461_GRCFGR HD64461_IO_OFFSET(0x1044) /* Accelerator Configuration Register */ | ^~~~~~~~~~~~~~~~~ ../drivers/video/fbdev/hitfb.c:47:25: note: in expansion of macro 'HD64461_GRCFGR' 47 | while (fb_readw(HD64461_GRCFGR) & HD64461_GRCFGR_ACCSTATUS) ; | ^~~~~~~~~~~~~~ In file included from ../arch/x86/include/asm/fb.h:15, from ../include/linux/fb.h:19, from ../drivers/video/fbdev/hitfb.c:22: ../include/asm-generic/fb.h:52:57: note: expected 'const volatile void *' but argument is of type 'unsigned int' 52 | static inline u16 fb_readw(const volatile void __iomem *addr) | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~ This patch only fixes the build warnings. It's not clear if the I/O offsets can legally be passed to the I/O helpers. It was apparently broken in 2007 when custom inw()/outw() helpers got removed by commit 34a780a0afeb ("sh: hp6xx pata_platform support."). Fixing the driver would require setting the I/O base address. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202305102136.eMjTSPwH-lkp@intel.com/ Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Cc: Artur Rojek <contact@artur-rojek.eu> Acked-by: Helge Deller <deller@gmx.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230512102444.5438-2-tzimmermann@suse.de
2023-05-18drm/i915/guc/slpc: Disable rps_boost debugfsVinay Belgaumkar2-1/+6
rps_boost debugfs shows host turbo related info. This is not valid when SLPC is enabled. guc_slpc_info already shows the number of boosts. Add num_waiters there as well and disable rps_boost when SLPC is enabled. v2: Replace Bug with Link to resolve checkpatch warning Link: https://gitlab.freedesktop.org/drm/intel/-/issues/7632 Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230516154905.1048006-1-vinay.belgaumkar@intel.com
2023-05-17drm/bridge: tc358767: Switch to devm MIPI-DSI helpersAlexander Stein1-2/+2
DSI device registering and attaching needs to be undone upon deregistration. This fixes module unload/load. Fixes: bbfd3190b656 ("drm/bridge: tc358767: Add DSI-to-DPI mode support") Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Robert Foss <rfoss@kernel.org> Signed-off-by: Robert Foss <rfoss@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230517122107.1766673-1-alexander.stein@ew.tq-group.com
2023-05-17Merge drm/drm-next into drm-intel-nextRodrigo Vivi5804-128618/+347813
Backmerge to get some hwmon dependencies. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2023-05-17drm/i915: tweak language in fastset pipe config compare loggingJani Nikula1-5/+10
The "fastset mismatch" debug logging has been slightly confusing, leading people to believe some error happened. Change it to the more informative "fastset requirement not met", and add a final message about this leading to full modeset. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230516094406.2675307-1-jani.nikula@intel.com
2023-05-17drm/ttm: let struct ttm_device_funcs be placed in rodataJani Nikula1-1/+1
Make the struct ttm_device_funcs pointers const so the data can be placed in rodata. Cc: Christian Koenig <christian.koenig@amd.com> Cc: Huang Rui <ray.huang@amd.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230309123700.528641-1-jani.nikula@intel.com
2023-05-17drm/i915: fix intel_display_irq.c include orderJani Nikula1-8/+8
I meant to sort the includes before submitting commit 2b874a027810 ("drm/i915/irq: split out display irq handling") but forgot, and it wasn't noticed in review either. Sort the includes. Cc: Gustavo Sousa <gustavo.sousa@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230516122926.2720581-1-jani.nikula@intel.com
2023-05-17drm/drm_atomic_helper.c: fix a typoSui Jingfeng1-1/+1
Signed-off-by: Sui Jingfeng <suijingfeng@loongson.cn> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230517041602.3225325-1-suijingfeng@loongson.cn
2023-05-16drm/i915/guc: Dump error capture to dmesg on CTB errorJohn Harrison2-0/+59
In the past, There have been sporadic CTB failures which proved hard to reproduce manually. The most effective solution was to dump the GuC log at the point of failure and let the CI system do the repro. It is preferable not to dump the GuC log via dmesg for all issues as it is not always necessary and is not helpful for end users. But rather than trying to re-invent the code to do this each time it is wanted, commit the code but for DEBUG_GUC builds only. v2: Use IS_ENABLED for testing config options. Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230418181744.3251240-3-John.C.Harrison@Intel.com
2023-05-16drm/i915: Dump error capture to kernel logJohn Harrison2-0/+142
This is useful for getting debug information out in certain situations, such as failing kernel selftests and CI runs that don't log error captures. It is especially useful for things like retrieving GuC logs as GuC operation can't be tracked by adding printk or ftrace entries. v2: Add CONFIG_DRM_I915_DEBUG_GEM wrapper (review feedback by Rodrigo). Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230418181744.3251240-2-John.C.Harrison@Intel.com
2023-05-16drm/panel: Modify innolux hj110iz panel initial codeCong Yang1-162/+235
There is a problem of screen shake on the old panel. So increase the panel GOP component pull-down circuit size in hardware, and update the initialization code at the same time. The new initialization code mainly modifles the following. a)adjusted for GOP timing. When Display sleep in, raise all GOP signals to VGHO and then drop to GND. b)Increased the Vertical back Porch and Vertical pulse width, so need to update vsync_end and vtotal and CLK in drm_display_mode. Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> [dianders: fixed spelling mistake in subject] Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230509025153.1321446-1-yangcong5@huaqin.corp-partner.google.com
2023-05-16drm/i915/tc: Reset TypeC PHYs left enabled in DP-alt mode after the sink ↵Imre Deak6-25/+265
disconnects If the output on a DP-alt link with its sink disconnected is kept enabled for too long (about 20 sec), then some IOM/TCSS firmware timeout will cause havoc on the PCI bus, at least for other GFX devices on it which will stop powering up. Since user space is not guaranteed to do a disabling modeset in time, switch such disconnected but active links to TBT mode - which is without such shortcomings - with a 2 second delay. If the above condition is detected already during the driver load/system resume sanitization step disable the output instead, as at that point no user space or kernel client depends on a consistent output state yet and because subsequent atomic modeset on such connectors - without the actual sink capabilities available - can fail. An active/disconnected port as above will also block the HPD status of other active/disconnected ports to get updated (stuck in the connected state), until the former port is disabled, its PHY is disconnected and a ~10 ms delay has elapsed. This means the link state for all TypeC ports/CRTCs must be rechecked after a CRTC is disabled due to the above reason. For this disconnect the PHY synchronously after the CRTC/port is disabled and recheck all CRTCs for the above condition whenever such a port is disabled. To account for a race condition during driver loading where the sink is disconnected after the above sanitization step and before the HPD interrupts get enabled, do an explicit check/link reset if needed from the encoder's late_register hook, which is called after the HPD interrupts are enabled already. v2: - Handle an active/disconnected port blocking the HPD state update of another active/disconnected port. - Cancel the delayed work resetting the link also from the encoder enable/suspend/shutdown hooks. - Rebase on the earlier intel_modeset_lock_ctx_retry() addition, fixing here the missed atomic state reset in case of a retry. - Fix handling of an error return from intel_atomic_get_crtc_state(). - Recheck if the port needs to be reset after all the atomic state is locked and async commits are waited on. v3: - Add intel_crtc_needs_link_reset(), instead of open-coding it, keep intel_crtc_has_encoders(). (Ville) - Fix state dumping and use a bitmask to track disabled CRTCs in intel_sanitize_all_crtcs(). (Ville) - Set internal in intel_atomic_state right after allocating it. (Ville) - Recheck all CRTCs (not yet force-disabled) after a CRTC is force-disabled for any reason (not only due to a link state) in intel_sanitize_all_crtcs(). - Reduce delay after CRTC disabling to 20ms, and use the simpler msleep(). - Clarify code comment about HPD behaviour in intel_sanitize_all_crtcs(). - Move all the TC link reset logic to intel_tc.c . - Cancel the link reset work synchronously during system suspend, driver unload and shutdown. v4: - Rebased on previous patch, which allows calling the TC port suspend/cleanup handlers without modeset locks held; remove the display driver suspended assert from the link reset work accordingly. v5: (Ville) - Remove reset work canceling from intel_ddi_pre_pll_enable(). - Track a crtc vs. pipe mask in intel_sanitize_all_crtcs(). - Add reset_link_commit() to clarify the intel_modeset_lock_ctx_retry loop. Cc: Kai-Heng Feng <kai.heng.feng@canonical.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: Kai-Heng Feng <kai.heng.feng@canonical.com> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5860 Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230512195513.2699-2-imre.deak@intel.com
2023-05-16drm/i915/tc: Call TypeC port flush_work/cleanup without modeset locks heldImre Deak3-14/+41
Call the TypeC port flush_work and cleanup handlers without the modeset locks held. These don't require the locks, as the work takes - as it should be able to at any point in time - any locks it needs and by the time cleanup is called and after cleanup returns the encoder is not in use. This is required by the next patch canceling a TypeC port work synchronously during encoder suspend and shutdown, where the work can take modeset locks as well, hence the canceling must be done without holding the locks. I also considered moving the modeset locking down to each encoder suspend()/shutdown() hook instead, however locking the full modeset state for each encoder separately would be odd, and the bigger change - affecting all encoders - is beyond the scope of this patchset. v2: - Add a TODO: comment to remove modeset locks if no encoder depends on this. (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230512195513.2699-1-imre.deak@intel.com
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-24 19:56:45 +0300