Age | Commit message (Collapse) | Author | Files | Lines |
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The jh7110 pll0 is fixed for cpufreq,
so we should change the cpu_core clock directly.
Remove the pll0 & osc clock.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
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add pm ops for rtc
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
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So i2c will be initialized after uart.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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Uncomment the system pm and runtime pm ops functions. Restore
the Synopsys DesignWare i2c driver to the original version.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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fix up system pm error and add runtime pm
Signed-off-by: shanlong.li <shanlong.li@starfivetech.com>
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add system pm for rtc
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
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add runtime pm and system pm ops
Signed-off-by: ys <eason.xiong@starfivetech.com>
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add sec runtime PM ops.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
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modify SDIO/EMMC runtime PM callback function.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
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modify runtime PM callback function.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
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Add runtime and system pm in isp clock tree driver.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
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Because it causes error when system pm.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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reset execute permissions for FILE: drivers/hwmon/sfctemp.c
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
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add device pm for temp sensor
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
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add device pm for trng
Signed-off-by: Ziv.Xu <Ziv.Xu@starfivetech.com>
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add device pm for spi
Signed-off-by: Ziv.Xu <Ziv.Xu@starfivetech.com>
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add SDIO/EMMC runtime pm ops.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
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add canfd runtime PM ops.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
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Add system/runtime pm ops functions and enable runtime pm.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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Support system pm fuction when suspend and resume.
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
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add system pm for watchdog
Signed-off-by: Ziv.Xu <Ziv.Xu@starfivetech.com>
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add runtime pm for watchdog
Signed-off-by: Ziv.Xu <Ziv.Xu@starfivetech.com>
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add starfive pm supend/resume and runtime pm runtime
suspend and resume ops
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
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Because of the limitation of hardware design, only enable/disable clk here.
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
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Used PLDA link up/down status in probe to indicate the slot situations.
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
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Remove hardware operations in vin init, hardware operation need turn on
power domain.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
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Delete operate isp noc bus clock in vin module.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
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Vin module get reset use share due to the same reset single with isp
clock module.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
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Fixed vin line stream_out not change except WR.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
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VIN driver use pm save power, delete turn on pmu multiple times
and modify isp clk and reset after turn on pmu.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
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Correct some code.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
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Delete the control direct control register and correct some code.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
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Use runtime/system pm save power.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
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Separate set stream and runtime PM, use runtime PM.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
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Switch to using runtime PM for power management.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
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delete read chip id in set power on.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
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The intent is to use a genpd governor when there are some states that needs
to be managed. Although, the current code ends up to never assign a
governor, let's fix this.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
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The riscv-sbi driver compatible string should not
changed to starfive since it's a common driver
for riscv.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
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Count PLL1 rate through reading syscon registers.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
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Change PLL0 rate to 1.5GHz and change cpu_core divider.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
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Cr 2285 sec jiajie.ho
See merge request sdk/linux!533
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Cr 2261 can 515 william.qiu
See merge request sdk/linux!521
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CR_2141:crypto:starfive: Enhanced AES driver to handle negative cases
See merge request sdk/linux!517
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CR_1861_515_HDMI_AUDIO_Xingyu.Wu
See merge request sdk/linux!526
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Updating Starfive Jh7110 Crypto hardware engine
to use orginal ARM PL08X driver.
Signed-off-by: jiajie.ho <jiajie.ho@starfivetech.com>
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Could playback audio through HDMI.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
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modify some data field and clock frequency
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
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1. Added input text length check for ECB and CBC mode.
2. Added input IV check for CCM mode.
3. Removed unnecessary zero data check.
4. Updated functions to return proper error codes.
Signed-off-by: jiajie.ho <jiajie.ho@starfivetech.com>
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Vout and isp domain can not be disabled during clock tree
is running probe function. This bug has been fixed.
Signed-off-by: Walker Chen <walker.chen@linux.starfivetech.com>
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CR_1849_DMA_walker.chen
See merge request sdk/linux!483
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