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2017-06-20clk: mvebu: cp110: Minor cleanupsStephen Boyd1-3/+2
2017-06-20Merge branch 'clk-cp110' of git://git.infradead.org/linux-mvebu into clk-nextStephen Boyd1-62/+138
2017-06-20clk: socfpga: Fix the smplsel on Arria10 and Stratix10Dinh Nguyen2-1/+4
2017-06-20clk: Hi3660: register fixed_rate_clks with CLK_OF_DECLARE_DRIVERLeo Yan1-10/+38
2017-06-19clk: mvebu: cp110: add sdio clock to cp-110 system controllerKonstantin Porotchkin1-5/+23
2017-06-19clk: mvebu: cp110: introduce a new bindingGregory CLEMENT1-15/+48
2017-06-19clk: mvebu: cp110: do not depend anymore of the *-clock-output-namesGregory CLEMENT1-40/+65
2017-06-17Merge tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson into ...Stephen Boyd4-19/+25
2017-06-17Merge branch 'for-4.13-ti-clkctrl' of https://github.com/t-kristo/linux-pm in...Stephen Boyd4-1/+1193
2017-06-17clk: sunxi-ng: Staticize ccu_mux_helper_unapply_prediv()Stephen Boyd1-1/+1
2017-06-17Merge tag 'sunxi-clk-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel...Stephen Boyd22-269/+1572
2017-06-16clk: meson: gxbb: add all clk81 parentsJerome Brunet1-5/+8
2017-06-16Merge branch 'next/headers' into next/driversJerome Brunet1-10/+10
2017-06-15clk: ti: omap4: add clkctrl clock dataTero Kristo3-0/+670
2017-06-15clk: ti: add support for clkctrl clocksTero Kristo3-1/+523
2017-06-15Merge branch 'clk-fixes' into clk-nextStephen Boyd5-4/+9
2017-06-15Merge tag 'sunxi-clk-fixes-for-4.12' of https://git.kernel.org/pub/scm/linux/...Stephen Boyd5-4/+9
2017-06-14Merge tag 'clk-v4.13-samsung' of git://git.kernel.org/pub/scm/linux/kernel/gi...Stephen Boyd10-216/+235
2017-06-14Merge tag 'v4.13-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/...Stephen Boyd7-66/+735
2017-06-14clk: keystone: Add sci-clk driver supportTero Kristo5-9/+743
2017-06-12clk: meson: meson8b: add compatibles for Meson8 and Meson8m2Martin Blumenstingl2-4/+7
2017-06-12clk: meson8b: export the ethernet gate clockMartin Blumenstingl1-1/+1
2017-06-12clk: meson8b: export the USB clocksMartin Blumenstingl1-5/+5
2017-06-12clk: meson8b: export the gate clock for the HW random number generatorMartin Blumenstingl1-1/+1
2017-06-12clk: meson8b: export the SDIO clockMartin Blumenstingl1-1/+1
2017-06-12clk: meson8b: export the SAR ADC clocksMartin Blumenstingl1-2/+2
2017-06-09clk: samsung: exynos542x: Add EPLL rate tableSylwester Nawrocki1-2/+17
2017-06-09clk: samsung: Add missing exynos5420 audio related clocksSylwester Nawrocki1-3/+7
2017-06-09clk: samsung: Add enable/disable operation for PLL36XX clocksSylwester Nawrocki1-37/+50
2017-06-09clk: samsung: s5pv210-audss: Convert to the new clk_hw APIMarek Szyprowski1-25/+27
2017-06-09clk: samsung: exynos-clkout: Convert to the new clk_hw APIMarek Szyprowski1-9/+9
2017-06-09clk: samsung: exynos-audss: Convert to the new clk_hw APIMarek Szyprowski1-28/+29
2017-06-07clk: samsung: Convert common drivers to the new clk_hw APIMarek Szyprowski5-105/+92
2017-06-07clk: samsung: Add local variable to match its purposeMarek Szyprowski1-4/+5
2017-06-07clk: samsung: Remove dead codeMarek Szyprowski1-4/+0
2017-06-07clk: sunxi-ng: Move all clock types to a libraryStephen Boyd2-132/+22
2017-06-07clk: sunxi-ng: a83t: Add support for A83T's PRCMChen-Yu Tsai1-0/+107
2017-06-07clk: sunxi-ng: select SUNXI_CCU_MULT for sun8i-a83tArnd Bergmann1-0/+1
2017-06-07clk: sunxi-ng: a83t: Fix audio PLL divider offsetChen-Yu Tsai1-1/+1
2017-06-07clk: sunxi-ng: a83t: Fix PLL lock status register offsetChen-Yu Tsai1-1/+1
2017-06-07clk: sunxi-ng: Add driver for A83T CCUChen-Yu Tsai4-0/+998
2017-06-07clk: sunxi-ng: Support multiple variable pre-dividersChen-Yu Tsai9-47/+54
2017-06-07clk: sunxi-ng: de2: fix wrong pointer passed to PTR_ERR()Wei Yongjun1-1/+1
2017-06-07clk: sunxi-ng: sun5i: Export video PLLsMaxime Ripard1-2/+4
2017-06-07clk: sunxi-ng: mux: Re-adjust parent rateMaxime Ripard1-5/+28
2017-06-07clk: sunxi-ng: mux: Change pre-divider application function prototypeMaxime Ripard5-33/+28
2017-06-07clk: sunxi-ng: mux: split out the pre-divider computation codeMaxime Ripard1-12/+20
2017-06-07clk: sunxi-ng: mux: Don't just rely on the parent for CLK_SET_RATE_PARENTMaxime Ripard1-13/+1
2017-06-07clk: sunxi-ng: div: Switch to divider_round_rateMaxime Ripard1-23/+4
2017-06-07clk: sunxi-ng: Pass the parent and a pointer to the clocks round rateMaxime Ripard6-18/+25