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:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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drivers
Age
Commit message (
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Author
Files
Lines
2017-06-07
clk: sunxi-ng: de2: fix wrong pointer passed to PTR_ERR()
Wei Yongjun
1
-1
/
+1
2017-06-07
clk: sunxi-ng: sun5i: Export video PLLs
Maxime Ripard
1
-2
/
+4
2017-06-07
clk: sunxi-ng: mux: Re-adjust parent rate
Maxime Ripard
1
-5
/
+28
2017-06-07
clk: sunxi-ng: mux: Change pre-divider application function prototype
Maxime Ripard
5
-33
/
+28
2017-06-07
clk: sunxi-ng: mux: split out the pre-divider computation code
Maxime Ripard
1
-12
/
+20
2017-06-07
clk: sunxi-ng: mux: Don't just rely on the parent for CLK_SET_RATE_PARENT
Maxime Ripard
1
-13
/
+1
2017-06-07
clk: sunxi-ng: div: Switch to divider_round_rate
Maxime Ripard
1
-23
/
+4
2017-06-07
clk: sunxi-ng: Pass the parent and a pointer to the clocks round rate
Maxime Ripard
6
-18
/
+25
2017-06-07
clk: divider: Make divider_round_rate take the parent clock
Maxime Ripard
1
-9
/
+10
2017-06-07
clk: sunxi-ng: explicitly include linux/spinlock.h
Tobias Klauser
1
-0
/
+1
2017-06-07
clk: sunxi-ng: add support for DE2 CCU
Icenowy Zheng
4
-0
/
+294
2017-06-07
clk: imx7d: Fix the DDR PLL enable bit
Fabio Estevam
1
-1
/
+1
2017-06-05
clk: at91: fix clk-generated compilation
Alexandre Belloni
1
-0
/
+1
2017-06-03
clk: versatile: delete old RealView clock implementation
Linus Walleij
2
-98
/
+0
2017-06-03
clk: bcm2835: Minimise clock jitter for PCM clock
Phil Elwell
1
-5
/
+29
2017-06-03
clk: bcm2835: Limit PCM clock to OSC and PLLD_PER
Phil Elwell
1
-1
/
+26
2017-06-03
clk: bcm2835: Correct the prediv logic
Phil Elwell
1
-1
/
+3
2017-06-03
Merge branch 'clk-bulk-get' into clk-next
Stephen Boyd
3
-1
/
+194
2017-06-03
clk: add managed version of clk_bulk_get
Dong Aisheng
1
-0
/
+36
2017-06-03
clk: add clk_bulk_get accessories
Dong Aisheng
2
-1
/
+158
2017-06-02
clk: meson-gxbb: Add const to some parent name arrays
Stephen Boyd
1
-3
/
+3
2017-06-02
Merge tag 'meson-clk-for-4.13' of git://github.com/BayLibre/clk-meson into cl...
Stephen Boyd
3
-74
/
+73
2017-06-02
clk: palmas: undo preparation of a clock source.
Arvind Yadav
1
-0
/
+1
2017-06-02
clk: rockchip: mark some special clk as critical on rk3368
Elaine Zhang
1
-1
/
+4
2017-06-02
clk: rockchip: mark noc and some special clk as critical on rk3288
Elaine Zhang
1
-4
/
+10
2017-06-02
clk: rockchip: mark noc and some special clk as critical on rk3228
Elaine Zhang
1
-1
/
+29
2017-06-02
clk: rockchip: mark pclk_ddrupctl as critical_clock on rk3036
Elaine Zhang
1
-0
/
+1
2017-06-02
clk: rockchip: add clock controller for rk3128
Elaine Zhang
2
-0
/
+613
2017-06-02
clk: rockchip: export more rk3228 clocks ids
Elaine Zhang
1
-46
/
+46
2017-06-02
clk: rockchip: add ids for rk3399 testclks used for camera handling
Eddie Cai
1
-2
/
+2
2017-06-02
Merge tag 'clk-renesas-for-v4.13-tag1' of git://git.kernel.org/pub/scm/linux/...
Michael Turquette
14
-72
/
+1319
2017-06-01
clk: mvebu: cp110: make failure labels more meaningful
Gregory CLEMENT
1
-10
/
+10
2017-06-01
clk: Fix __set_clk_rates error print-string
Bryan O'Donoghue
1
-1
/
+1
2017-06-01
clk: scpi: fix return type of __scpi_dvfs_round_rate
Sudeep Holla
1
-3
/
+3
2017-06-01
clk: qoriq: Separate root input clock for core PLLs on ls1012a
Scott Wood
1
-14
/
+77
2017-06-01
clk: at91: fix clk-generated parenting
Alexandre Belloni
1
-2
/
+1
2017-06-01
clk: imx7d: Fix the powerdown bit location of PLL DDR
Fabio Estevam
3
-1
/
+7
2017-06-01
clk: mvebu: armada-38x: add support for 1866MHz variants
Ralph Sennhauser
1
-3
/
+4
2017-06-01
Merge branch 'clk-ap806' into clk-next
Michael Turquette
1
-36
/
+71
2017-06-01
clk: mvebu: ap806: introduce a new binding
Gregory CLEMENT
1
-12
/
+44
2017-06-01
clk: mvebu: ap806: do not depend anymore of the *-clock-output-names
Gregory CLEMENT
1
-22
/
+24
2017-06-01
clk: mvebu: ap806: cosmetic improvement
Gregory CLEMENT
1
-7
/
+8
2017-05-31
clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM
Chen-Yu Tsai
1
-1
/
+3
2017-05-31
clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM
Chen-Yu Tsai
1
-1
/
+3
2017-05-29
clk: meson-gxbb: Add EE 32K Clock for CEC
Neil Armstrong
2
-1
/
+58
2017-05-29
clk: gxbb: remove CLK_IGNORE_UNUSED from clk81
Jerome Brunet
1
-1
/
+1
2017-05-29
clk: meson: meson8b: mark clk81 as critical
Martin Blumenstingl
1
-1
/
+1
2017-05-29
clk: meson: gxbb: remove the "cpu_clk" from the GXBB and GXL driver
Martin Blumenstingl
2
-62
/
+4
2017-05-29
clk: meson-gxbb: un-export the CPU clock
Martin Blumenstingl
1
-1
/
+1
2017-05-29
clk: meson-gxbb: expose UART clocks
Helmut Klein
1
-3
/
+3
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