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2017-06-07clk: sunxi-ng: de2: fix wrong pointer passed to PTR_ERR()Wei Yongjun1-1/+1
2017-06-07clk: sunxi-ng: sun5i: Export video PLLsMaxime Ripard1-2/+4
2017-06-07clk: sunxi-ng: mux: Re-adjust parent rateMaxime Ripard1-5/+28
2017-06-07clk: sunxi-ng: mux: Change pre-divider application function prototypeMaxime Ripard5-33/+28
2017-06-07clk: sunxi-ng: mux: split out the pre-divider computation codeMaxime Ripard1-12/+20
2017-06-07clk: sunxi-ng: mux: Don't just rely on the parent for CLK_SET_RATE_PARENTMaxime Ripard1-13/+1
2017-06-07clk: sunxi-ng: div: Switch to divider_round_rateMaxime Ripard1-23/+4
2017-06-07clk: sunxi-ng: Pass the parent and a pointer to the clocks round rateMaxime Ripard6-18/+25
2017-06-07clk: divider: Make divider_round_rate take the parent clockMaxime Ripard1-9/+10
2017-06-07clk: sunxi-ng: explicitly include linux/spinlock.hTobias Klauser1-0/+1
2017-06-07clk: sunxi-ng: add support for DE2 CCUIcenowy Zheng4-0/+294
2017-06-07clk: imx7d: Fix the DDR PLL enable bitFabio Estevam1-1/+1
2017-06-05clk: at91: fix clk-generated compilationAlexandre Belloni1-0/+1
2017-06-03clk: versatile: delete old RealView clock implementationLinus Walleij2-98/+0
2017-06-03clk: bcm2835: Minimise clock jitter for PCM clockPhil Elwell1-5/+29
2017-06-03clk: bcm2835: Limit PCM clock to OSC and PLLD_PERPhil Elwell1-1/+26
2017-06-03clk: bcm2835: Correct the prediv logicPhil Elwell1-1/+3
2017-06-03Merge branch 'clk-bulk-get' into clk-nextStephen Boyd3-1/+194
2017-06-03clk: add managed version of clk_bulk_getDong Aisheng1-0/+36
2017-06-03clk: add clk_bulk_get accessoriesDong Aisheng2-1/+158
2017-06-02clk: meson-gxbb: Add const to some parent name arraysStephen Boyd1-3/+3
2017-06-02Merge tag 'meson-clk-for-4.13' of git://github.com/BayLibre/clk-meson into cl...Stephen Boyd3-74/+73
2017-06-02clk: palmas: undo preparation of a clock source.Arvind Yadav1-0/+1
2017-06-02clk: rockchip: mark some special clk as critical on rk3368Elaine Zhang1-1/+4
2017-06-02clk: rockchip: mark noc and some special clk as critical on rk3288Elaine Zhang1-4/+10
2017-06-02clk: rockchip: mark noc and some special clk as critical on rk3228Elaine Zhang1-1/+29
2017-06-02clk: rockchip: mark pclk_ddrupctl as critical_clock on rk3036Elaine Zhang1-0/+1
2017-06-02clk: rockchip: add clock controller for rk3128Elaine Zhang2-0/+613
2017-06-02clk: rockchip: export more rk3228 clocks idsElaine Zhang1-46/+46
2017-06-02clk: rockchip: add ids for rk3399 testclks used for camera handlingEddie Cai1-2/+2
2017-06-02Merge tag 'clk-renesas-for-v4.13-tag1' of git://git.kernel.org/pub/scm/linux/...Michael Turquette14-72/+1319
2017-06-01clk: mvebu: cp110: make failure labels more meaningfulGregory CLEMENT1-10/+10
2017-06-01clk: Fix __set_clk_rates error print-stringBryan O'Donoghue1-1/+1
2017-06-01clk: scpi: fix return type of __scpi_dvfs_round_rateSudeep Holla1-3/+3
2017-06-01clk: qoriq: Separate root input clock for core PLLs on ls1012aScott Wood1-14/+77
2017-06-01clk: at91: fix clk-generated parentingAlexandre Belloni1-2/+1
2017-06-01clk: imx7d: Fix the powerdown bit location of PLL DDRFabio Estevam3-1/+7
2017-06-01clk: mvebu: armada-38x: add support for 1866MHz variantsRalph Sennhauser1-3/+4
2017-06-01Merge branch 'clk-ap806' into clk-nextMichael Turquette1-36/+71
2017-06-01clk: mvebu: ap806: introduce a new bindingGregory CLEMENT1-12/+44
2017-06-01clk: mvebu: ap806: do not depend anymore of the *-clock-output-namesGregory CLEMENT1-22/+24
2017-06-01clk: mvebu: ap806: cosmetic improvementGregory CLEMENT1-7/+8
2017-05-31clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCMChen-Yu Tsai1-1/+3
2017-05-31clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCMChen-Yu Tsai1-1/+3
2017-05-29clk: meson-gxbb: Add EE 32K Clock for CECNeil Armstrong2-1/+58
2017-05-29clk: gxbb: remove CLK_IGNORE_UNUSED from clk81Jerome Brunet1-1/+1
2017-05-29clk: meson: meson8b: mark clk81 as criticalMartin Blumenstingl1-1/+1
2017-05-29clk: meson: gxbb: remove the "cpu_clk" from the GXBB and GXL driverMartin Blumenstingl2-62/+4
2017-05-29clk: meson-gxbb: un-export the CPU clockMartin Blumenstingl1-1/+1
2017-05-29clk: meson-gxbb: expose UART clocksHelmut Klein1-3/+3