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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
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visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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drivers
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staging
/
rtl8192e
Age
Commit message (
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)
Author
Files
Lines
2021-04-22
staging: rtl8192e: indent statement properly
Ian Kewish
1
-1
/
+1
2021-04-14
staging: rtl8192e: removed multiple blank lines
Mitali Borkar
1
-7
/
+0
2021-04-14
staging: rtl8192e: remove unnecessary blank line after close brace
Mitali Borkar
1
-2
/
+0
2021-04-14
staging: rtl8192e: remove unnecessary blank line before brace
Mitali Borkar
2
-4
/
+0
2021-04-14
staging: rtl8192e: add spaces around binary operators
Mitali Borkar
2
-8
/
+8
2021-04-13
staging: rtl8192e: remove unnecessary ftrace-like logging
Mitali Borkar
1
-4
/
+0
2021-04-11
staging: rtl8192e: Fix incorrect pointer check
Mitali Borkar
1
-1
/
+1
2021-04-10
staging: rtl8192e: remove unnecesasry f-trace like logging
Mitali Borkar
1
-1
/
+0
2021-04-10
staging: rtl8192e: replace comparison to NULL by bool
Mitali Borkar
1
-3
/
+3
2021-04-07
staging: rtl8192e: rtl8192E_dev: remove unused variable
Jiapeng Chong
1
-3
/
+3
2021-04-05
staging: rtl8192e: move const after static
Deborah Brouwer
1
-2
/
+2
2021-04-05
Merge 5.12-rc6 into staging-next
Greg Kroah-Hartman
2
-2
/
+2
2021-03-23
staging: rtl8192e: Change state information from u16 to u8
Atul Gopinathan
1
-1
/
+1
2021-03-23
staging: rtl8192e: Fix incorrect source in memcpy()
Atul Gopinathan
1
-1
/
+1
2021-03-15
Merge 5.12-rc3 into staging-next
Greg Kroah-Hartman
2
-3
/
+5
2021-03-10
staging: rtl8192e: remove redundant variable shadowing
Nikolay Kyx
1
-5
/
+3
2021-03-10
staging: rtl8192e: reformat rx_ts_record struct
William Durand
1
-7
/
+7
2021-03-10
staging: rtl8192e: rename RxLastFragNum to rx_last_frag_num in rx_ts_record s...
William Durand
2
-3
/
+3
2021-03-10
staging: rtl8192e: rename RxLastSeqNum to rx_last_seq_num in rx_ts_record struct
William Durand
2
-3
/
+3
2021-03-10
staging: rtl8192e: rename RxAdmittedBARecord to rx_admitted_ba_record in rx_t...
William Durand
3
-8
/
+8
2021-03-10
staging: rtl8192e: rename RxPktPendingTimer to rx_pkt_pending_timer in rx_ts_...
William Durand
3
-10
/
+10
2021-03-10
staging: rtl8192e: rename RxPendingPktList to rx_pending_pkt_list in rx_ts_re...
William Durand
3
-12
/
+12
2021-03-10
staging: rtl8192e: rename RxTimeoutIndicateSeq to rx_timeout_indicate_seq in ...
William Durand
3
-9
/
+9
2021-03-10
staging: rtl8192e: rename RxIndicateSeq to rx_indicate_seq in rx_ts_record st...
William Durand
3
-30
/
+30
2021-03-10
staging: rtl8192e: rename TsCommonInfo to ts_common_info in rx_ts_record struct
William Durand
3
-7
/
+7
2021-03-10
staging: rtl8192e: reformat bss_ht struct
William Durand
1
-9
/
+9
2021-03-10
staging: rtl8192e: rename bdHT1R to bd_ht_1r in bss_ht struct
William Durand
2
-5
/
+5
2021-03-10
staging: rtl8192e: rename RT2RT_HT_Mode to rt2rt_ht_mode in bss_ht struct
William Durand
4
-8
/
+8
2021-03-10
staging: rtl8192e: rename bdRT2RTLongSlotTime to bd_rt2rt_long_slot_time in b...
William Durand
4
-7
/
+6
2021-03-10
staging: rtl8192e: rename bdRT2RTAggregation to bd_rt2rt_aggregation in bss_h...
William Durand
3
-9
/
+9
2021-03-10
staging: rtl8192e: rename bdBandWidth to bd_bandwidth in bss_ht struct
William Durand
2
-3
/
+3
2021-03-10
staging: rtl8192e: rename bdHTSpecVer to bd_ht_spec_ver in bss_ht struct
William Durand
3
-8
/
+8
2021-03-10
staging: rtl8192e: rename bdHTInfoLen to bd_ht_info_len in bss_ht struct
William Durand
4
-14
/
+14
2021-03-10
staging: rtl8192e: rename bdHTInfoBuf to bd_ht_info_buf in bss_ht struct
William Durand
4
-11
/
+12
2021-03-10
staging: rtl8192e: rename bdHTCapLen to bd_ht_cap_len in bss_ht struct
William Durand
4
-12
/
+12
2021-03-10
staging: rtl8192e: rename bdHTCapBuf to bd_ht_cap_buf in bss_ht struct
William Durand
5
-15
/
+16
2021-03-10
staging: rtl8192e: rename bdSupportHT to bd_support_ht in bss_ht struct
William Durand
4
-12
/
+12
2021-03-10
staging: rtl8192e: remove blank line in bss_ht struct
William Durand
1
-1
/
+0
2021-03-10
staging: rtl8192e: fix alignment issues in rtllib_wx.c
William Durand
1
-24
/
+18
2021-03-10
staging: rtl8192e: reformat ba_record struct
William Durand
1
-4
/
+4
2021-03-10
staging: rtl8192e: rename BaStartSeqCtrl to ba_start_seq_ctrl in ba_record st...
William Durand
3
-11
/
+11
2021-03-10
staging: rtl8192e: rename BaTimeoutValue to ba_timeout_value in ba_record struct
William Durand
2
-7
/
+7
2021-03-10
staging: rtl8192e: rename BaParamSet to ba_param_set in ba_record struct
William Durand
2
-15
/
+15
2021-03-10
staging: rtl8192e: rename DialogToken to dialog_token in ba_record struct
William Durand
2
-8
/
+8
2021-03-10
staging: rtl8192e: rename bValid to b_valid in ba_record struct
William Durand
3
-13
/
+13
2021-03-10
staging: rtl8192e: rename Timer to timer in ba_record struct
William Durand
3
-9
/
+9
2021-03-10
staging: rtl8192e: rename TID to tid in delba_param_set union
William Durand
2
-5
/
+5
2021-03-10
staging: rtl8192e: rename Initiator to initiator in delba_param_set union
William Durand
2
-3
/
+3
2021-03-10
staging: rtl8192e: rename Reserved to reserved in delba_param_set union
William Durand
1
-1
/
+1
2021-03-10
staging: rtl8192e: rename shortData to short_data in delba_param_set union
William Durand
2
-2
/
+2
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