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path: root/drivers/spi
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2018-11-23spi: npcm: Fix an error code in the probe functionDan Carpenter1-1/+1
There is an IS_ERR() vs PTR_ERR() typo here. The current code returns 1 but we want to return the negative error code. Fixes: 2a22f1b30cee ("spi: npcm: add NPCM PSPI controller driver") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-22spi: spi-qcom-qspi: Fix remaining driver nitsRyan Case1-4/+4
Address remaining comments from original driver patch series * Move RD_FIFO_CFG to be ordered corretly * Expand spinlock comment Signed-off-by: Ryan Case <ryandcase@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-20spi: spi-mem: Add a new API to support direct mappingBoris Brezillon1-0/+204
Most modern SPI controllers can directly map a SPI memory (or a portion of the SPI memory) in the CPU address space. Most of the time this brings significant performance improvements as it automates the whole process of sending SPI memory operations every time a new region is accessed. This new API allows SPI memory drivers to create direct mappings and then use them to access the memory instead of using spi_mem_exec_op(). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-20spi: spi-mem: Split spi_mem_exec_op() codeBoris Brezillon1-21/+42
The logic surrounding the ->exec_op() call applies to direct mapping accessors. Move this code to separate functions to avoid duplicating code. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-20spi: spi-mem: Add SPI_MEM_NO_DATA to the spi_mem_data_dir enumBoris Brezillon1-1/+1
When defining spi_mem_op templates we don't necessarily know the size that will be passed when the template is actually used, and basing the supports_op() check on op->data.nbytes to know whether there will be data transferred for a specific operation is this not possible. Add SPI_MEM_NO_DATA to the spi_mem_data_dir enum so that we can base our checks on op->data.dir instead of op->data.nbytes. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-17spi: pxa2xx: Fix '"CONFIG_OF" is not defined' warningLubomir Rintel1-7/+1
A careless oversight. Sorry. Fixes: 0a897143b7c9 ("spi: pxa2xx: Add slave mode support") Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-16spi: omap2-mcspi: Add missing suspend and resume callsTony Lindgren1-12/+25
I've been wondering still about omap2-mcspi related suspend and resume flakeyness and looks like we're missing calls to spi_master_suspend() and spi_master_resume(). Adding those and using pm_runtime_force_suspend() and pm_runtime_force_resume() makes things work for suspend and resume and allows us to stop using noirq suspend and resume. And while at it, let's use SET_SYSTEM_SLEEP_PM_OPS to simplify things further. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-16spi: Fix core transfer waits after slave supportMark Brown1-3/+5
The refactoring done as part of adding the core support for handling waiting for slave transfer dropped a conditional which meant that we started waiting for completion of all transfers, not just those that the controller asked for. This caused hangs and massive delays on platforms that don't need the core delay. Re-add the delay to fix this. Fixes: 810923f3bf06c11 (spi: Deal with slaves that return from transfer_one() unfinished) Reported-by: Tony Lindgren <tony@atomide.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-15spi: npcm: fix platform_no_drv_owner.cocci warningskbuild test robot1-1/+0
drivers/spi/spi-npcm-pspi.c:470:3-8: No need to set .owner here. The core will do it. Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Fixes: 2a22f1b30cee ("spi: npcm: add NPCM PSPI controller driver") CC: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-15spi: bcm2835: make license text and module license matchStefan Wahren2-2/+2
The license text is specifying GPL v2 or later but the MODULE_LICENSE is set to GPL v2 which means GNU Public License v2 only. So choose the license text as the correct one. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Florian Kauer <florian.kauer@koalo.de> Acked-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-15spi: npcm: fix u32 csgpio being checked for less than zeroColin Ian King1-3/+3
The u32 variable csgpio is being checked for an error return from the call to of_get_named_gpio, however, since this is unsigned this comparison will always be false. Fix this by making csgpio an int and fix up the %u format specifiers to %d accordingly. Detected by CoverityScan, CID#1475476 ("Unsigned compared against 0") Fixes: 2a22f1b30cee ("spi: npcm: add NPCM PSPI controller driver") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-13spi: npcm: add NPCM PSPI controller driverTomer Maimon3-0/+488
Add Nuvoton NPCM BMC Peripheral SPI controller driver. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-13spi: pl022: Handle cs_change for last transferFredrik Ternerot1-7/+7
Do not deselect cs when cs_change is set for the last transfer in the message. In this case, cs_change indicates that cs should stay selected until the next transfer. Signed-off-by: Fredrik Ternerot <fredrikt@axis.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-13spi: pxa2xx: Deal with the leftover garbage in TXFIFOLubomir Rintel1-0/+14
There doesn't seem to be a way to empty TXFIFO on MMP2. The datasheet is super-secret and the method described in Armada 16x manual won't work: "The TXFIFO and RXFIFO are cleared to 0b0 when the SSPx port is reset or disabled (by writing a 0b0 to the <Synchronous Serial Port Enable> field in the SSP Control Register 0)." # devmem 0xd4037008 # read SSSR 0x0000F204 # devmem 0xd4037000 32 0x07 # SSE off in SSCR0 # devmem 0xd4037000 32 0x87 # SSE on # devmem 0xd4037008 0x0000F204 ^ TXFIFO level is still 2. Sigh. The OLPC 1.75 boot firmware leaves two bytes in the TXFIFO. Those are basically throwaway bytes used in response to the messages from the EC. The OLPC kernel copes with this by power-cycling the hardware. Perhaps the firmware should do this instead. Other than that, there's not much we can do other than complain loudly until the garbage gets drained and discard the actual data... For the OLPC EC this will work just fine and pushing more data to TXFIFO would break further transactions. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-13spi: pxa2xx: Add ready signalLubomir Rintel2-1/+18
Strobe a GPIO line when the slave TX FIFO is filled. This is how the Embedded Controller on an OLPC XO-1.75 machine, that happens to be a SPI master, learns that it can initiate a transaction. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Tested-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-13spi: pxa2xx: Add slave mode supportLubomir Rintel1-7/+74
Tested on an OLPC XO-1.75 machine, where the Embedded Controller happens to be a SPI master. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-13spi: Deal with slaves that return from transfer_one() unfinishedLubomir Rintel1-23/+39
Some drivers, such as spi-pxa2xx return from the transfer_one callback immediately, idicating that the transfer will be finished asynchronously. Normally, spi_transfer_one_message() synchronously waits for the transfer to finish with wait_for_completion_timeout(). For slaves, we don't want the transaction to time out as it can complete in a long time in future. Use wait_for_completion_interruptible() instead. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-07spi: gpio: Support 3WIRE high-impedance turn-aroundLinus Walleij1-3/+21
Some devices such as the TPO TPG110 display panel require a "high-impedance turn-around", in effect a clock cycle after switching the line from output to input mode. Support this in the GPIO driver to begin with. Other driver may implement it if they can, it is unclear if this can be achieved with anything else than GPIO bit-banging. Cc: Andrzej Hajda <a.hajda@samsung.com> Acked-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-07spi: Kconfig: Enable McSPI driver for K3 platformsVignesh R1-1/+1
Enable McSPI driver to be built for K3 platforms, to support McSPI on AM654 SoC of K3 family. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-07spi: Add QuadSPI driver for Atmel SAMA5D2Piotr Bugalski3-0/+559
Kernel contains QSPI driver strongly tied to MTD and nor-flash memory. New spi-mem interface allows usage also other memory types, especially much larger NAND with SPI interface. This driver works as SPI controller and is not related to MTD, however can work with NAND-flash or other peripherals using spi-mem interface. Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Piotr Bugalski <bugalski.piotr@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-06Merge branch 'spi-4.20' into spi-4.21 for uniphier DTMark Brown1-2/+2
2018-11-05spi: Add MXIC controller driverMason Yang3-0/+626
Add a driver for Macronix SPI controller IP. Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: spi-rspi: simplify getting .driver_dataWolfram Sang1-4/+2
We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: spi-zynqmp-gqspi: simplify getting .driver_dataWolfram Sang1-4/+2
We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: spi-sh-msiof: simplify getting .driver_dataWolfram Sang1-4/+2
We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: spi-geni-qcom: Simplify probe functionAlok Chauhan1-25/+24
Re-arrange existing APIs in probe function to avoid using goto and remove redundant variables. Signed-off-by: Alok Chauhan <alokc@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: spi-geni-qcom: fix nitpicksAlok Chauhan1-9/+6
fixed the nitpicks. Signed-off-by: Alok Chauhan <alokc@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: spi-fsl-dspi: use IRQF_SHARED mode to request IRQChuanhua Han1-2/+2
Some SoC share one irq number between DSPI controllers. For example, on the LX2160 board, DSPI0 and DSPI1 share one irq number. In this case, only one DSPI controller can register successfully, and others will fail. Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: mediatek: add spi support for mt8183 ICLeilk Liu1-0/+9
this patch add support for mt8183 IC. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: pxa2xx: Remove LPSS private register restoring during resumeJarkko Nikula1-4/+0
Intel LPSS private register restoring in spi-pxa2xx.c: pxa2xx_spi_resume() was added before there was no any other code restoring them. This was changed after following commits for previous and current LPSS platforms: c78b0830667a ("ACPI / LPSS: custom power domain for LPSS") 41a3da2b8e16 ("mfd: intel-lpss: Save register context on suspend") However there is one caveat: There is no LPSS private register context save/restore for the Intel Lynxpoint in the Linux kernel code. I did some debugging on one Lynxpoint based device I have and on it the LPSS register context is not lost over suspend/resume cycle (s2idle). Which happens for instance on Intel Braswell. I'm speculating but I guess either firmware does it or the LPSS is kept always on Lynxpoint. Given that we haven't needed to implement Lynxpoint LPSS I2C or UART private register context save/restore over four years time I think we are safe to remove this LPSS private register restoring during resume here. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: rockchip: support lsb-first modeEmil Renner Berthing1-1/+3
Add missing support for lsb-first mode. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: rockchip: support 4bit wordsEmil Renner Berthing1-12/+29
The hardware supports 4, 8 and 16bit spi words, so add the missing support for 4bit words. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: rockchip: use irq rather than pollingEmil Renner Berthing1-63/+92
Register an interrupt handler to fill/empty the tx and rx fifos rather than busy-looping. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: rockchip: precompute rx sample delayEmil Renner Berthing1-18/+18
Now that we no longer potentially change spi clock at runtime we can precompute the rx sample delay at probe time rather than for each transfer. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: rockchip: set min/max speedEmil Renner Berthing1-32/+20
The driver previously checked each transfer if the requested speed was higher than possible with the current spi clock rate and raised the clock rate accordingly. However, there is no check to see if the spi clock was actually set that high and no way to dynamically lower the spi clock rate again. So it seems any potiential users of this functionality are better off just setting the spi clock rate at init using the assigned-clock-rates devicetree property. Removing this dynamic spi clock rate raising allows us let the spi framework handle min/max speeds for us. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: rockchip: simplify use_dma logicEmil Renner Berthing1-11/+7
We only need to know if we're using dma when setting up the transfer, so just use a local variable for that. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: rockchip: remove master pointer from dev dataEmil Renner Berthing1-11/+10
In almost all cases we already have a pointer to the spi master structure where we have the driver data. The only exceptions are the dma callbacks which are easily fixed by passing them the master and using spi_master_get_devdata to retrieve the driver data. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: rockchip: don't store dma channels twiceEmil Renner Berthing1-42/+34
The spi master (aka spi controller) structure already has two fields for storing the rx and tx dma channels. Just use them rather than duplicating them in driver data. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: rockchip: read transfer info directlyEmil Renner Berthing1-46/+24
Just read transfer info directly from the spi device and transfer structures rather than storing it in driver data first. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: rockchip: disable spi on errorEmil Renner Berthing1-25/+5
Successful transfers leave the spi disabled, so if we just make sure to disable the spi on error there should be no need to disable the spi from master->unprepare_message. This also flushes the tx and rx fifos, so no need to do that manually. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: rockchip: use atomic_t stateEmil Renner Berthing1-50/+25
The state field is currently only used to make sure only the last of the tx and rx dma callbacks issue an spi_finalize_current_transfer. Rather than using a spinlock we can get away with just turning the state field into an atomic_t. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: rockchip: always use SPI modeEmil Renner Berthing1-13/+4
The hardware supports 3 different variants of SPI and there were some code around it, but nothing to actually set it to anything but "Motorola SPI". Just drop that code and always use that mode. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: rockchip: use designated init for dma configEmil Renner Berthing1-12/+14
Use C99 designated initializers for dma slave config structures. This also makes sure uninitialized fields are zeroed so we don't need an explicit memset. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: rockchip: make spi_enable_chip take boolEmil Renner Berthing1-9/+9
The spi_enable_chip function takes a boolean argument. Change the type to reflect that. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-31spi: mediatek: use correct mata->xfer_len when in fifo transferLeilk Liu1-2/+2
when xfer_len is greater than 64 bytes and use fifo mode to transfer, the actual length from the third time is mata->xfer_len but not len in mtk_spi_interrupt(). Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-25Merge tag 'mfd-next-4.20' of ↵Linus Torvalds3-0/+441
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Drivers - Add support for USART SPI to AT91* New Functionality - Add support for Audio CODECs to motorola-cpcap Fix-ups - DT documentation fix-ups; atmel-usart - Staticise functions/structs; spi-at91-usart, arizona-core - Constify; ti-lmu - Fix memory leaks; menelaus - Change device 'wake-up' status; ti_am335x_tscadc, max8997 - Power Management (suspend/resume) semantic changes; ti_am335x_adc, cros_ec, max8997 - SPDX churn; sec-core (+ headers), max* (+ headers), intel* (+ headers), - Trivial (whitespace, email addresses, alphabetisise); Kconfig, adp5520, intel_soc_pmic_* - Build as module; sec-irq - Use new %pOFn printk format for device_node.name; max77620 - Remove unused code; madera - Use generic MACROs; intel_msic, intel_soc_pmic_crc - Move to GPIOD; ti-lmu - Use managed resources; ti-lmu Bug Fixes - Add missing headers; at91-usart - Prevent device from entering low-power mode; arizona-core - Poll for BOOT_DONE to avoid still-booting NACK; madera-core - Prevent ADC read from shutting down device; mc13xxx-core" * tag 'mfd-next-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (45 commits) mfd: cros_ec: Avoid unneeded internal declaration warning mfd: ti-lmu: Use of_device_get_match_data() helper mfd: ti-lmu: Use managed resource for everything mfd: ti-lmu: Switch to GPIOD mfd: ti-lmu: constify mfd_cell tables mfd: max8997: Disable interrupt handling for suspend/resume cycle mfd: max8997: Enale irq-wakeup unconditionally mfd: arizona: Make array mclk_name static, shrinks object size MAINTAINERS: Add myself as designated reviewer of Intel MFD PMIC mfd: Convert Intel PMIC drivers to use SPDX identifier 1;5201;0c Reduce size of duplicated comments by switching to use SPDX identifier. mfd: Sort headers alphabetically for Intel PMIC drivers mfd: intel_soc_pmic_bxtwc: Chain power button IRQs as well mfd: intel_soc_pmic_crc: Use REGMAP_IRQ_REG() macro mfd: intel_soc_pmic_crc: Use DEFINE_RES_IRQ_NAMED() macro mfd: intel_msic: Use DEFINE_RES_IRQ() macro mfd: motorola-cpcap: Add audio-codec support mfd: mc13xxx-core: Fix PMIC shutdown when reading ADC values mfd: madera: Remove unused forward reference mfd: max77620: Convert to using %pOFn instead of device_node.name mfd: madera: Don't use regmap_read_poll_timeout to poll for BOOT_DONE ...
2018-10-21Merge remote-tracking branch 'spi/topic/of' into spi-nextMark Brown1-2/+5
2018-10-21Merge branch 'spi-4.20' into spi-nextMark Brown35-321/+3683
2018-10-21Merge branch 'spi-4.19' into spi-linusMark Brown3-4/+7
2018-10-21spi: Allow building SPI_BCM63XX_HSSPI on ARM-based SoCsFlorian Fainelli1-1/+1
ARM-based 63xx DSL platforms have the spi-bcm63xx-hsspi controller present, allow using this driver there as well. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>