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2023-01-20spi: spidev: order compatibles alphabeticallyKrzysztof Kozlowski1-4/+4
Bring some order to reduce possibilities of conflicts. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230120075651.153763-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2023-01-16spi: remove s3c24xx driverArnd Bergmann4-657/+0
The s3c24xx platform was removed,s o there are no remaining users for its spi driver. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-13spi: SPI core CS delay fixes and additionsMark Brown1-5/+20
Merge series from Hector Martin <marcan@marcan.st>: Commits f6c911f3308c ("spi: dt-bindings: Introduce spi-cs-setup-ns property") and 33a2fde5f77b ("spi: Introduce spi-cs-setup-ns property") introduced a new property to represent the CS setup delay in the device tree, but they have some issues: - The property is only parsed as a 16-bit integer number of nanoseconds, which limits the maximum value to ~65us. This is not a reasonable upper limit, as some devices might need a lot more. - The property name is inconsistent with other delay properties, which use a "*-delay-ns" naming scheme. - Only the setup delay is introduced, but not the related hold and inactive delay times. This series fixes the issues and adds support for the two missing properties. Please pull in the first 3 patches as fixes for 6.2, to avoid introducing a problematic DT API in this release. The last two patches can wait until 6.3, though are probably harmless to throw in as fixes too, since they're trivial.
2023-01-13spi: Parse hold/inactive CS delay values from the DTJanne Grunau1-0/+2
Now that we support parsing the setup time from the Device Tree, we can also easily support the remaining hold and inactive time delay values. Signed-off-by: Janne Grunau <j@jannau.net> Signed-off-by: Hector Martin <marcan@marcan.st> Link: https://lore.kernel.org/r/20230113102309.18308-4-marcan@marcan.st Signed-off-by: Mark Brown <broonie@kernel.org>
2023-01-13spi: Use a 32-bit DT property for spi-cs-setup-delay-nsJanne Grunau1-5/+18
65us is not a reasonable maximum for this property, as some devices might need a much longer setup time (e.g. those driven by firmware on the other end). Plus, device tree property values are in 32-bit cells and smaller widths should not be used without good reason. Also move the logic to a helper function, since this will later be used to parse other CS delay properties too. Fixes: 33a2fde5f77b ("spi: Introduce spi-cs-setup-ns property") Signed-off-by: Janne Grunau <j@jannau.net> Signed-off-by: Hector Martin <marcan@marcan.st> Link: https://lore.kernel.org/r/20230113102309.18308-2-marcan@marcan.st Signed-off-by: Mark Brown <broonie@kernel.org>
2023-01-12spi: remove omap 100K driverArnd Bergmann3-497/+0
The OMAP7xx/OMAP8xx support was removed since all of its boards have no remaining users. Remove its spi driver as well. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Janusz Krzysztofik <jmkrzyszt@gmail.com> Cc: linux-omap@vger.kernel.org Cc: Cory Maccarrone <darkstar6262@gmail.com> Cc: Fabrice Crohas <fcrohas@gmail.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-12ARM: omap1: remove dead codeArnd Bergmann1-15/+1
After the removal of the unused board files, I went through the omap1 code to look for code that no longer has any callers and remove that. In particular, support for the omap7xx/omap8xx family is now completely unused, so I'm only leaving omap15xx/omap16xx/omap59xx. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Janusz Krzysztofik <jmkrzyszt@gmail.com> Cc: linux-omap@vger.kernel.org Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-11spi: Merge rename of spi-cs-setup-ns DT propertyMark Brown1-1/+1
The newly added spi-cs-setup-ns doesn't really fit with the existing property names for delays, rename it so that it does before it makes it into a release and becomes ABI.
2023-01-11spi: spidev: remove debug messages that access spidev->spi without lockingBartosz Golaszewski1-2/+0
The two debug messages in spidev_open() dereference spidev->spi without taking the lock and without checking if it's not null. This can lead to a crash. Drop the messages as they're not needed - the user-space will get informed about ENOMEM with the syscall return value. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20230106100719.196243-2-brgl@bgdev.pl Signed-off-by: Mark Brown <broonie@kernel.org>
2023-01-11spi: spidev: fix a race condition when accessing spidev->spiBartosz Golaszewski1-16/+18
There's a spinlock in place that is taken in file_operations callbacks whenever we check if spidev->spi is still alive (not null). It's also taken when spidev->spi is set to NULL in remove(). This however doesn't protect the code against driver unbind event while one of the syscalls is still in progress. To that end we need a lock taken continuously as long as we may still access spidev->spi. As both the file ops and the remove callback are never called from interrupt context, we can replace the spinlock with a mutex. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20230106100719.196243-1-brgl@bgdev.pl Signed-off-by: Mark Brown <broonie@kernel.org>
2023-01-06spi: spidev: remove debug messages that access spidev->spi without lockingBartosz Golaszewski1-2/+0
The two debug messages in spidev_open() dereference spidev->spi without taking the lock and without checking if it's not null. This can lead to a crash. Drop the messages as they're not needed - the user-space will get informed about ENOMEM with the syscall return value. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20230106100719.196243-2-brgl@bgdev.pl Signed-off-by: Mark Brown <broonie@kernel.org>
2023-01-06spi: spidev: fix a race condition when accessing spidev->spiBartosz Golaszewski1-16/+18
There's a spinlock in place that is taken in file_operations callbacks whenever we check if spidev->spi is still alive (not null). It's also taken when spidev->spi is set to NULL in remove(). This however doesn't protect the code against driver unbind event while one of the syscalls is still in progress. To that end we need a lock taken continuously as long as we may still access spidev->spi. As both the file ops and the remove callback are never called from interrupt context, we can replace the spinlock with a mutex. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20230106100719.196243-1-brgl@bgdev.pl Signed-off-by: Mark Brown <broonie@kernel.org>
2023-01-06SPI core CS delay fixes and additionsMark Brown1-1/+1
Merge series from Hector Martin <marcan@marcan.st>: This brings the name of the cs-setup-ns parameter which was added during the merge window into line with other delay properties.
2023-01-06spi: SPI core CS delay property renameMark Brown1-1/+1
From: Hector Martin <marcan@marcan.st> Date: Wed, 04 Jan 2023 18:36:26 +0900 Message-Id: <20230104093631.15611-1-marcan@marcan.st> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Merge changes from Hector Martin <marcan@marcan.st>: This brings the name of the cs-setup-ns parameter which was added during the merge window into line with other delay properties.
2023-01-05spi: Rename spi-cs-setup-ns property to spi-cs-setup-delay-nsHector Martin1-1/+1
As mentioned in the corresponding DT binding commit, the naming scheme for delay properties includes "delay" in the name, so let's keep that consistent. Fixes: 33a2fde5f77b ("spi: Introduce spi-cs-setup-ns property") Signed-off-by: Hector Martin <marcan@marcan.st> Link: https://lore.kernel.org/r/20230104093631.15611-3-marcan@marcan.st Signed-off-by: Mark Brown <broonie@kernel.org>
2023-01-03spi: spi-loopback-test: Allow skipping delaysVincent Whitchurch1-1/+7
A 100 ms delay is inserted between tests by default in order to "detect the individual tests when using a logic analyzer". However, such delays are unnecessary when using this module for automated regression testing, so allow them to be disabled with a module parameter. Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> Link: https://lore.kernel.org/r/20230103152211.3034779-1-vincent.whitchurch@axis.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-01-03spi: switch to use modern nameMark Brown3-74/+74
Merge series from Yang Yingliang <yangyingliang@huawei.com>: After introducing devm_spi_alloc_host/spi_alloc_host(), the legacy named function devm_spi_alloc_master/spi_alloc_master() can be replaced. And also change other legacy name master/slave to modern name host/target or controller.
2023-01-03spi: ar934x: switch to use modern nameYang Yingliang1-5/+5
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20221230092806.1687340-4-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-01-03spi: a3700: switch to use modern nameYang Yingliang1-49/+49
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20221230092806.1687340-3-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-01-03spi: ath79: switch to use modern nameYang Yingliang1-20/+20
Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20221230092806.1687340-2-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-01-03spi: pl022: Only use DT-specified DMA channelsVincent Whitchurch1-1/+0
When a platform is booted with devicetree and does not provide a platform data structure, the driver creates one internally. enable_dma should not be set in this structure when creating it; the probe function will set it later if DMA channels are specified via the devicetree. Setting enable_dma = 1 when creating this internal platform data can lead to pl022_dma_probe() finding bogus DMA channels (since there is no channel filter specified) when no DMA channels are specified in the devicetree. Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> Acked-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20230102160852.3090202-1-vincent.whitchurch@axis.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-12-29spi: spi-altera-platform: switch to use modern nameYang Yingliang1-18/+18
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20221229103837.4192759-4-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-12-29spi: spi-altera-dfl: switch to use modern nameYang Yingliang1-18/+18
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20221229103837.4192759-3-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-12-29spi: altera: switch to use modern nameYang Yingliang3-17/+17
Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20221229103837.4192759-2-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-12-27spidev: Add Silicon Labs SI3210 device compatibleVincent Tremblay1-0/+2
Add compatible string for Silicon Labs SI3210 device. Signed-off-by: Vincent Tremblay <vincent@vtremblay.dev> Link: https://lore.kernel.org/r/20221227141011.111410-2-vincent@vtremblay.dev Signed-off-by: Mark Brown <broonie@kernel.org>
2022-12-27spidev: Add Silicon Labs EM3581 device compatibleVincent Tremblay1-0/+2
Add compatible string for Silicon Labs EM3581 device. Signed-off-by: Vincent Tremblay <vincent@vtremblay.dev> Link: https://lore.kernel.org/r/20221227023550.569547-2-vincent@vtremblay.dev Signed-off-by: Mark Brown <broonie@kernel.org>
2022-12-27spi: cadence: Fix busy cycles calculationWitold Sadowski1-1/+4
If xSPI is in x2/x4/x8 mode to calculate busy cycles, busy bits count must be divided by the number of lanes. If opcommand is using 8 busy bits, but SPI is in x4 mode, there will be only 2 busy cycles. Signed-off-by: Witold Sadowski <wsadowski@marvell.com> Reviewed-by: Chandrakala Chavva <cchavva@marvell.com> Reviewed-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Link: https://lore.kernel.org/r/20221219144254.20883-2-wsadowski@marvell.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-12-27spi: mediatek: Enable irq before the spi registrationRicardo Ribalda1-7/+5
If the irq is enabled after the spi si registered, there can be a race with the initialization of the devices on the spi bus. Eg: mtk-spi 1100a000.spi: spi-mem transfer timeout spi-nor: probe of spi0.0 failed with error -110 Unable to handle kernel NULL pointer dereference at virtual address 0000000000000010 ... Call trace: mtk_spi_can_dma+0x0/0x2c Fixes: c6f7874687f7 ("spi: mediatek: Enable irq when pdata is ready") Reported-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Ricardo Ribalda <ribalda@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Link: https://lore.kernel.org/r/20221225-mtk-spi-fixes-v1-0-bb6c14c232f8@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-12-26spi: spi-geni-qcom: Add support for SE DMA modeVijaya Krishna Nivarthi1-46/+165
SE DMA mode can be used for larger transfers and FIFO mode for smaller transfers. Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/1670509544-15977-1-git-send-email-quic_vnivarth@quicinc.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-12-24Merge tag 'spi-fix-v6.2-rc1' of ↵Linus Torvalds1-3/+16
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fix from Mark Brown: "One driver specific change here which handles the case where a SPI device for some reason tries to change the bus speed during a message on fsl_spi hardware, this should be very unusual" * tag 'spi-fix-v6.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: fsl_spi: Don't change speed while chipselect is active
2022-12-14spi: fsl_spi: Don't change speed while chipselect is activeChristophe Leroy1-3/+16
Commit c9bfcb315104 ("spi_mpc83xx: much improved driver") made modifications to the driver to not perform speed changes while chipselect is active. But those changes where lost with the convertion to tranfer_one. Previous implementation was allowing speed changes during message transfer when cs_change flag was set. At the time being, core SPI does not provide any feature to change speed while chipselect is off, so do not allow any speed change during message transfer, and perform the transfer setup in prepare_message in order to set correct speed while chipselect is still off. Reported-by: Herve Codina <herve.codina@bootlin.com> Fixes: 64ca1a034f00 ("spi: fsl_spi: Convert to transfer_one") Cc: stable@vger.kernel.org Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Tested-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Herve Codina <herve.codina@bootlin.com> Link: https://lore.kernel.org/r/8aab84c51aa330cf91f4b43782a1c483e150a4e3.1671025244.git.christophe.leroy@csgroup.eu Signed-off-by: Mark Brown <broonie@kernel.org>
2022-12-13Merge tag 'spi-v6.2' of ↵Linus Torvalds36-327/+2275
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "A busy enough release, but not for the core which has only seen very small updates. The biggest addition is the readdition of support for detailed configuration of the timings around chip selects. That had been removed for lack of use but there's been applications found for it on Atmel systems. Otherwise the updates are mostly feature additions and cleanups to existing drivers. Summary: - Provide a helper for getting device match data in a way that abstracts away which firmware interface is being used. - Re-add the spi_set_cs_timing() API for detailed configuration of the timing around chip select and support it on Atmel. - Support for MediaTek MT7986, Microchip PCI1xxxx, Nuvoton WPCM450 FIU and Socionext F_OSPI" * tag 'spi-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (66 commits) spi: dt-bindings: Convert Synquacer SPI to DT schema spi: spi-gpio: Don't set MOSI as an input if not 3WIRE mode spi: spi-mtk-nor: Add recovery mechanism for dma read timeout spi: spi-fsl-lpspi: add num-cs binding for lpspi spi: spi-fsl-lpspi: support multiple cs for lpspi spi: mtk-snfi: Add snfi support for MT7986 IC spi: spidev: mask SPI_CS_HIGH in SPI_IOC_RD_MODE spi: cadence-quadspi: Add minimum operable clock rate warning to baudrate divisor calculation spi: microchip: pci1xxxx: Add suspend and resume support for PCI1XXXX SPI driver spi: dt-bindings: nuvoton,wpcm450-fiu: Fix warning in example (missing reg property) spi: dt-bindings: nuvoton,wpcm450-fiu: Fix error in example (bogus include) spi: mediatek: Enable irq when pdata is ready spi: spi-mtk-nor: Unify write buffer on/off spi: intel: Add support for SFDP opcode spi: intel: Take possible chip address into account in intel_spi_read/write_reg() spi: intel: Implement adjust_op_size() spi: intel: Use ->replacement_op in intel_spi_hw_cycle() spi: cadence: Drop obsolete dependency on COMPILE_TEST spi: Add Nuvoton WPCM450 Flash Interface Unit (FIU) bindings spi: wpcm-fiu: Add direct map support ...
2022-12-08spi: spi-gpio: Don't set MOSI as an input if not 3WIRE modeKris Bahnsen1-3/+13
The addition of 3WIRE support would affect MOSI direction even when still in standard (4 wire) mode. This can lead to MOSI being at an invalid logic level when a device driver sets an SPI message with a NULL tx_buf. spi.h states that if tx_buf is NULL then "zeros will be shifted out ... " If MOSI is tristated then the data shifted out is subject to pull resistors, keepers, or in the absence of those, noise. This issue came to light when using spi-gpio connected to an ADS7843 touchscreen controller. MOSI pulled high when clocking MISO data in caused the SPI device to interpret this as a command which would put the device in an unexpected and non-functional state. Fixes: 4b859db2c606 ("spi: spi-gpio: add SPI_3WIRE support") Fixes: 5132b3d28371 ("spi: gpio: Support 3WIRE high-impedance turn-around") Signed-off-by: Kris Bahnsen <kris@embeddedTS.com> Link: https://lore.kernel.org/r/20221207230853.6174-1-kris@embeddedTS.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-12-07spi: spi-mtk-nor: Add recovery mechanism for dma read timeoutbayi cheng1-1/+21
The state machine of MTK spi nor controller may be disturbed by some glitch signals from the relevant BUS during dma read, Although the possibility of causing the dma read to fail is next to nothing, However, if error-handling is not implemented, which makes the feature somewhat risky. Add an error-handling mechanism here, reset the state machine and re-read the data when an error occurs. Signed-off-by: bayi cheng <bayi.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221207055435.30557-1-bayi.cheng@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-12-07spi: spi-fsl-lpspi: support multiple cs for lpspiHan Xu1-0/+5
support to get chip select number from DT file. Signed-off-by: Han Xu <han.xu@nxp.com> Link: https://lore.kernel.org/r/20221206225410.604482-1-han.xu@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-12-06spi: mtk-snfi: Add snfi support for MT7986 ICXiangsheng Hou1-2/+27
Add snfi support for MT7986 IC. Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221205065756.26875-2-xiangsheng.hou@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-12-01spi: spidev: mask SPI_CS_HIGH in SPI_IOC_RD_MODEAlexander Sverdlin1-5/+16
Commit f3186dd87669 ("spi: Optionally use GPIO descriptors for CS GPIOs") has changed the user-space interface so that bogus SPI_CS_HIGH started to appear in the mask returned by SPI_IOC_RD_MODE even for active-low CS pins. Commit 138c9c32f090 ("spi: spidev: Fix CS polarity if GPIO descriptors are used") fixed only SPI_IOC_WR_MODE part of the problem. Let's fix SPI_IOC_RD_MODE symmetrically. Test case: #include <sys/ioctl.h> #include <fcntl.h> #include <linux/spi/spidev.h> int main(int argc, char **argv) { char modew = SPI_CPHA; char moder; int f = open("/dev/spidev0.0", O_RDWR); if (f < 0) return 1; ioctl(f, SPI_IOC_WR_MODE, &modew); ioctl(f, SPI_IOC_RD_MODE, &moder); return moder == modew ? 0 : 2; } Fixes: f3186dd87669 ("spi: Optionally use GPIO descriptors for CS GPIOs") Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Link: https://lore.kernel.org/r/20221130162927.539512-1-alexander.sverdlin@siemens.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-29spi: cadence-quadspi: Add minimum operable clock rate warning to baudrate ↵Nathan Barrett-Morrison1-0/+8
divisor calculation This Cadence QSPI IP has a 4-bit clock divisor field for baud rate division. For example: 0b0000 = /2 0b0001 = /4 0b0010 = /6 ... 0b1111 = /32 The maximum divisor is 32 (when div = CQSPI_REG_CONFIG_BAUD_MASK). If we assume a reference clock of 500MHz and we set our spi-max-frequency to something low, such as 10 MHz. The calculated bit field for the divisor ends up being: DIV_ROUND_UP(500000000/(2*10000000))-1 = 25 25 is 0b11001... which truncates to a divisor field of 0b1001 (or /20). This is higher than our anticipated max-frequency of 10MHz (500MHz/20 = 25 MHz). Instead, let's make sure we're always using the maximum divisor (/32) in this case and give the user a warning about the rate adjustment. Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Link: https://lore.kernel.org/r/20221128164147.158441-1-nathan.morrison@timesys.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-29spi: microchip: pci1xxxx: Add suspend and resume support for PCI1XXXX SPI driverTharun Kumar P1-0/+78
Implement suspend, resume callbacks, store config at suspend and restore config at time of resume Signed-off-by: Tharun Kumar P <tharunkumar.pasumarthi@microchip.com> Link: https://lore.kernel.org/r/20221006050514.115564-3-tharunkumar.pasumarthi@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28spi: mediatek: Enable irq when pdata is readyRicardo Ribalda1-5/+7
If the device does not come straight from reset, we might receive an IRQ before we are ready to handle it. Fixes: [ 0.832328] Unable to handle kernel read from unreadable memory at virtual address 0000000000000010 [ 1.040343] Call trace: [ 1.040347] mtk_spi_can_dma+0xc/0x40 ... [ 1.262265] start_kernel+0x338/0x42c Signed-off-by: Ricardo Ribalda <ribalda@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221128-spi-mt65xx-v1-0-509266830665@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28spi: spi-mtk-nor: Unify write buffer on/offbayi cheng1-24/+16
The logical structures of mtk_nor_write_buffer_enable and mtk_nor_write_buffer_disable are very similar, So it is necessary to combine them into one. Signed-off-by: bayi cheng <bayi.cheng@mediatek.com> Link: https://lore.kernel.org/r/20221115124655.10124-1-bayi.cheng@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-25spi: intel: Add support for SFDP opcodeMika Westerberg1-0/+6
The Intel SPI-NOR controller supports SFDP (Serial Flash Discoverable Parameter) opcode so add it to the list of supported opcodes. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20221025064623.22808-5-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-25spi: intel: Take possible chip address into account in ↵Mika Westerberg1-2/+4
intel_spi_read/write_reg() The SPI-NOR operation can have non-zero chip address as well so take this into account in intel_spi_read/write_reg(). Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20221025064623.22808-4-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-25spi: intel: Implement adjust_op_size()Mika Westerberg1-7/+7
This allows us to get rid of the checks in the intel_spi_[sh]w_cycle() and makes it possible for the SPI-NOR core to split the transaction into smaller chunks as needed. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20221025064623.22808-3-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-25spi: intel: Use ->replacement_op in intel_spi_hw_cycle()Mika Westerberg1-29/+23
This way we do not need the SPI-NOR opcode -> Intel controller opcode mapping in the function anymore. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20221025064623.22808-2-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-25Merge tag 'v6.1-rc4' into spi-6.2Mark Brown2-1/+3
Linux 6.1-rc4 which should get my CI working on RPi3s again.
2022-11-25Nuvoton WPCM450 FIU SPI flash controllerMark Brown3-0/+520
Merge series from Jonathan Neuschäfer <j.neuschaefer@gmx.net>: This patchset adds DT bindings and a driver for the Flash Interface Unit (FIU), the SPI flash controller in the Nuvoton WPCM450 BMC SoC. It supports four chip selects, and direct (memory-mapped) access to 16 MiB per chip. Larger flash chips can be accessed by software-defined SPI transfers. The existing NPCM7xx FIU driver is sufficitently incompatible with the WPCM450 FIU that I decided to write a new driver.
2022-11-25spi: cadence: Drop obsolete dependency on COMPILE_TESTJean Delvare2-5/+1
Since commit 0166dc11be91 ("of: make CONFIG_OF user selectable"), it is possible to test-build any driver which depends on OF on any architecture by explicitly selecting OF. Therefore depending on COMPILE_TEST as an alternative is no longer needed. Signed-off-by: Jean Delvare <jdelvare@suse.de> Link: https://lore.kernel.org/r/20221125083114.67e7f83c@endymion.delvare Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-25spi: wpcm-fiu: Add direct map supportJonathan Neuschäfer1-0/+64
Besides software controlled SPI transfers (UMA, "user mode access"), FIU also supports a 16 MiB mapping window per attached flash chip. This patch implements direct mapped read access, to speed up flash reads. Without direct mapping: # time dd if=/dev/mtd0ro of=dump bs=1M 16+0 records in 16+0 records out real 1m 47.74s user 0m 0.00s sys 1m 47.75s With direct mapping: # time dd if=/dev/mtd0ro of=dump bs=1M 16+0 records in 16+0 records out real 0m 30.81s user 0m 0.00s sys 0m 30.81s Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20221124191400.287918-4-j.neuschaefer@gmx.net Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-25spi: wpcm-fiu: Add driver for Nuvoton WPCM450 Flash Interface Unit (FIU)Jonathan Neuschäfer3-0/+456
The Flash Interface Unit (FIU) is the SPI flash controller in the Nuvoton WPCM450 BMC SoC. It supports four chip selects, and direct (memory-mapped) access to 16 MiB per chip. Larger flash chips can be accessed by software-defined SPI transfers. The FIU in newer NPCM7xx SoCs is not compatible with the WPCM450 FIU. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20221124191400.287918-3-j.neuschaefer@gmx.net Signed-off-by: Mark Brown <broonie@kernel.org>
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