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path: root/drivers/spi
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2016-05-04spi: zynqmp: disable clocks in error pathsShubhrajyoti Datta1-1/+2
The if pclk enable fails the refclk is not disabled. Fix the same. Signed-off-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-02spi: Drop unnecessary dependencies on relaxed I/O accessorsAxel Lin1-2/+0
The relaxed I/O accessors are available on all architectures now. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-02spi: qup: Add spi_master_put in remove functionPramod Gurav1-0/+2
Release memory allocated for spi master by calling spi_master_put in .remove function. Signed-off-by: Pramod Gurav <pramod.gurav@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-02spi: qup: Handle clocks in pm_runtime suspend and resumePramod Gurav1-0/+13
Clocks must ne disabled in pm_runtime to achieve some power saving. Enable the clocks when the device is runtime resumed during a transfer. Signed-off-by: Pramod Gurav <pramod.gurav@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-29spi: st-ssc4: Fix missing spi_master_put in spi_st_probe error pathsAxel Lin1-3/+5
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-29spi: st-ssc4: Allow compile test buildAxel Lin1-1/+1
There is no build dependency for this driver, so enable COMPILE_TEST to get better build coverage. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-29spi: omap2-mcspi: Use dma_request_chan() for requesting DMA channelPeter Ujfalusi1-65/+18
With the new dma_request_chan() the client driver does not need to look for the DMA resource and it does not need to pass filter_fn anymore. By switching to the new API the driver can now support deferred probing against DMA. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-29spi: davinci: Use dma_request_chan() for requesting DMA channelPeter Ujfalusi1-52/+24
With the new dma_request_chan() the client driver does not need to look for the DMA resource and it does not need to pass filter_fn anymore. By switching to the new API the driver can now support deferred probing against DMA. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-29spi: pic32: Fix checking return value of devm_ioremap_resourceAxel Lin1-4/+3
devm_ioremap_resource() returns ERR_PTR on error. Also remove the redundant dev_err message, the implementation of devm_ioremap_resource() already print error messages on error paths. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-26spi: Drop duplicate code to set master->dev.parentAxel Lin3-3/+0
It's done by spi_alloc_master(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-26spi: pic32: Set proper bits_per_word_maskAxel Lin1-11/+2
This driver only supports 8/16/32 bits_per_word, so set master->bits_per_word_mask accordingly. With this change, we can remove the spi->bits_per_word checking in pic32_spi_setup as it's done by spi core. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-26spi: pxa2xx: Do not detect number of enabled chip selects on Intel SPTJarkko Nikula1-1/+1
Certain Intel Sunrisepoint PCH variants report zero chip selects in SPI capabilities register even they have one per port. Detection in pxa2xx_spi_probe() sets master->num_chipselect to 0 leading to -EINVAL from spi_register_master() where chip select count is validated. Fix this by not using SPI capabilities register on Sunrisepoint. They don't have more than one chip select so use the default value 1 instead of detection. Fixes: 8b136baa5892 ("spi: pxa2xx: Detect number of enabled Intel LPSS SPI chip select signals") Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2016-04-25spi: return error if kmap'd buffers passed to spi_map_buf()Vignesh R1-1/+3
Current spi_map_buf() implementation supports creates sg_table for vmalloc'd and kmalloc'd buffers. Therefore return error if kmap'd buffer (or any other buffer) is passed to spi_map_buf(). Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-22spi: pic32-sqi: silence array overflow warningDan Carpenter1-1/+1
We read one element beyond the end of the array when we access "rdesc[i + 1]" so it causes a static checker warning. It's harmless because we write over it again on the next line. But let's just silence the warning. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Purna Chandra Mandal <purna.mandal@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-22spi: spi-orion: enable the driver on ARCH_MVEBU platformsThomas Petazzoni1-1/+1
The SPI controller managed by the spi-orion is used on the new ARM64 Marvell Armada 7K/8K SoCs. In order to allow this driver to be built for this platform, we allow it to be selected for ARCH_MVEBU=y configurations. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-20spi: spi-pxa2xx: Remove CLK_IS_ROOTStephen Boyd1-2/+2
This flag is a no-op now (see commit 47b0eeb3dc8a "clk: Deprecate CLK_IS_ROOT", 2016-02-02) so remove it. Cc: Daniel Mack <daniel@zonque.org> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-18spi: pic32-sqi: add SPI driver for PIC32 SQI controller.Purna Chandra Mandal3-0/+775
This driver implements SPI master interface for Quad SPI controller, specifically for accessing quad SPI flash. It uses descriptor-based DMA transfer mode and supports half-duplex communication for single, dual and quad SPI transactions. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-18spi: bcm53xx: add spi_flash_read callback for MMIO-based readsRafał Miłecki1-2/+76
This implements more efficient reads of SPI-attached flash content. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-18spi: cadence: mark pm functions __maybe_unusedArnd Bergmann1-2/+2
The newly added runtime PM support for the cadence spi driver causes harmless warnings when PM is disabled: drivers/spi/spi-cadence.c:681:12: warning: 'cnds_runtime_suspend' defined but not used drivers/spi/spi-cadence.c:652:12: warning: 'cnds_runtime_resume' defined but not used This adds __maybe_unused annotations to the respective functions to shut up the warnings, while leaving the code in place for compile testing and avoiding ugly #ifdefs. Fixes: d36ccd9f7ea4 ("spi: cadence: Runtime pm adaptation") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-15spi: dln2: Pass of_node to spi masterCrestez Dan Leonard1-0/+3
This allows defining SPI devices connected to a DLN2 using devicetree. This already works for i2c because of a similar patch: 3b10db23: i2c: dln2: set the device tree node of the adapter Signed-off-by: Crestez Dan Leonard <leonard.crestez@intel.com> Acked-by: Laurentiu Palcu <laurentiu.palcu@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-13dmaengine: dw: rename masters to reflect actual topologyAndy Shevchenko1-4/+4
The source and destination masters are reflecting buses or their layers to where the different devices can be connected. The patch changes the master names to reflect which one is related to which independently on the transfer direction. The outcome of the change is that the memory data width is now always limited by a data width of the master which is dedicated to communicate to memory. The patch will not break anything since all current users have the same data width for all masters. Though it would be nice to revisit avr32 platforms to check what is the actual hardware topology in use there. It seems that it has one bus and two masters on it as stated by Table 8-2, that's why everything works independently on the master in use. The purpose of the sequential patch is to fix the driver for configuration of more than one bus. The change is done in the assumption that src_master and dst_master are reflecting a connection to the memory and peripheral correspondently on avr32 and otherwise on the rest. Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no> Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-04-13spi: spi-ti-qspi: Handle truncated frames properlyBen Hutchings1-12/+20
We clamp frame_len_words to a maximum of 4096, but do not actually limit the number of words written or read through the DATA registers or the length added to spi_message::actual_length. This results in silent data corruption for commands longer than this maximum. Recalculate the length of each transfer, taking frame_len_words into account. Use this length in qspi_{read,write}_msg(), and to increment spi_message::actual_length. Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2016-04-13spi: spi-ti-qspi: Fix FLEN and WLEN settings if bits_per_word is overriddenBen Hutchings1-6/+9
Each transfer can specify 8, 16 or 32 bits per word independently of the default for the device being addressed. However, currently we calculate the number of words in the frame assuming that the word size is the device default. If multiple transfers in the same message have differing bits_per_word, we bitwise-or the different values in the WLEN register field. Fix both of these. Also rename 'frame_length' to 'frame_len_words' to make clear that it's not a byte count like spi_message::frame_length. Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2016-04-12spi: let SPI masters ignore their children for PMLinus Walleij1-0/+1
Let all SPI masters ignore their children: when it comes to power management: SPI children have no business doing keeping their parents awake: they are completely autonomous devices that just use their parent to talk, and the latter usecase must be power managed by the host itself on a per-message basis. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-12spi: omap2-mcspi: Undo broken fix for dma transfer of vmalloced bufferAkinobu Mita1-17/+45
This reverts commit 3525e0aac91c4de5d20b1f22a6c6e2b39db3cc96. The DMA transfer for RX buffer was not handled correctly in this change. The actual transfer length for DMA RX can be less than xfer->len in the specific condition and the last words will be filled after the DMA completion, but the commit doesn't consider it and the dmaengine is started with rx_sg mapped by spi core. The solution for this at least requires more lines than this commit has inserted. So revert it for now. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-06spi: cadence: Fix some checkpatch warningsShubhrajyoti Datta1-2/+4
No functional change. Fixing some style related issues CHECK: multiple assignments should be avoided + new_ctrl_reg = ctrl_reg = cdns_spi_read(xspi, CDNS_SPI_CR); CHECK: Alignment should match open parenthesis +static void cdns_spi_config_clock_freq(struct spi_device *spi, + struct spi_transfer *transfer) CHECK: Please use a blank line after function/struct/union/enum declarations +} +static int cdns_prepare_message(struct spi_master *master, Signed-off-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-05spi: spi-fsl-dspi: Fix cs_change handling in message transferAndrey Vostrikov1-2/+2
There are use cases when chip select should be triggered between transfers in single SPI message. Current implementation does this only on last transfer in message ignoring cs_change value provided in current transfer. Signed-off-by: Andrey Vostrikov <andrey.vostrikov@cogentembedded.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-05spi: cadence: Return the error code for cdns_spi_suspend and cdns_spi_resumeShubhrajyoti Datta1-7/+3
Return the error code for cdns_spi_suspend and cdns_spi_resume. Also fixes a comment where which claims that the error code is returned. Signed-off-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-05spi: cadence: Remove the clock enable and disable from suspend and resumeShubhrajyoti Datta1-19/+0
Now that the clocks are enabled and disabled per transaction , remove the clock enable and disable from resume and suspend hooks. Signed-off-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-05spi: cadence: Runtime pm adaptationShubhrajyoti Datta1-2/+68
Currently the clocks are enabled at probe and disabled at remove. This patch moves the clock enable to the start of transaction and disables at the end. Signed-off-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-05spi: cadance: Fix the DocumentationShubhrajyoti Datta1-1/+1
cdns_spi_chipselect has parameter is_high however the comment describes it as is_on. Also fixes the below warning. drivers/spi/spi-cadence.c:182: warning: No description found for parameter 'is_high' drivers/spi/spi-cadence.c:182: warning: Excess function parameter 'is_on' description in 'cdns_spi_chipselect' Signed-off-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-05spi: cadence: Fix probe error handlingShubhrajyoti Datta1-2/+2
The clock disabling is missed out in some error cases at probe. Fix the same. Signed-off-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-05spi: cadence: Remove _MASK and _OFFSET suffixShubhrajyoti Datta1-87/+74
Remove the _MASK and _OFFSET from the macros. It improves readability, removes some checkpatch error for exceeding 80 chars and also prevents some linebreaks. Signed-off-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-05spi: cadence: Fix a check patch warningShubhrajyoti Datta1-1/+1
CHECK: Comparison to NULL could be written "!master" + if (master == NULL) Signed-off-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-04Merge remote-tracking branches 'spi/fix/omap2' and 'spi/fix/rockchip' into ↵Mark Brown2-51/+27
spi-linus
2016-04-04Merge remote-tracking branch 'spi/fix/imx' into spi-linusMark Brown1-2/+14
2016-04-04Merge remote-tracking branch 'spi/fix/core' into spi-linusMark Brown1-2/+2
2016-04-04spi: spi-pic32: Add PIC32 SPI master driverPurna Chandra Mandal3-0/+895
The PIC32 SPI driver is capable of performing SPI transfers using PIO or external DMA engine. GPIO controlled /CS support is made default in the driver for correct operation of the controller. This can be enabled by adding "cs-gpios" property of the SPI node in board dts file. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-31spi: rockchip: fix probe deferral handlingShawn Lin1-5/+9
Use dma_request_chan instead of dma_request_slave_channel, in this case we can check EPROBE_DEFER without static warning. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-28spi: pxa2xx: Fix cs_change managementChristophe Ricard1-3/+2
Fix cs_change management so that it is in line with other spi drivers. In the spi core api helpers such as spi_bus_lock/unlock and spi_sync_locked or cs_change field in spi_transfer help to manage chip select from the device driver. The driver was setting the chip select to idle if the message queue was empty despite cs_change or other status field set by spi_bus_lock/unlock or spi_sync_locked. Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-28spi/fsl-espi: avoid infinite loops on fsl_espi_cpu_irq()Nobuteru Hayashi1-1/+9
It brought nearly infinite loops, and was possible to be occurred only if the SPI transaction total size are not alighed with 4. Loops are here at while (tmp--), tmp is unsigned, and set it with minus value. The loops are executed as a result of unexpected RX interrupt occurrence after that. This interrupt may be hardware eratta and is not fixed. Fix mspi->len from minus value to 0 and print warning message. Signed-off-by: Nobuteru Hayashi <hayashi.nbb@ncos.nec.co.jp> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-28spi/fsl-espi: Don't wait transaction completion foreverNobuteru Hayashi1-1/+6
Because the eSPI driver uses wait_for_completion(), any stuck-able phenomenon at half-way transaction progress made worker task hang up. This phenomenon is perhaps caused by eSPI device errata which seems not to be published from vendor site yet. Anyway, we fix hang task by using fixed 2 seconds timeout that is our preferred value for eSPI maximum transaction size. It seems to be better that eSPI driver can detect this stuck and report error (EMSGSIZE) to the upper device driver because the upper device driver can decide to retry or recover. Signed-off-by: Nobuteru Hayashi <hayashi.nbb@ncos.nec.co.jp> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-28spi/fsl-espi: Don't spin forever on SPIE_RXCNTNobuteru Hayashi1-3/+10
Infinite loop on SPIE_RXCNT occurred. while (SPIE_RXCNT(events) < min(4, mspi->len)) { cpu_relax(); events = mpc8xxx_spi_read_reg(&reg_base->event); } We met a soft lockup at fsl_espi_cpu_irq() because of this. Fix it by using spin_event_timeout() so that fsl_espi_cpu_irq() can break loop with timeouts dmesg. Signed-off-by: Nobuteru Hayashi <hayashi.nbb@ncos.nec.co.jp> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-28spi: pxa2xx: Use dummy buffers provided by SPI coreJarkko Nikula3-10/+2
Dummy buffer is used for half duplex transfers that don't have TX or RX buffer set. Instead of own dummy buffer management here let the SPI core to handle it by setting the SPI_MASTER_MUST_RX and SPI_MASTER_MUST_TX flags. Then core makes sure both transfer buffers are set. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-28spi: pxa2xx: Remove rx_/tx_map_len members from struct driver_dataJarkko Nikula2-7/+0
spi-pxa2xx-dma.c DMA engine implementation stopped using PIO for unaligned trailing bytes in the commit 111e0a9dc71e ("spi/pxa2xx: Prevent DMA from transferring too many bytes"). This means there is no need to update tx/rx transfer buffer pointers after DMA completion. These buffer pointers will be set to new buffers when handling the next transfer. Because this buffer pointer update was only remaining use for rx_map_len and tx_map_len members in struct driver_data after removing the legacy PXA DMA implementation they can be removed now. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-28spi: pxa2xx: handle error of pxa2xx_spi_dma_prepare()Andy Shevchenko2-3/+18
If by some reason pxa2xx_spi_dma_prepare() fails we have not to ignore its error. In such case we abort the transfer and return the error to upper level. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> [Jarkko: Avoid leaking TX descriptors in case RX descriptor allocation fails. Noted by Robert Jarzmik <robert.jarzmik@free.fr>. Unmap also buffers in case of failure.] Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-23spi: fsl-dspi: Set max_speed_hz for masterBhuvanchandra DV1-0/+7
Calculate and update max speed from bus clock for SoCs using DSPI IP. The bus clock factor's are taken from the data sheets of respective SoCs. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-23spi: omap2-mcspi: fix dma transfer for vmalloced bufferAkinobu Mita1-45/+17
Currently omap2-mcspi cannot handle dma transfer for vmalloced buffer. I hit this problem when using mtdblock on spi-nor. This lets the SPI core handle the page mapping for dma transfer buffer. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-23spi: xlp: Enable SPI driver for Broadcom Vulcan ARM64Kamlakant Patel1-1/+1
- Vulcan spi controller is compatible with netlogic,xlp832-spi. - Add depends on ARCH_VULCAN to Kconfig to enable spi controller driver for Broadcom Vulcan ARM64 SoCs. Signed-off-by: Kamlakant Patel <kamlakant.patel@broadcom.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-21spi: octeon: Convert to use devm_ioremap_resourceAxel Lin1-11/+6
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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