summaryrefslogtreecommitdiff
path: root/drivers/spi/spi-dw.h
AgeCommit message (Expand)AuthorFilesLines
2020-12-09spi: dw: Add support for 32-bits max xfer sizeDamien Le Moal1-0/+5
2020-10-09spi: dw: Introduce max mem-ops SPI bus frequency settingSerge Semin1-0/+1
2020-10-09spi: dw: Add memory operations supportSerge Semin1-0/+13
2020-10-09spi: dw: Add generic DW SSI status-check methodSerge Semin1-0/+1
2020-10-09spi: dw: Move num-of retries parameter to the header fileSerge Semin1-0/+2
2020-10-09spi: dw: De-assert chip-select on resetSerge Semin1-3/+4
2020-10-09spi: dw: Refactor data IO procedureSerge Semin1-3/+2
2020-10-09spi: dw: Add DW SPI controller config structureSerge Semin1-0/+10
2020-10-09spi: dw: Add DWC SSI capabilitySerge Semin1-8/+1
2020-09-29Merge series "spi: dw: Add full Baikal-T1 SPI Controllers support" from Serge...Mark Brown1-23/+22
2020-09-29spi: spi-dw: Remove extraneous lockingSerge Semin1-1/+0
2020-09-29spi: dw: Add KeemBay Master capabilitySerge Semin1-0/+8
2020-09-29spi: dw: Convert CS-override to DW SPI capabilitiesSerge Semin1-1/+6
2020-09-29spi: dw: Discard DW SSI chip type storagesSerge Semin1-1/+0
2020-09-29spi: dw: Use relaxed IO-methods to access FIFOsSerge Semin1-14/+4
2020-09-29spi: dw: Clear IRQ status on DW SPI controller resetSerge Semin1-3/+4
2020-09-29spi: dw: Discard IRQ threshold macroSerge Semin1-3/+0
2020-09-29spi: dw-dma: Add one-by-one SG list entries transferSerge Semin1-0/+1
2020-09-08spi: dw: Add support for RX sample delay registerLars Povlsen1-0/+3
2020-05-29spi: dw: Use regset32 DebugFS method to create regdump fileSerge Semin1-0/+2
2020-05-29spi: dw: Cleanup generic DW DMA code namingsSerge Semin1-4/+4
2020-05-29spi: dw: Move Non-DMA code to the DW PCIe-SPI driverSerge Semin1-3/+11
2020-05-29spi: dw: Use DMA max burst to set the request thresholdsSerge Semin1-0/+2
2020-05-29spi: dw: Locally wait for the DMA transfers completionSerge Semin1-0/+2
2020-05-22spi: dw: Discard dma_width member of the dw_spi structureSerge Semin1-1/+0
2020-05-22spi: dw: Discard unused void priv pointerSerge Semin1-2/+0
2020-05-22spi: dw: Discard static DW DMA slave structuresSerge Semin1-2/+0
2020-05-07spi: dw: Get rid of dma_inited flagAndy Shevchenko1-1/+0
2020-05-06spi: dw: Add Elkhart Lake PSE DMA supportJarkko Nikula1-0/+1
2020-05-06spi: dw: Propagate struct device pointer to ->dma_init() callbackAndy Shevchenko1-1/+1
2020-05-06spi: dw: Add 'mfld' suffix to Intel Medfield related routinesAndy Shevchenko1-1/+2
2020-05-06spi: dw: Downgrade interrupt.h to irqreturn.h where appropriateAndy Shevchenko1-1/+1
2020-05-06spi: dw: Move interrupt.h to spi-dw.h who is user of itAndy Shevchenko1-0/+1
2020-05-05spi: dw: Add support for DesignWare DWC_ssiWan Ahmad Zainie1-0/+12
2020-05-05spi: dw: Add update_cr0() callback to update CTRLR0Wan Ahmad Zainie1-0/+5
2020-05-05spi: dw: Fix typo in few registers nameWan Ahmad Zainie1-4/+4
2020-04-16spi: dw: remove unused dw_spi_chip handlingClement Leger1-12/+0
2020-01-03spi: spi-dw: Add lock protect dw_spi rx/tx to prevent concurrent callswuxu.wu1-0/+1
2019-10-30spi: dw: Drop GPIO headerLinus Walleij1-1/+0
2018-10-11dw: spi: add support for Amazon's Alpine spi controllerTalel Shenhar1-0/+2
2018-07-30spi: dw: export dw_spi_set_csAlexandre Belloni1-0/+1
2018-07-18spi: dw: allow providing own set_cs callbackAlexandre Belloni1-0/+1
2018-02-12spi: dw: Convert to generalized SPI controller APIJarkko Nikula1-2/+2
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman1-0/+1
2017-01-09spi: dw: Make debugfs use bus num and make irq name uniquePhil Reid1-1/+0
2016-09-06spi: dw: fix multiple slaves with different baudratesMatthias Seidel1-0/+1
2015-11-30spi: dw-mid: constify dw_spi_dma_ops structureJulia Lawall1-1/+1
2015-10-19spi: dw: introduce spi_shutdown_chip()Andy Shevchenko1-0/+6
2015-08-21spi: dw: Allow interface drivers to limit data I/O to word sizesMichael van der Westhuizen1-0/+35
2015-03-17spi: dw-spi: Convert 16bit accesses to 32bit accessesThor Thayer1-10/+0
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-28 01:31:11 +0300