starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2022-07-13	spi: dw: Add support for master mode selection for DWC SSI controller	Nandhini Srikandan	1	-2/+3
2022-06-27	spi: dw: Add deferred DMA-channels setup support	Serge Semin	1	-1/+4
2021-12-23	spi: dw: Propagate firmware node	Andy Shevchenko	1	-2/+2
2021-11-16	spi: dw: Replace DWC_HSSI capability with IP-core version checker	Serge Semin	1	-4/+4
2021-11-16	spi: dw: Introduce Synopsys IP-core versions interface	Serge Semin	1	-0/+14
2021-11-16	spi: dw: Convert to using the Bitfield access macros	Serge Semin	1	-12/+19
2021-11-16	spi: dw: Put the driver entities naming in order	Serge Semin	1	-68/+70
2021-11-16	spi: dw: Discard redundant DW SSI Frame Formats enumeration	Serge Semin	1	-2/+2
2021-11-16	spi: dw: Add a symbols namespace for the core module	Serge Semin	1	-7/+7
2020-12-09	spi: dw: Add support for 32-bits max xfer size	Damien Le Moal	1	-7/+37
2020-11-25	spi: dw: Fix spi registration for controllers overriding CS	Lars Povlsen	1	-1/+2
2020-11-17	spi: dw: Set transfer handler before unmasking the IRQs	Serge Semin	1	-2/+2
2020-10-09	spi: dw: Add poll-based SPI transfers support	Serge Semin	1	-1/+39
2020-10-09	spi: dw: Introduce max mem-ops SPI bus frequency setting	Serge Semin	1	-1/+3
2020-10-09	spi: dw: Add memory operations support	Serge Semin	1	-0/+301
2020-10-09	spi: dw: Add generic DW SSI status-check method	Serge Semin	1	-9/+34
2020-10-09	spi: dw: Explicitly de-assert CS on SPI transfer completion	Serge Semin	1	-1/+1
2020-10-09	spi: dw: Discard chip enabling on DMA setup error	Serge Semin	1	-3/+1
2020-10-09	spi: dw: Unmask IRQs after enabling the chip	Serge Semin	1	-2/+2
2020-10-09	spi: dw: Perform IRQ setup in a dedicated function	Serge Semin	1	-18/+23
2020-10-09	spi: dw: Refactor IRQ-based SPI transfer procedure	Serge Semin	1	-9/+24
2020-10-09	spi: dw: Refactor data IO procedure	Serge Semin	1	-20/+17
2020-10-09	spi: dw: Add DW SPI controller config structure	Serge Semin	1	-12/+17
2020-10-09	spi: dw: Update Rx sample delay in the config function	Serge Semin	1	-7/+6
2020-10-09	spi: dw: Simplify the SPI bus speed config procedure	Serge Semin	1	-13/+10
2020-10-09	spi: dw: Update SPI bus speed in a config function	Serge Semin	1	-14/+14
2020-10-09	spi: dw: Detach SPI device specific CR0 config method	Serge Semin	1	-13/+30
2020-10-09	spi: dw: Add DWC SSI capability	Serge Semin	1	-43/+37
2020-10-09	spi: dw: Use an explicit set_cs assignment	Serge Semin	1	-4/+4
2020-09-29	spi: spi-dw: Remove extraneous locking	Serge Semin	1	-12/+2
2020-09-29	spi: dw: Add KeemBay Master capability	Serge Semin	1	-0/+4
2020-09-29	spi: dw: Convert CS-override to DW SPI capabilities	Serge Semin	1	-2/+2
2020-09-29	spi: dw: Discard DW SSI chip type storages	Serge Semin	1	-4/+2
2020-09-29	spi: dw: Disable all IRQs when controller is unused	Serge Semin	1	-5/+5
2020-09-29	spi: dw: Initialize n_bytes before the memory barrier	Serge Semin	1	-1/+1
2020-09-08	spi: dw: Add support for RX sample delay register	Lars Povlsen	1	-0/+26
2020-05-30	Merge remote-tracking branch 'spi/for-5.8' into spi-next	Mark Brown	1	-0/+545
2020-05-29	spi: dw: Use regset32 DebugFS method to create regdump file	Serge Semin	1	-60/+26
2020-05-29	spi: dw: Add core suffix to the DW APB SSI core source file	Serge Semin	1	-0/+577