index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
reset
/
Makefile
Age
Commit message (
Expand
)
Author
Files
Lines
2016-02-05
reset: img: Add Pistachio reset controller driver
Damien Horsley
1
-0
/
+1
2015-11-20
reset: hi6220: Reset driver for hisilicon hi6220 SoC
Chen Feng
1
-0
/
+1
2015-11-16
reset: remove redundant $(CONFIG_RESET_CONTROLLER) from Makefile
Masahiro Yamada
1
-1
/
+1
2015-08-16
Merge branch 'reset/ath79' into reset/next
Philipp Zabel
1
-0
/
+1
2015-08-04
reset: reset-zynq: Adding support for Xilinx Zynq reset controller.
Moritz Fischer
1
-0
/
+1
2015-08-04
reset: Add a driver for the reset controller on the AR71XX/AR9XXX
Alban Bedel
1
-0
/
+1
2015-08-03
reset: add driver for lpc18xx rgu
Joachim Eastwood
1
-0
/
+1
2014-10-20
reset: add the Berlin reset controller driver
Antoine Ténart
1
-0
/
+1
2014-04-26
reset: add driver for socfpga
Steffen Trumtrar
1
-0
/
+1
2014-03-11
drivers: reset: STi SoC system configuration reset controller support
Stephen Gallimore
1
-0
/
+1
2013-11-23
reset: Add Allwinner SoCs Reset Controller Driver
Maxime Ripard
1
-0
/
+1
2013-04-12
reset: Add reset controller API
Philipp Zabel
1
-0
/
+1