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path: root/drivers/pwm/pwm-mediatek.c
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2021-09-02pwm: mediatek: Simplify using devm_pwmchip_add()Uwe Kleine-König1-11/+1
This allows to drop the platform_driver's remove function. This is the only user of driver data so this can go away, too. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2021-04-23pwm: mediatek: Remove unused functionJiapeng Chong1-6/+0
Fix the following clang warning: drivers/pwm/pwm-mediatek.c:110:19: warning: unused function 'pwm_mediatek_readl' [-Wunused-function]. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2021-03-22pwm: Always allocate PWM chip base ID dynamicallyUwe Kleine-König1-1/+0
Since commit 5e5da1e9fbee ("pwm: ab8500: Explicitly allocate pwm chip base dynamically") all drivers use dynamic ID allocation explicitly. New drivers are supposed to do the same, so remove support for driver specified base IDs and drop all assignments in the low-level drivers. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2020-12-17pwm: mediatek: Add MT8183 SoC supportFabien Parent1-0/+7
Add PWM support for the MT8183 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2020-12-17pwm: mediatek: Always use bus clockFabien Parent1-0/+12
The MediaTek PWM IP can sometimes use the 26 MHz source clock to generate the PWM signal, but the driver currently assumes that we always use the PWM bus clock to generate the PWM signal. This commit modifies the PWM driver in order to force the PWM IP to always use the bus clock as source clock. I do not have the datasheet of all the MediaTek SoC, so I don't know if the register to choose the source clock is present in all the SoCs or only in subset. As a consequence I made this change optional by using a platform data paremeter to says whether this register is supported or not. On all the SoCs I don't have the datasheet (MT2712, MT7622, MT7623, MT7628, MT7629) I kept the behavior to be the same as before this change. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2020-12-17pwm: mediatek: Convert to devm_platform_ioremap_resource()Yangtao Li1-3/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2020-07-30pwm: mediatek: Provide missing kerneldoc description for 'soc' argLee Jones1-0/+1
Kerneldoc syntax is used, but not complete. Descriptions are required for all arguments. Fixes the following W=1 build warning: drivers/pwm/pwm-mediatek.c:57: warning: Function parameter or member 'soc' not described in 'pwm_mediatek_chip' Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: John Crispin <blogic@openwrt.org> Cc: Zhi Mao <zhi.mao@mediatek.com> Cc: linux-pwm@vger.kernel.org Cc: linux-mediatek@lists.infradead.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-09-26pwm: mediatek: Add MT7629 compatible stringSam Shih1-0/+6
This adds pwm support for MT7629, and separate mt7629 compatible string from mt7622 Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-09-25pwm: mediatek: Update license and switch to SPDX tagSam Shih1-5/+3
Add SPDX identifiers to pwm-mediatek.c. Update MODULE_LICENSE to correctly reflect the GNU General Public License v2.0. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-09-25pwm: mediatek: Use pwm_mediatek as common prefixSam Shih1-57/+60
Use pwm_mediatek as common prefix to match the filename. No functional change intended. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Sam Shih <sam.shih@mediatek.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-09-25pwm: mediatek: Allocate the clks array dynamicallySam Shih1-35/+44
Instead of using fixed size of arrays, allocate the memory for them based on the number of PWMs specified for each SoC generation. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-09-25pwm: mediatek: Remove the has_clks fieldSam Shih1-13/+1
We can use fixed clocks to repair mt7628 PWM during configure from userspace. The SoC is legacy MIPS and has no complex clock tree. Because we can get the clock frequency for period calculation from fixed clocks specified in DT, we can remove the has_clock field, and directly use devm_clk_get() and clk_get_rate(). Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Sam Shih <sam.shih@mediatek.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-09-21pwm: mediatek: Drop the check for of_device_get_match_data()Sam Shih1-7/+3
This patch drop the check for of_device_get_match_data. Due to the only way call driver probe is compatible match. The data pointer which points to the SoC specify data is directly set by driver, and it should not be NULL in our case. We can safety remove the check for the result of of_device_get_match_data(). Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Sam Shih <sam.shih@mediatek.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-09-21pwm: mediatek: Add MT8516 SoC supportFabien Parent1-0/+7
Add the compatible and the platform data to support PWM on the MT8516 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-08-20pwm: mediatek: Add MT7628 supportJohn Crispin1-1/+18
Add support for MT7628. The SoC is legacy MIPS and hence has no complex clock tree. This patch add an extra flag to the SoC specific data indicating, that no clocks are present. Signed-off-by: John Crispin <john@phrozen.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: mediatek: Improve precision in rate calculationSean Wang1-5/+12
Add a way that turning resolution from in nanosecond into in picosecond to improve noticeably almost 4.5% precision. It's necessary to hold the new resolution with type u64 and thus related operations on u64 are applied instead in those rate calculations. And the patch has a dependency on [1]. [1] http://lists.infradead.org/pipermail/linux-mediatek/2018-March/012225.html Cc: stable@vger.kernel.org Fixes: caf065f8fd58 ("pwm: Add MediaTek PWM support") Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: mediatek: Remove redundant MODULE_ALIAS entriesSean Wang1-1/+0
MODULE_ALIAS exports information to allow the module to be auto-loaded at boot for the drivers registered using legacy platform registration. However, currently the driver is always used by DT-only platform, MODULE_ALIAS is redundant and should be removed properly. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: mediatek: Fix up PWM4 and PWM5 malfunction on MT7623Sean Wang1-3/+21
Since the offset for both registers, PWMDWIDTH and PWMTHRES, used to control PWM4 or PWM5 are distinct from the other PWMs, whose wrong programming on PWM hardware causes waveform cannot be output as expected. Thus, the patch adds the extra condition for fixing up the weird case to let PWM4 or PWM5 able to work on MT7623. v1 -> v2: use pwm45_fixup naming instead of pwm45_quirk v2 -> v3: add more tags for Reviewed-by, Fixes, and Cc stable Cc: stable@vger.kernel.org Fixes: caf065f8fd58 ("pwm: Add MediaTek PWM support") Signed-off-by: Sean Wang <sean.wang@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Cc: Zhi Mao <zhi.mao@mediatek.com> Cc: John Crispin <john@phrozen.org> Cc: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-11-15pwm: mediatek: Add MT2712/MT7622 supportZhi Mao1-9/+44
Add support for MT2712 and MT7622. Due to register offset address of pwm7 for MT2712 is not fixed 0x40, add mtk_pwm_reg_offset array for PWM register offset. Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Zhi Mao <zhi.mao@mediatek.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-21pwm: mediatek: Disable clock on PWM configuration failureZhi Mao1-1/+6
Make sure to disable the PWM clock if the PWM cannot be configured due to the clock divider exceeding the maximum value. While at it, replace the hardcoded maximum clock divider with a defined constant to improve code readability. Signed-off-by: Zhi Mao <zhi.mao@mediatek.com> Acked-by: John Crispin <john@phrozen.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-21pwm: mediatek: Fix clock control issueZhi Mao1-22/+47
In order to save some power, do not prepare the top and main clocks during mtk_pwm_probe(). Instead, prepare the clocks only when necessary and also make sure to enable the clocks to match the semantics of the common clock framework. While at it, don't explicitly disable all PWM channels in ->remove() because all users should have done that already. Signed-off-by: Zhi Mao <zhi.mao@mediatek.com> Acked-by: John Crispin <john@phrozen.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-21pwm: mediatek: Fix PWM source clock selectionZhi Mao1-1/+1
In original code, the PWM output frequency is not correct when set bit<3>=1 to PWMCON register. Signed-off-by: Zhi Mao <zhi.mao@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: John Crispin <john@phrozen.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-04-13pwm: mediatek: Don't explicitly set .ownerkbuild test robot1-1/+0
drivers/pwm/pwm-mediatek.c:210:3-8: No need to set .owner here. The core will do it. Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci CC: John Crispin <john@phrozen.org> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-04-06pwm: Add MediaTek PWM supportJohn Crispin1-0/+220
This patch adds support for the PWM core found on current ARM base SoCs made by MediaTek. This IP core supports 5 channels and has 2 operational modes. There is the old mode, which is a classical PWM and the new mode which allows the user to define bitmasks that get clocked out on the pins. As the subsystem currently only supports PWM cores with the "old" mode, we can safely ignore the "new" mode for now. Signed-off-by: John Crispin <john@phrozen.org> [thierry.reding@gmail.com: minor cleanups] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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