index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
ptp
/
ptp_clockmatrix.h
Age
Commit message (
Expand
)
Author
Files
Lines
2021-09-27
ptp: clockmatrix: use rsmu driver to access i2c/spi bus
Min Li
1
-97
/
+20
2021-09-14
ptp: ptp_clockmatrix: Add support for pll_mode=0 and manual ref switch of WF ...
Min Li
1
-2
/
+45
2021-09-14
ptp: ptp_clockmatrix: Add support for FW 5.2 (8A34005)
Min Li
1
-5
/
+12
2021-02-18
ptp: ptp_clockmatrix: Remove unused header declarations.
Vincent Cheng
1
-2
/
+0
2021-02-18
ptp: ptp_clockmatrix: Add wait_for_sys_apll_dpll_lock.
Vincent Cheng
1
-0
/
+15
2020-12-10
ptp: clockmatrix: deprecate firmware older than 4.8.7
Min Li
1
-5
/
+6
2020-12-10
ptp: clockmatrix: Fix non-zero phase_adj is lost after snap
Min Li
1
-3
/
+2
2020-12-10
ptp: clockmatrix: remove 5 second delay before entering write phase mode
Min Li
1
-1
/
+0
2020-12-10
ptp: clockmatrix: reset device and check BOOT_STATUS
Min Li
1
-2
/
+7
2020-08-20
ptp: ptp_clockmatrix: use i2c_master_send for i2c write
Min Li
1
-0
/
+2
2020-07-31
ptp: ptp_clockmatrix: update to support 4.8.7 firmware
Min Li
1
-11
/
+50
2020-05-03
ptp: ptp_clockmatrix: Add adjphase() to support PHC write phase mode.
Vincent Cheng
1
-2
/
+6
2019-11-04
ptp: Add a ptp clock driver for IDT ClockMatrix.
Vincent Cheng
1
-0
/
+104