starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2022-06-15	pinctrl: amd: Implement pinmux functionality	Basavaraj Natikar	1	-1/+1325
2022-06-15	pinctrl: amd: Add amd_get_iomux_res function	Basavaraj Natikar	1	-0/+1
2022-06-15	pinctrl: amd: Define and use AMD_PINS macro	Basavaraj Natikar	1	-14/+7
2022-06-15	pinctrl: amd: Use PINCTRL_PINGROUP to manage pingroups	Basavaraj Natikar	1	-30/+6
2022-06-15	pinctrl: amd: Remove amd_pingroup and use pingroup	Basavaraj Natikar	1	-8/+2
2021-09-17	pinctrl: amd: Add irq field data	Basavaraj Natikar	1	-0/+1
2020-10-07	pinctrl: amd: Add missing pins to the pin group list	Shyam Sundar S K	1	-1/+68
2020-06-22	pinctrl: amd: fix npins for uart0 in kerncz_groups	Jacky Hu	1	-1/+1
2019-06-05	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422	Thomas Gleixner	1	-5/+1
2018-07-29	pinctrl/amd: fix gpio irq level in debugfs	Daniel Kurtz	1	-0/+4
2017-09-12	pinctrl/amd: save pin registers over suspend/resume	Daniel Drake	1	-0/+1
2017-03-16	pinctrl: amd: make use of raw_spinlock variants	Julia Cartwright	1	-1/+1
2016-12-28	pinctrl: amd: Add support for additional GPIO	Shah, Nehal-bakulchandra	1	-3/+5
2015-04-07	Fix inconsistent spinlock of AMD GPIO driver which can be	Ken Xue	1	-6/+6
2015-03-18	pinctrl: add AMD GPIO driver support.	Ken Xue	1	-0/+261