starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2019-08-07	pinctrl: broxton: Provide Interrupt Status register offset	Andy Shevchenko	1	-1/+3
2018-11-08	pinctrl: broxton: Code formatting fixes	Andy Shevchenko	1	-3/+3
2018-11-08	pinctrl: broxton: Get rid of unneeded ->probe() stub	Andy Shevchenko	1	-6/+1
2018-10-03	pinctrl: broxton: Convert unsigned to unsigned int	Andy Shevchenko	1	-53/+53
2018-09-19	pinctrl: intel: Move linux/pm.h to the local header	Andy Shevchenko	1	-1/+1
2018-08-31	pinctrl: broxton: Define PM ops via INTEL_PINCTRL_PM_OPS()	Andy Shevchenko	1	-4/+1
2018-08-31	pinctrl: broxton: Convert to use intel_pinctrl_probe_by_uid()	Andy Shevchenko	1	-39/+2
2018-07-02	pinctrl: intel: Convert to use SPDX identifier	Andy Shevchenko	1	-4/+1
2017-01-30	pinctrl: broxton: No need to take pointer of a pointer	Andy Shevchenko	1	-2/+2
2017-01-30	Merge tag 'v4.10-rc6' into devel	Linus Walleij	1	-1/+1
2017-01-26	pinctrl: broxton: Rename apl-pinctrl driver	Andy Shevchenko	1	-1/+1
2017-01-11	pinctrl: intel: Convert to use devm_gpiochip_add_data()	Mika Westerberg	1	-1/+0
2017-01-11	pinctrl: broxton: Use correct PADCFGLOCK offset	Mika Westerberg	1	-1/+1
2016-06-15	pinctrl/broxton: enable platform device in the absence of ACPI enumeration	Tan Jui Nee	1	-12/+31
2015-12-11	pinctrl: intel: fix bug of register offset calculation	Qipeng Zha	1	-0/+1
2015-10-27	pinctrl: intel: Add Intel Broxton pin controller support	Mika Westerberg	1	-0/+1065