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path: root/drivers/pinctrl/aspeed
AgeCommit message (Expand)AuthorFilesLines
2019-07-10pinctrl: aspeed: Strip moved macros and structs from private headerAndrew Jeffery1-498/+0
2019-07-10pinctrl: aspeed: Fix missed includeLinus Walleij1-0/+2
2019-07-03pinctrl: aspeed: Add implementation-related documentationAndrew Jeffery1-4/+200
2019-07-03pinctrl: aspeed: Split out pinmux from general pinctrlAndrew Jeffery7-255/+888
2019-07-03pinctrl: aspeed: Clarify comment about strapping W1CAndrew Jeffery1-1/+1
2019-07-03pinctrl: aspeed: Correct comment that is no longer trueAndrew Jeffery1-2/+1
2019-06-08pinctrl: aspeed: Add SGPM pinmuxHongwei Zhang1-0/+4
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner4-20/+4
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2-0/+2
2018-12-16pinctrl: aspeed: Wrap -Woverride-init with cc-optionNathan Chancellor1-1/+1
2018-08-31pinctrl: remove unnecessary unlikely()Igor Stoppa1-1/+1
2018-06-28pinctrl: aspeed: Fix documentationJoel Stanley1-2/+2
2017-08-31pinctrl: aspeed: Rework strap register write logic for the AST2500Andrew Jeffery1-10/+16
2017-08-22pinctrl: aspeed: Fix ast2500 strap register write logicYong Li2-2/+18
2017-08-22pinctrl: aspeed: g5: constify pinconf_ops, pinctrl_ops, and pinmux_ops struct...Julia Lawall1-3/+3
2017-08-22pinctrl: aspeed: g4: constify pinconf_ops, pinctrl_ops, and pinmux_ops struct...Julia Lawall1-2/+2
2017-08-14pinctrl: aspeed: g5: Add USB device and host supportAndrew Jeffery1-1/+57
2017-08-14pinctrl: aspeed: g4: Add USB device and host supportAndrew Jeffery1-7/+59
2017-04-24pinctrl: aspeed: g5: Add pinconf supportAndrew Jeffery1-1/+152
2017-04-24pinctrl: aspeed: g4: Add pinconf supportAndrew Jeffery1-1/+116
2017-04-24pinctrl: aspeed: Add core pinconf supportAndrew Jeffery2-0/+239
2017-04-11pinctrl: aspeed: Fix unused-const-variable warningsAndrew Jeffery1-6/+6
2017-03-14pinctrl: aspeed: Allow disabling Port D and Port E loopback modeRick Altherr1-2/+12
2017-01-26pinctrl: aspeed: g4: Fix mux configuration for GPIOs AA[4-7], AB[0-7]Andrew Jeffery1-16/+16
2016-12-28pinctrl: aspeed: Fix kerneldoc return descriptionsAndrew Jeffery1-6/+6
2016-12-28pinctrl: aspeed-g5: Add mux configuration for all pinsAndrew Jeffery2-4/+1475
2016-12-28pinctrl: aspeed-g4: Add mux configuration for all pinsAndrew Jeffery1-13/+1084
2016-12-28pinctrl: aspeed: Read and write bits in LPC and GFX controllersAndrew Jeffery4-88/+171
2016-11-07pinctrl-aspeed-g5: Never set SCU90[6]Andrew Jeffery1-1/+1
2016-10-18pinctrl: aspeed-g5: Fix pin association of SPI1 functionAndrew Jeffery1-8/+78
2016-10-18pinctrl: aspeed-g5: Fix GPIOE1 typoAndrew Jeffery1-1/+1
2016-10-18pinctrl: aspeed-g5: Fix names of GPID2 pinsAndrew Jeffery1-6/+6
2016-10-18pinctrl: aspeed: "Not enabled" is a significant mux stateAndrew Jeffery1-5/+7
2016-09-13pinctrl: aspeed: fix regmap error handlingArnd Bergmann1-3/+3
2016-09-07pinctrl: Add pinctrl-aspeed-g5 driverAndrew Jeffery3-0/+817
2016-09-07pinctrl: Add pinctrl-aspeed-g4 driverAndrew Jeffery3-0/+1240
2016-09-07pinctrl: Add core support for Aspeed SoCsAndrew Jeffery4-0/+1079
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