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path: root/drivers/phy/phy-omap-control.c
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2015-04-10Merge tag 'for-4.1' of ↵Greg Kroah-Hartman1-8/+2
git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next Kishon writes: New Features ============ *) Add driver for USB PHYs on sun9i *) Add driver for USB PHY on dm816x *) Modified exynos5-usbdrd driver to add support for Exynos5433 SoC Fixes ===== *) Fix power_on/power_off failure paths in some drivers *) Make miphy365x use generic PHY type constants *) Fix build errors due to missing export symbols in qcom-ufs driver *) Make all the functions return proper error values Cleanups ======== *) use PTR_ERR_OR_ZERO to simplify code *) use devm_kcalloc instead of devm_kzalloc with multiply *) remove un-necessary ifdef CONFIG_OF
2015-03-13phy: ti/omap: Fix modaliasAxel Lin1-1/+1
Remove extra space in MODULE_ALIAS. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-03-10phy: omap-control: Remove unneeded ifdef CONFIG_OF guard and of_match_ptrAxel Lin1-8/+2
if !CONFIG_OF, the probe fails. This is a dt-only driver, so the ifdef CONFIG_OF guard and of_match_ptr are not needed. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-12-23phy: phy-ti-pipe3: fix inconsistent enumeration of PCIe gen2 cardsVignesh R1-4/+3
Prior to DRA74x silicon rev 1.1, pcie_pcs register bits 8-15 and bits 16-23 were used to configure RC delay count for phy1 and phy2 respectively. phyid was used as index to distinguish the phys and to configure the delay values appropriately. As of DRA74x silicon rev 1.1, pcie_pcs register definition has changed. Bits 16-23 are used to configure delay values for *both* phy1 and phy2. Hence phyid is no longer required. So, drop id field from ti_pipe3 structure and its subsequent references for configuring pcie_pcs register. Also, pcie_pcs register now needs to be configured with delay value of 0x96 at bit positions 16-23. See register description of CTRL_CORE_PCIE_PCS in ARM572x TRM, SPRUHZ6, October 2014, section 18.5.2.2, table 18-1804. This is needed to ensure Gen2 cards are enumerated consistently. DRA72x silicon behaves same way as DRA74x rev 1.1 as far as this functionality is considered. Test results on DRA74x and DRA72x EVMs: Before patch ------------ DRA74x ES 1.0: Gen1 cards work, Gen2 cards do not work (expected result due to silicon errata) DRA74x ES 1.1: Gen1 cards work, Gen2 cards do not work sometimes due to incorrect programming of register DRA72x: Gen1 cards work, Gen2 cards do not work sometimes due to incorrect programming of register After patch ----------- DRA74x ES 1.0: Gen1 cards work, Gen2 cards do not work (expected result due to silicon errata) DRA74x ES 1.1: Gen1 cards work, Gen2 cards work consistently. DRA72x: Gen1 and Gen2 cards enumerate consistently. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-09-24phy: remove .owner field for drivers using module_platform_driverPeter Griffin1-1/+0
This patch removes the superflous .owner field for drivers which use the module_platform_driver or platform_driver_register api, as this is overriden in __platform_driver_register. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-09-24phy: phy-omap-control: Remove unncessary site specific OOM messagesPeter Griffin1-3/+1
The site specific OOM messages are unncessary, because they duplicate messages from the memory subsystem which include dump_stack(). Removing these superflous messages makes the kernel smaller. A discussion here http://patchwork.ozlabs.org/patch/324158/ found that all error paths from kzalloc will print a error message, and that any error path which maybe found which doesn't would be considered a bug in kzalloc. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-07-22phy: pipe3: insert delay to enumerate in GEN2 modeKishon Vijay Abraham I1-1/+51
8-bit delay value (0xF1) is required for GEN2 devices to be enumerated consistently. Added an API to be called from PHY drivers to set this delay value and called it from PIPE3 driver to set the delay value. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Roger Quadros <rogerq@ti.com>
2014-03-09phy: omap-control: update dra7 and am437 usb2 bindingsRoger Quadros1-2/+2
The dra7-usb2 and am437-usb2 bindings have not yet been used. Change them to be more elegant. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-03-09phy: rename struct omap_control_usb to struct omap_control_phyKishon Vijay Abraham I1-0/+320
Rename struct omap_control_usb to struct omap_control_phy since it can be used to control PHY of USB, SATA and PCIE. Also move the driver and include files under *phy* and made the corresponding changes in the users of phy-omap-control. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Felipe Balbi <balbi@ti.com>