starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2020-07-13	phy: cadence: salvo: fix wrong bit definition	Peter Chen	1	-1/+1
2020-05-18	phy: cadence: sierra: Fix for USB3 U1/U2 state	Sanket Parmar	1	-13/+14
2020-05-15	phy: phy-cadence-salvo: add phy .init API	Peter Chen	1	-1/+11
2020-05-07	phy: cadence: salvo: add salvo phy driver	Peter Chen	3	-0/+325
2020-03-20	phy: cadence-torrent: Add support for subnode bindings	Swapnil Jakhade	1	-75/+217
2020-03-20	phy: cadence-torrent: Add platform dependent initialization structure	Swapnil Jakhade	1	-0/+9
2020-03-20	phy: cadence-torrent: Use regmap to read and write DPTX PHY registers	Swapnil Jakhade	1	-69/+100
2020-03-20	phy: cadence-torrent: Use regmap to read and write Torrent PHY registers	Swapnil Jakhade	1	-369/+650
2020-03-20	phy: cadence-torrent: Implement PHY configure APIs	Swapnil Jakhade	1	-5/+431
2020-03-20	phy: cadence-torrent: Add 19.2 MHz reference clock support	Swapnil Jakhade	1	-17/+441
2020-03-20	phy: cadence-torrent: Refactor code for reusability	Swapnil Jakhade	1	-93/+137
2020-03-20	phy: cadence-torrent: Add wrapper for DPTX register access	Swapnil Jakhade	1	-21/+50
2020-03-20	phy: cadence-torrent: Add wrapper for PHY register access	Swapnil Jakhade	1	-65/+77
2020-03-20	phy: cadence-torrent: Adopt Torrent nomenclature	Swapnil Jakhade	1	-53/+58
2020-03-20	phy: cadence-dp: Rename to phy-cadence-torrent	Yuti Amonkar	3	-5/+5
2020-01-14	phy: cadence: Sierra: add phy_reset hook	Roger Quadros	1	-0/+10
2020-01-14	phy: cadence: Sierra: remove redundant initialization of pointer regmap	Colin Ian King	1	-1/+1
2020-01-08	phy: cadence: Sierra: Use correct dev pointer in cdns_sierra_phy_remove()	Kishon Vijay Abraham I	1	-1/+1
2020-01-08	phy: cadence: Sierra: Set cmn_refclk_dig_div/cmn_refclk1_dig_div frequency to...	Kishon Vijay Abraham I	1	-0/+21
2020-01-08	phy: cadence: Sierra: Change MAX_LANES of Sierra to 16	Kishon Vijay Abraham I	1	-1/+21
2020-01-08	phy: cadence: Sierra: Check for PLL lock during PHY power on	Kishon Vijay Abraham I	1	-1/+32
2020-01-08	phy: cadence: Sierra: Get reset control "array" for each link	Kishon Vijay Abraham I	1	-1/+1
2020-01-08	phy: cadence: Sierra: Configure both lane cdb and common cdb registers for ex...	Anil Varughese	1	-96/+254
2020-01-08	phy: cadence: Sierra: Modify register macro names to be in sync with Sierra u...	Kishon Vijay Abraham I	1	-83/+84
2020-01-08	phy: cadence: Sierra: Make cdns_sierra_phy_init() as phy_ops	Kishon Vijay Abraham I	1	-6/+9
2020-01-08	phy: cadence: Sierra: Add support for SERDES_16G used in J721E SoC	Kishon Vijay Abraham I	1	-0/+14
2020-01-08	phy: cadence: Sierra: Use "regmap" for read and write to Sierra registers	Kishon Vijay Abraham I	1	-54/+237
2020-01-08	phy: cadence: Sierra: Make "phy_clk" and "sierra_apb" optional resources	Kishon Vijay Abraham I	1	-2/+2
2019-05-21	treewide: Add SPDX license identifier - Makefile/Kconfig	Thomas Gleixner	2	-0/+2
2019-02-07	phy: Add Cadence D-PHY support	Maxime Ripard	3	-1/+404
2018-12-12	phy: cadence: Add driver for Sierra PHY	Alan Douglas	3	-1/+404
2018-09-10	phy: Add driver for Cadence MHDP DisplayPort SD0801 PHY	Scott Telford	3	-0/+552