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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
phy
/
cadence
Age
Commit message (
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)
Author
Files
Lines
2022-07-08
phy: cadence-torrent: Remove unused `regmap` field from state struct
Lars-Peter Clausen
1
-1
/
+0
2022-07-08
phy: cadence: Sierra: Remove unused `regmap` field from state struct
Lars-Peter Clausen
1
-1
/
+0
2022-07-05
phy: cdns-dphy: Add support for DPHY TX on J721e
Rahul T R
1
-0
/
+61
2022-07-05
phy: cdns-dphy: Add band config for dphy tx
Rahul T R
1
-1
/
+39
2022-04-13
phy: cadence: Sierra: Add TI J721E specific PCIe multilink lane configuration
Swapnil Jakhade
1
-3
/
+190
2022-03-02
phy: cadence: Add Cadence D-PHY Rx driver
Pratyush Yadav
3
-0
/
+264
2022-02-25
phy/cadence: Use of_device_get_match_data()
Minghao Chi (CGEL ZTE)
1
-6
/
+1
2022-02-07
phy: cadence: Sierra: Add support for skipping configuration
Aswath Govindraju
1
-25
/
+57
2022-01-24
phy: cadence: Sierra: fix error handling bugs in probe()
Dan Carpenter
1
-14
/
+21
2021-12-27
phy: cadence: Sierra: Add support for derived reference clock output
Swapnil Jakhade
1
-1
/
+108
2021-12-27
phy: cadence: Sierra: Add PCIe + QSGMII PHY multilink configuration
Swapnil Jakhade
1
-1
/
+376
2021-12-27
phy: cadence: Sierra: Add support for PHY multilink configurations
Swapnil Jakhade
1
-8
/
+190
2021-12-27
phy: cadence: Sierra: Fix to get correct parent for mux clocks
Swapnil Jakhade
1
-5
/
+26
2021-12-27
phy: cadence: Sierra: Update single link PCIe register configuration
Swapnil Jakhade
1
-1
/
+213
2021-12-27
phy: cadence: Sierra: Check PIPE mode PHY status to be ready for operation
Swapnil Jakhade
1
-1
/
+72
2021-12-27
phy: cadence: Sierra: Check cmn_ready assertion during PHY power on
Swapnil Jakhade
1
-0
/
+45
2021-12-27
phy: cadence: Sierra: Add PHY PCS common register configurations
Swapnil Jakhade
1
-0
/
+38
2021-12-27
phy: cadence: Sierra: Rename some regmap variables to be in sync with Sierra ...
Swapnil Jakhade
1
-10
/
+11
2021-12-27
phy: cadence: Sierra: Add support to get SSC type from device tree
Swapnil Jakhade
1
-1
/
+5
2021-12-27
phy: cadence: Sierra: Prepare driver to add support for multilink configurations
Swapnil Jakhade
1
-56
/
+139
2021-12-27
phy: cadence: Sierra: Use of_device_get_match_data() to get driver data
Swapnil Jakhade
1
-9
/
+4
2021-11-23
phy: cadence-torrent: use swap() to make code cleaner
Yang Guang
1
-4
/
+2
2021-10-26
phy: cadence-torrent: Add support to output received reference clock
Swapnil Jakhade
1
-11
/
+148
2021-10-26
phy: cadence-torrent: Model reference clock driver as a clock to enable deriv...
Swapnil Jakhade
1
-25
/
+132
2021-10-26
phy: cadence-torrent: Migrate to clk_hw based registration and OF APIs
Swapnil Jakhade
1
-11
/
+19
2021-08-17
phy: cadence-torrent: Check PIPE mode PHY status to be ready for operation
Swapnil Jakhade
1
-1
/
+59
2021-08-17
phy: cadence-torrent: Add debug information for PHY configuration
Swapnil Jakhade
1
-4
/
+32
2021-08-17
phy: cadence-torrent: Add separate functions for reusable code
Swapnil Jakhade
1
-18
/
+35
2021-08-17
phy: cadence-torrent: Add PHY configuration for DP with 100MHz ref clock
Swapnil Jakhade
1
-0
/
+162
2021-08-17
phy: cadence-torrent: Add PHY registers for DP in array format
Swapnil Jakhade
1
-288
/
+334
2021-08-17
phy: cadence-torrent: Configure PHY registers as a function of input referenc...
Swapnil Jakhade
1
-408
/
+422
2021-08-17
phy: cadence-torrent: Add enum for supported input reference clock frequencies
Swapnil Jakhade
1
-13
/
+38
2021-08-17
phy: cadence-torrent: Reorder few functions to remove function declarations
Swapnil Jakhade
1
-619
/
+588
2021-08-17
phy: cadence-torrent: Remove use of CamelCase to fix checkpatch CHECK message
Swapnil Jakhade
1
-12
/
+12
2021-05-31
phy: cadence: Sierra: Fix error return code in cdns_sierra_phy_probe()
Wang Wensheng
1
-0
/
+1
2021-03-31
phy: cadence-torrent: Add delay for PIPE clock to be stable
Kishon Vijay Abraham I
1
-0
/
+9
2021-03-31
phy: cadence-torrent: Explicitly request exclusive reset control
Kishon Vijay Abraham I
1
-1
/
+1
2021-03-31
phy: cadence-torrent: Do not configure SERDES if it's already configured
Kishon Vijay Abraham I
1
-10
/
+22
2021-03-31
phy: cadence-torrent: Group reset APIs and clock APIs
Kishon Vijay Abraham I
1
-31
/
+53
2021-03-31
phy: cadence: Sierra: Enable pll_cmnlc and pll_cmnlc1 clocks
Kishon Vijay Abraham I
1
-3
/
+37
2021-03-31
phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as clocks (mux clocks)
Kishon Vijay Abraham I
2
-3
/
+265
2021-03-31
phy: cadence: Sierra: Add missing clk_disable_unprepare() in .remove callback
Kishon Vijay Abraham I
1
-0
/
+3
2021-03-31
phy: cadence: Sierra: Add array of input clocks in "struct cdns_sierra_phy"
Kishon Vijay Abraham I
1
-10
/
+15
2021-03-31
phy: cadence-torrent: Use a common header file for Cadence SERDES
Kishon Vijay Abraham I
1
-1
/
+1
2021-03-31
phy: cadence: Sierra: Explicitly request exclusive reset control
Kishon Vijay Abraham I
1
-2
/
+2
2021-03-31
phy: cadence: Sierra: Move all reset_control_get*() to a separate function
Kishon Vijay Abraham I
1
-11
/
+25
2021-03-31
phy: cadence: Sierra: Move all clk_get_*() to a separate function
Kishon Vijay Abraham I
1
-22
/
+35
2021-03-31
phy: cadence: Sierra: Create PHY only for "phy" or "link" sub-nodes
Kishon Vijay Abraham I
1
-0
/
+4
2021-03-31
phy: cadence: Sierra: Fix PHY power_on sequence
Kishon Vijay Abraham I
1
-1
/
+6
2021-03-30
phy: cadence-torrent: Update PCIe + USB config for correct PLL1 clock
Swapnil Jakhade
1
-16
/
+31
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