starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2022-10-13	RISC-V: Re-enable counter access from userspace	Palmer Dabbelt	1	-2/+5
2022-10-09	Merge tag 'riscv-for-linus-6.1-mw1' of git://git.kernel.org/pub/scm/linux/ker...	Linus Torvalds	1	-11/+20
2022-09-08	perf: RISC-V: fix access beyond allocated array	Sergey Matyukevich	1	-1/+1
2022-09-08	perf: RISC-V: throttle perf events	Sergey Matyukevich	1	-0/+4
2022-09-08	perf: RISC-V: exclude invalid pmu counters from SBI calls	Sergey Matyukevich	1	-11/+16
2022-08-12	perf: riscv_pmu{,_sbi}: Miscallenous improvement & fixes	Palmer Dabbelt	1	-14/+16
2022-08-12	RISC-V: Move counter info definition to sbi header file	Atish Patra	1	-14/+0
2022-08-12	RISC-V: Fix SBI PMU calls for RV32	Atish Patra	1	-0/+10
2022-08-12	RISC-V: Update user page mapping only once during start	Atish Patra	1	-0/+1
2022-08-12	RISC-V: Fix counter restart during overflow for RV32	Atish Patra	1	-0/+5
2022-07-19	perf: RISC-V: Add of_node_put() when breaking out of for_each_of_cpu_node()	Liang He	1	-1/+4
2022-07-06	drivers/perf: riscv_pmu_sbi: perf format	Nikita Shubin	1	-0/+20
2022-07-06	drivers/perf: riscv_pmu: Add riscv pmu pm notifier	Eric Lin	1	-4/+77
2022-05-06	perf: RISC-V: Remove non-kernel-doc ** comments	Palmer Dabbelt	1	-4/+4
2022-03-22	RISC-V: Add sscofpmf extension support	Atish Patra	1	-5/+217
2022-03-22	RISC-V: Add perf platform driver based on SBI PMU extension	Atish Patra	1	-0/+578