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path: root/drivers/pci
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2009-09-10PCI: pcie, aer: remove spinlock in aerdrv_errprint.cHidetoshi Seto1-20/+8
The static buffer errmsg_buff[] is used only for building error message in fixed format, and is protected by a spinlock. This patch removes this buffer and the spinlock. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Reviewed-by: Andrew Patterson <andrew.patterson@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI: pcie, aer: fix report of multiple errorsHidetoshi Seto1-11/+8
The flag AER_MULTI_ERROR_VALID_FLAG in info->flag does mean that the root port receives multiple error messages. Error messages can be posted from different devices, so it does not mean that each reported device has multiple errors. If there are multiple error devices and the root port has valid error source ID, it would be nice to report which device is the error source reported first. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI: pcie, aer: init struct aer_err_info for reuseHidetoshi Seto1-0/+3
In case of multiple errors, struct aer_err_info would be reused among all reported devices. So the info->status should be initialized before recycled. Otherwise error of one device might be reported as the error of another device. Also info->flags has similar problem on reporting TLP header. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI: pcie, aer: rework MASK macros in aerdrv_errprint.cHidetoshi Seto1-25/+21
Definitions of MASK macros in aerdrv_errprint.c are tricky and unsafe. For example, AER_AGENT_TRANSMITTER_MASK(_sev, _stat) does work like: static inline func(int _sev, int _stat) { if (_sev == AER_CORRECTABLE) return (_stat & (PCI_ERR_COR_REP_ROLL|PCI_ERR_COR_REP_TIMER)); else return (_stat & PCI_ERR_COR_REP_ROLL); } In case of else path here, for uncorrectable errors, testing bits in _stat by PCI_ERR_COR_* does not make sense because _stat should have only PCI_ERR_UNC_* bits originated in uncorrectable error status register. But at this time this is safe because uncorrectable error using bit position same to PCI_ERR_COR_REP_ROLL(= bit position 8) is not defined. Likewise, AER_AGENT_COMPLETER_MASK is always PCI_ERR_UNC_COMP_ABORT but it works because bit 15 of correctable error status is not defined. It means that these MASK macros will turn to be wrong once if new error is defined. (In fact, bit 15 of correctable is now defined in PCIe 2.1) This patch changes these MASK macros to be more strict, not to return PCI_ERR_COR_* bits for uncorrectable error status and vise versa. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Reviewed-by: Andrew Patterson <andrew.patterson@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI: pcie, aer: AER_PR for printing in aerdrv_errprint.cHidetoshi Seto1-19/+15
Add workaround macro to reduce the number of checkpatch warning: WARNING: printk() should include KERN_ facility level Before: total: 0 errors, 10 warnings, 247 lines checked After: total: 0 errors, 1 warnings, 243 lines checked Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI: pcie, aer: checkpatch style cleanup in pcie/aer/*Hidetoshi Seto5-71/+62
Before: drivers/pci/pcie/aer/aer_inject.c total: 4 errors, 4 warnings, 473 lines checked drivers/pci/pcie/aer/aerdrv.c total: 5 errors, 2 warnings, 333 lines checked drivers/pci/pcie/aer/aerdrv.h total: 1 errors, 0 warnings, 139 lines checked drivers/pci/pcie/aer/aerdrv_core.c total: 4 errors, 3 warnings, 872 lines checked drivers/pci/pcie/aer/aerdrv_errprint.c total: 12 errors, 11 warnings, 248 lines checked After: drivers/pci/pcie/aer/aer_inject.c total: 0 errors, 0 warnings, 466 lines checked drivers/pci/pcie/aer/aerdrv.c total: 0 errors, 0 warnings, 335 lines checked drivers/pci/pcie/aer/aerdrv.h total: 0 errors, 0 warnings, 139 lines checked drivers/pci/pcie/aer/aerdrv_core.c total: 0 errors, 0 warnings, 869 lines checked drivers/pci/pcie/aer/aerdrv_errprint.c total: 0 errors, 10 warnings, 247 lines checked Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Reviewed-by: Andrew Patterson <andrew.patterson@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI: pci-stub: add pci_stub.ids parameterTejun Heo1-1/+44
Add ids module parameter which allows specifying initial IDs for the pci-stub driver. When built into the kernel, pci-stub is linked before any real pci drivers and by setting up IDs from initialization it can prevent built-in drivers from attaching to specific devices. While at it, make pci_stub_probe() print out about devices it grabbed to weed out "but my controller isn't being probed" bug reports. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI: separate out pci_add_dynid()Tejun Heo1-45/+74
Separate out pci_add_dynid() from store_new_id() and export it so that in-kernel code can add PCI IDs dynamically. As the function will be available regardless of HOTPLUG, put it and pull pci_free_dynids() outside of CONFIG_HOTPLUG. This will be used by pci-stub to initialize initial IDs via module param. While at it, remove bogus get_driver() failure check. Signed-off-by: Tejun Heo <tj@kernel.org> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Reviewed-by: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI hotplug: add support for 5.0G link speedKenji Kaneshige2-2/+9
Add support for PCI-E 5.0 GT/s in max_bus_speed and cur_bus_speed. Reviewed-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI hotplug: fix typo in pcie link speed infoKenji Kaneshige1-1/+1
Fix typo in PCI-E link speed. Reviewed-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI ASPM: support per direction l0s managementKenji Kaneshige1-63/+107
The L0s state can be managed separately for each direction (upstream direction and downstream direction) of the link. But in the current implementation, those are mixed up. With this patch, L0s for each direction are managed separately. To maintain three states (upstream direction L0s, downstream L0s and L1), 'aspm_support', 'aspm_enabled', 'aspm_capable', 'aspm_disable' and 'aspm_default' fields in struct pcie_link_state are changed to 3-bit from 2-bit. The 'latency' field is separated to two 'latency_up' and 'latency_dw' fields to maintain exit latencies for each direction of the link. For L0, 'latency_up.l0' and 'latency_dw.l0' are used to configure upstream direction L0s and downstream direction L0s respectively. For L1, larger value of 'latency_up.l1' and 'latency_dw.l1' is considered as L1 exit latency. Acked-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI ASPM: support partial aspm enablementKenji Kaneshige1-164/+47
In the current implementation, ASPM L0s/L1 is disabled for all links in the hierarchy if one of the link doesn't meet latency requirement. But we can partially enable ASPM L0s/L1 on sub-tree in the hierarchy. This patch allows partial L0s/L1 enablement in the hierarchy. And it also reduce the calculation cost of ASPM configuration very much. In the previous implementation, all links were enabled with the same state. With this patch, enabled state for each link is determined simply as follows (the 'requested' is from policy_to_aspm_state()). enabled = requested & (link->aspm_capable & link->aspm_disable) Acked-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI ASPM: introduce capable flagKenji Kaneshige1-31/+86
Introduce 'aspm_capable' field to maintain the capable ASPM setting of the link. By the 'aspm_capable', we don't need to recheck latency every time ASPM policy is changed. Each bit in 'aspm_capable' is associated to ASPM state (L0S/L1). The bit is set if the associated ASPM state is supported by the link and it satisfies the latency requirement (i.e. exit latency < endpoint acceptable latency). The 'aspm_capable' is updated when - an endpoint device is added (boot time or hot-plug time) - an endpoint device is removed (hot-unplug time) - PCI power state is changed. Acked-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI ASPM: introduce disable flagKenji Kaneshige1-17/+24
Introduce 'aspm_disable' flag to manage disabled ASPM state more robust way. Acked-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI ASPM: fix possible null pointer dereferenceKenji Kaneshige1-8/+9
Fix possible NULL dereference in pcie_aspm_exit_link_state(). This patch also cleanup some code. Acked-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI ASPM: remove redundant list checkKenji Kaneshige1-3/+0
Remove the following check in __pcie_aspm_config_link() because it nerver be true. Acked-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI ASPM: do not clear enabled field by support fieldKenji Kaneshige1-3/+3
We must not clear bits in 'aspm_enabled' using 'aspm_support', or 'aspm_enabled' and 'aspm_default' might be different from the actual state. In addtion, 'aspm_default' should be intialized even if 'aspm_support' is 0. Acked-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI quirk: update 82576 device ids in SR-IOV quirks listAlexander Duyck1-0/+1
This patch adds the most recent additions to the list of 82576 device IDs to the list of devices needing the SR-IOV quirk. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI/GPU: implement VGA arbitration on LinuxBenjamin Herrenschmidt1-0/+44
Background: Graphic devices are accessed through ranges in I/O or memory space. While most modern devices allow relocation of such ranges, some "Legacy" VGA devices implemented on PCI will typically have the same "hard-decoded" addresses as they did on ISA. For more details see "PCI Bus Binding to IEEE Std 1275-1994 Standard for Boot (Initialization Configuration) Firmware Revision 2.1" Section 7, Legacy Devices. The Resource Access Control (RAC) module inside the X server currently does the task of arbitration when more than one legacy device co-exists on the same machine. But the problem happens when these devices are trying to be accessed by different userspace clients (e.g. two server in parallel). Their address assignments conflict. Therefore an arbitration scheme _outside_ of the X server is needed to control the sharing of these resources. This document introduces the operation of the VGA arbiter implemented for Linux kernel. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Tiago Vignatti <tiago.vignatti@nokia.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI MSI: Style cleanupsHidetoshi Seto1-22/+22
Cleanups (nearly based on checkpatch). Before: total: 11 errors, 2 warnings, 0 checks, 842 lines checked After: total: 0 errors, 0 warnings, 0 checks, 842 lines checked v2: fix it's/its mistakes in comment Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI MSI: MSI-X cleanup, msix_setup_entries()Hidetoshi Seto1-23/+36
Cleanup based on the prototype from Matthew Milcox. Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI MSI: MSI-X cleanup, msix_program_entries()Hidetoshi Seto1-10/+19
Cleanup based on the prototype from Matthew Milcox. Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI MSI: MSI-X cleanup, msix_map_region()Hidetoshi Seto1-13/+19
Cleanup based on the prototype from Matthew Milcox. Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI MSI: Relocate error path in init_msix_capability()Hidetoshi Seto1-18/+22
Move it from the middle of the function to the end. Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI MSI: Unify msi_free_irqs() and msix_free_all_irqs()Hidetoshi Seto1-43/+31
Unify msi_free_irqs() and msix_free_all_irqs(), and rename it to a common void function free_msi_irqs(). And relocate the common function to where the prototype is located now. Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI MSI: Use list_first_entry()Hidetoshi Seto1-1/+1
use list_first_entry() instead of list_entry(). Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI MSI: Remove attribute check from pci_disable_msi()Hidetoshi Seto1-8/+1
The msi_list never have MSI-X's msi_desc while MSI is enabled, and also it never have MSI's msi_desc while MSI-X is enabled. This patch remove check for MSI-X entry from the pci_disable_msi(), referring that pci_disable_msix() does not have any check for MSI entry. Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI: print out pref if mmio is prefetchableYinghai Lu1-2/+7
We already print it out for pci bridges, so also print it out for pci devices. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI: apply nv_msi_ht_cap_quirk on resume tooTejun Heo1-0/+2
http://bugzilla.kernel.org/show_bug.cgi?id=12542 reports that with the quirk not applied on resume, msi stops working after resuming and mcp78s ahci fails due to IRQ mis-delivery. Apply it on resume too. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Peer Chen <pchen@nvidia.com> Cc: Tj <linux@tjworld.net> Reported-by: Nicolas Derive <kalon33@ubuntu.com> Cc: Greg KH <greg@kroah.com> Cc: <stable@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI: disable pci_find_device warnings when deprecated pci functions are enabledAndi Kleen3-31/+37
Shut off the long standing linux/drivers/pci/search.c:144: warning: 'pci_find_device' is deprecated (declared at linux/drivers/pci/search.c:136) linux/drivers/pci/search.c:144: warning: 'pci_find_device' is deprecated (declared at linux/drivers/pci/search.c:136) warnings that appear on every build when CONFIG_PCI_LEGACY is enabled. gcc warns for the use in EXPORT_SYMBOL I moved these to a separate file and disabled the warning in the Makefile for that file. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI: Unhide the SMBus on the Compaq Evo D510 USDTJean Delvare1-0/+1
One more form factor for Compaq Evo D510, which needs the same quirk as the other form factors. Apparently there's no hardware monitoring chip on that one, but SPD EEPROMs, so it's still worth unhiding the SMBus. Signed-off-by: Jean Delvare <khali@linux-fr.org> Tested-by: Nuzhna Pomoshch <nuzhna_pomoshch@yahoo.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI: expose function reset capability in sysfsMichael S. Tsirkin3-0/+54
Some devices allow an individual function to be reset without affecting other functions in the same device: that's what pci_reset_function does. For devices that have this support, expose reset attribite in sysfs. This is useful e.g. for virtualization, where a qemu userspace process wants to reset the device when the guest is reset, to emulate machine reboot as closely as possible. Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI Hotplug: acpiphp: get pci_bus from acpi handle correctlyAlex Chiang1-11/+17
We cannot simply call acpi_get_pci_dev() on any random ACPI handle and hope that it works, because a PCI root bridge may not have an associated struct pci_dev. This is allowed per the PCI specification, and is referred to as a non-materialized bridge. So, depending on the type of PCI bridge that the handle points to, use the appropriate interface to return the struct pci_bus correctly. Reviewed-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI: export pci_claim_resource for driver useJesse Barnes1-0/+1
yenta needs this for example. Acked-by: Matthew Wilcox <willy@linux.intel.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-10PCI: remove pcibios_scan_all_fns()Alex Chiang1-2/+1
This was #define'd as 0 on all platforms, so let's get rid of it. This change makes pci_scan_slot() slightly easier to read. Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Tony Luck <tony.luck@intel.com> Cc: David Howells <dhowells@redhat.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jeff Dike <jdike@addtoit.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Acked-by: Russell King <linux@arm.linux.org.uk> Acked-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Kyle McMartin <kyle@mcmartin.ca> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-08-30PCI SR-IOV: correct broken resource alignment calculationsChris Wright4-6/+42
An SR-IOV capable device includes an SR-IOV PCIe capability which describes the Virtual Function (VF) BAR requirements. A typical SR-IOV device can support multiple VFs whose BARs must be in a contiguous region, effectively an array of VF BARs. The BAR reports the size requirement for a single VF. We calculate the full range needed by simply multiplying the VF BAR size with the number of possible VFs and create a resource spanning the full range. This all seems sane enough except it artificially inflates the alignment requirement for the VF BAR. The VF BAR need only be aligned to the size of a single BAR not the contiguous range of VF BARs. This can cause us to fail to allocate resources for the BAR despite the fact that we actually have enough space. This patch adds a thin PCI specific layer over the generic resource_alignment() function which is aware of the special nature of VF BARs and does sorting and allocation based on the smaller alignment requirement. I recognize that while resource_alignment is generic, it's basically a PCI helper. An alternative to this patch is to add PCI VF BAR specific information to struct resource. I opted for the extra layer rather than adding such PCI specific information to struct resource. This does have the slight downside that we don't cache the BAR size and re-read for each alignment query (happens a small handful of times during boot for each VF BAR). Signed-off-by: Chris Wright <chrisw@sous-sol.org> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Matthew Wilcox <matthew@wil.cx> Cc: Yu Zhao <yu.zhao@intel.com> Cc: stable@kernel.org Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-08-20PCI: check saved state before restoreAlek Du2-1/+3
Without the check, the config space may be filled with zeros. Though the driver should try to avoid call restoring before saving, but the pci layer also should check this. Also removes the existing check in pci_restore_standard_config, since it's superfluous with the new check in restore_state. Acked-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Alek Du <alek.du@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-08-10Merge branch 'for-linus' of ↵Linus Torvalds1-4/+3
git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: PCI hotplug: SGI hotplug: do not use hotplug_slot_attr PCI hotplug: SGI hotplug: fix build failure
2009-08-07PCI hotplug: SGI hotplug: do not use hotplug_slot_attrKenji Kaneshige1-10/+3
By the pci slot changes, callbacks of attributes under slot directory (/sys/bus/pci/slots) had been changed to get the pointer to struct pci_slot instead of struct hotplug_slot. So the path_show() that assumes the parameter is a pointer to struct hotplug_slot seems broken. Tested-by: Mike Habeck <habeck@sgi.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-08-07PCI hotplug: SGI hotplug: fix build failureKenji Kaneshige1-0/+6
The commit bd3d99c17039fd05a29587db3f4a180c48da115a ("PCI: Remove untested Electromechanical Interlock (EMI) support in pciehp."), which removes the definition of "struct hotplug_slot_attr", broke SGI hotplug driver. By this commit, we get the following compile error. drivers/pci/hotplug/sgi_hotplug.c:106: error: variable 'sn_slot_path_attr' has initializer but incomplete type drivers/pci/hotplug/sgi_hotplug.c:106: error: unknown field 'attr' specified in initializer drivers/pci/hotplug/sgi_hotplug.c:106: error: extra brace group at end of initializer drivers/pci/hotplug/sgi_hotplug.c:106: error: (near initialization for 'sn_slot_path_attr') drivers/pci/hotplug/sgi_hotplug.c:106: warning: excess elements in struct initializer drivers/pci/hotplug/sgi_hotplug.c:106: warning: (near initialization for 'sn_slot_path_attr') drivers/pci/hotplug/sgi_hotplug.c:106: error: unknown field 'show' specified in initializer drivers/pci/hotplug/sgi_hotplug.c:106: warning: excess elements in struct initializer drivers/pci/hotplug/sgi_hotplug.c:106: warning: (near initialization for 'sn_slot_path_attr') drivers/pci/hotplug/sgi_hotplug.c: In function 'sn_hp_destroy': drivers/pci/hotplug/sgi_hotplug.c:203: error: invalid use of undefined type 'struct hotplug_slot_attribute' drivers/pci/hotplug/sgi_hotplug.c: In function 'sn_hotplug_slot_register': drivers/pci/hotplug/sgi_hotplug.c:655: error: invalid use of undefined type 'struct hotplug_slot_attribute' This patch fixes this regression by adding the definition of struct hotplug_slot_attr into sgi_hotplug.c. Tested-by: Mike Habeck <habeck@sgi.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-08-06intel-iommu: Fix enabling snooping feature by mistakeSheng Yang1-1/+1
Two defects work together result in KVM device passthrough randomly can't work: 1. iommu_snooping is not initialized to zero when vm_iommu_init() called. So it is possible to get a random value. 2. One line added by commit 2c2e2c38("IOMMU Identity Mapping Support") change the code path, let it bypass domain_update_iommu_cap(), as well as missing the increment of domain iommu reference count. The latter is also likely to cause a leak of domains on repeated VMM assignment and deassignment. Signed-off-by: Sheng Yang <sheng@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-05intel-iommu: Mask physical address to correct page size in intel_map_single()Fenghua Yu1-1/+2
The physical address passed to domain_pfn_mapping() should be rounded down to the start of the MM page, not the VT-d page. This issue causes kernel panic on PAGE_SIZE>VTD_PAGE_SIZE platforms e.g. ia64 platforms. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-05intel-iommu: Correct sglist size calculation.Fenghua Yu1-10/+10
In domain_sg_mapping(), use aligned_nrpages() instead of hand-coded rounding code for calculating the size of each sg elem. This means that on IA64 we correctly round up to the MM page size, not just to the VT-d page size. Also remove the incorrect mm_to_dma_pfn() when intel_map_sg() calls domain_sg_mapping() -- the 'size' variable is in VT-d pages already. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-03Make pci_claim_resource() use request_resource() rather than insert_resource()Linus Torvalds1-2/+2
This function has traditionally used "insert_resource()", because before commit cebd78a8c5 ("Fix pci_claim_resource") it used to just insert the resource into whatever root resource tree that was indicated by "pcibios_select_root()". So there Matthew fixed it to actually look up the proper parent resource, which means that now it's actively wrong to then traverse the resource tree any more: we already know exactly where the new resource should go. And when we then did commit a76117dfd6 ("x86: Use pci_claim_resource"), which changed the x86 PCI code from the open-coded pr = pci_find_parent_resource(dev, r); if (!pr || request_resource(pr, r) < 0) { to using if (pci_claim_resource(dev, idx) < 0) { that "insert_resource()" now suddenly became a problem, and causes a regression covered by http://bugzilla.kernel.org/show_bug.cgi?id=13891 which this fixes. Reported-and-tested-by: Rafael J. Wysocki <rjw@sisk.pl> Cc: Matthew Wilcox <willy@linux.intel.com> Cc: Andrew Patterson <andrew.patterson@hp.com> Cc: Linux PCI <linux-pci@vger.kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-12headers: smp_lock.h reduxAlexey Dobriyan5-4/+1
* Remove smp_lock.h from files which don't need it (including some headers!) * Add smp_lock.h to files which do need it * Make smp_lock.h include conditional in hardirq.h It's needed only for one kernel_locked() usage which is under CONFIG_PREEMPT This will make hardirq.h inclusion cheaper for every PREEMPT=n config (which includes allmodconfig/allyesconfig, BTW) Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-08intel-iommu: Fix intel_iommu_unmap_range() with size 0Sheng Yang1-0/+3
After some API change, intel_iommu_unmap_range() introduced a assumption that parameter size != 0, otherwise the dma_pte_clean_range() would have a overflowed argument. But the user like KVM don't have this assumption before, then some BUG() triggered. Fix it by ignoring size = 0. Signed-off-by: Sheng Yang <sheng@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-07Merge branch 'for-linus' of ↵Linus Torvalds7-30/+72
git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: PCI: Fix IRQ swizzling for ARI-enabled devices ia64/PCI: adjust section annotation for pcibios_setup() x86/PCI: get root CRS before scanning children x86/PCI: fix boundary checking when using root CRS PCI MSI: Fix restoration of MSI/MSI-X mask states in suspend/resume PCI MSI: Unmask MSI if setup failed PCI MSI: shorten PCI_MSIX_ENTRY_* symbol names PCI: make pci_name() take const argument PCI: More PATA quirks for not entering D3 PCI: fix kernel-doc warnings PCI: check if bus has a proper bridge device before triggering SBR PCI: remove pci_dac_dma_... APIs on mn10300 PCI ECRC: Remove unnecessary semicolons PCI MSI: Return if alloc_msi_entry for MSI-X failed
2009-07-04intel-iommu: Don't use identity mapping for PCI devices behind bridgesDavid Woodhouse1-0/+30
Our current strategy for pass-through mode is to put all devices into the 1:1 domain at startup (which is before we know what their dma_mask will be), and only _later_ take them out of that domain, if it turns out that they really can't address all of memory. However, when there are a bunch of PCI devices behind a bridge, they all end up with the same source-id on their DMA transactions, and hence in the same IOMMU domain. This means that we _can't_ easily move them from the 1:1 domain into their own domain at runtime, because there might be DMA in-flight from their siblings. So we have to adjust our pass-through strategy: For PCI devices not on the root bus, and for the bridges which will take responsibility for their transactions, we have to start up _out_ of the 1:1 domain, just in case. This fixes the BUG() we see when we have 32-bit-capable devices behind a PCI-PCI bridge, and use the software identity mapping. It does mean that we might end up using 'normal' mapping mode for some devices which could actually live with the faster 1:1 mapping -- but this is only for PCI devices behind bridges, which presumably aren't the devices for which people are most concerned about performance. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-07-04intel-iommu: Use iommu_should_identity_map() at startup time too.David Woodhouse1-11/+14
At boot time, the dma_mask won't have been set on any devices, so we assume that all devices will be 64-bit capable (and thus get a 1:1 map). Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-07-04intel-iommu: No mapping for non-PCI devicesDavid Woodhouse1-5/+10
This should fix kernel.org bug #11821, where the dcdbas driver makes up a platform device and then uses dma_alloc_coherent() on it, in an attempt to get memory < 4GiB. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>