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path: root/drivers/pci/controller
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2023-09-13driver: pci: Update reset timing as the requirement in PCIe base spec r6.0Kevin.xie1-4/+8
Beside, revert the release operation after link down in probe. This commit can fix the incompatibility problem in VF2 linux6.1 with WD NVMe SSD. Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
2023-04-13drivers: pci: Clear compile warnings.Kevin.xie1-2/+1
Removed unused variables in hw_init. Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
2023-03-29drivers: pci: Modified reset pin control API to gpiolib consumer API.Kevin.xie1-37/+16
For the consisitancy of host driver code among boards, the difference of reset pin config will be maintained in DTS. Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
2023-03-27drivers: pci: Modified power pin control API to gpiolib consumer API.Kevin.xie1-22/+11
For the consisitancy of host driver among devkits(ext_gpio) & vf2/evb, the difference of power pin config will be maintained in DTS. Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
2023-02-21drivers: pci: Fix crash in rt-linux because of an uninitialized lock.Kevin.xie1-6/+6
Adjust the order of invocations in probe to avoid from the crash. Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
2023-02-16drivers: pci: Add PHY settings in pcie host driver.Kevin.xie1-8/+36
The settings are about PHY PLL KVCO fine tuning form CTS testing. Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
2022-11-15drivers: pci: Set PCIe PCI standard configuration ID.Kevin.xie1-0/+9
Class - PCI-to-PCI bridge. Revision - 2. Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
2022-10-27drivers: pci: Support system pm no irq ops.Kevin.xie1-0/+37
Because of the limitation of hardware design, only enable/disable clk here. Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
2022-10-27drivers: pci: Support runtime pm & release when found empty slot in probe.Kevin.xie1-5/+67
Used PLDA link up/down status in probe to indicate the slot situations. Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
2022-09-20drivers: pci: Support 64bit prefetchable MMIO range.Kevin.xie1-0/+7
Verification has been completed on NVIDIA GT710 with modetest. Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
2022-09-05linux:drivers: revise 'stf' to 'starfive'Ziv.Xu1-0/+1
revise "stf" to "starfive" for PCIE, CPUfreq, CPUidle, PMIC driver. Signed-off-by: Ziv.Xu <Ziv.Xu@starfivetech.com>
2022-07-12driver: pci: Add extended reset time for better compatibilityKevin.xie1-1/+1
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
2022-06-07driver: pci: Fix kernel stuck caused by ASPM LTRKevin.xie1-1/+14
Disable the LTR message forwarding of PCIe Message Reception, which has been enabled & set a illegal destination address by PLDA PCIe IP core as default. Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
2022-05-20PCIe: plda: Add support for evbmason.huo1-13/+122
1.Add pinctrl for power-enable & perst#. 2.Config refclk & clkreq. 3.Add ATR for host bridge config space. Signed-off-by: mason.huo <mason.huo@starfivetech.com>
2022-05-06PCI: plda: Fix kernel compile warningsmason.huo1-18/+0
Remove the unused functions. Adjust the dts configuration. Signed-off-by: mason.huo <mason.huo@starfivetech.com>
2022-04-24PCI: plda: Add syscon register configmason.huo1-29/+91
Add the syscon register config when plda hw initializes. Signed-off-by: mason.huo <mason.huo@starfivetech.com>
2022-04-24PCI: plda: Add pcie clk & rstmason.huo1-1/+49
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
2022-04-24PCI: plda: Optimize plda pcie host drivermason.huo1-149/+147
Fix the hardcoded ATR setting. Fix some kernel coding standard issues. Signed-off-by: mason.huo <mason.huo@starfivetech.com>
2021-11-251.Add plda pcie host controller driver.ke.zhu3-0/+740
2.Add PCIe host controller DT bingdings of starfive JH7110.
2021-10-07Merge tag 'hyperv-fixes-signed-20211007' of ↵Linus Torvalds1-3/+10
git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux Pull hyperv fixes from Wei Liu: - Replace uuid.h with types.h in a header (Andy Shevchenko) - Avoid sleeping in atomic context in PCI driver (Long Li) - Avoid sending IPI to self when it shouldn't (Vitaly Kuznetsov) * tag 'hyperv-fixes-signed-20211007' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux: x86/hyperv: Avoid erroneously sending IPI to 'self' hyper-v: Replace uuid.h with types.h PCI: hv: Fix sleep while in non-sleep context when removing child devices from the bus
2021-09-24PCI: hv: Fix sleep while in non-sleep context when removing child devices ↵Long Li1-3/+10
from the bus In hv_pci_bus_exit, the code is holding a spinlock while calling pci_destroy_slot(), which takes a mutex. This is not safe for spinlock. Fix this by moving the children to be deleted to a list on the stack, and removing them after spinlock is released. Fixes: 94d22763207a ("PCI: hv: Fix a race condition when removing the device") Cc: "K. Y. Srinivasan" <kys@microsoft.com> Cc: Haiyang Zhang <haiyangz@microsoft.com> Cc: Stephen Hemminger <sthemmin@microsoft.com> Cc: Wei Liu <wei.liu@kernel.org> Cc: Dexuan Cui <decui@microsoft.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Rob Herring <robh@kernel.org> Cc: "Krzysztof Wilczyński" <kw@linux.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Michael Kelley <mikelley@microsoft.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/linux-hyperv/20210823152130.GA21501@kili/ Signed-off-by: Long Li <longli@microsoft.com> Reviewed-by: Wei Liu <wei.liu@kernel.org> Link: https://lore.kernel.org/r/1630365207-20616-1-git-send-email-longli@linuxonhyperv.com Signed-off-by: Wei Liu <wei.liu@kernel.org>
2021-09-09Merge tag 'acpi-5.15-rc1-2' of ↵Linus Torvalds1-0/+55
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull more ACPI updates from Rafael Wysocki: "These add ACPI support to the PCI VMD driver, improve suspend-to-idle support for AMD platforms and update documentation. Specifics: - Add ACPI support to the PCI VMD driver (Rafael Wysocki) - Rearrange suspend-to-idle support code to reflect the platform firmware expectations on some AMD platforms (Mario Limonciello) - Make SSDT overlays documentation follow the code documented by it more closely (Andy Shevchenko)" * tag 'acpi-5.15-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: ACPI: PM: s2idle: Run both AMD and Microsoft methods if both are supported Documentation: ACPI: Align the SSDT overlays file with the code PCI: VMD: ACPI: Make ACPI companion lookup work for VMD bus
2021-09-08Merge tag 'pci-v5.15-changes' of ↵Linus Torvalds41-346/+2115
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "Enumeration: - Convert controller drivers to generic_handle_domain_irq() (Marc Zyngier) - Simplify VPD (Vital Product Data) access and search (Heiner Kallweit) - Update bnx2, bnx2x, bnxt, cxgb4, cxlflash, sfc, tg3 drivers to use simplified VPD interfaces (Heiner Kallweit) - Run Max Payload Size quirks before configuring MPS; work around ASMedia ASM1062 SATA MPS issue (Marek Behún) Resource management: - Refactor pci_ioremap_bar() and pci_ioremap_wc_bar() (Krzysztof Wilczyński) - Optimize pci_resource_len() to reduce kernel size (Zhen Lei) PCI device hotplug: - Fix a double unmap in ibmphp (Vishal Aslot) PCIe port driver: - Enable Bandwidth Notification only if port supports it (Stuart Hayes) Sysfs/proc/syscalls: - Add schedule point in proc_bus_pci_read() (Krzysztof Wilczyński) - Return ~0 data on pciconfig_read() CAP_SYS_ADMIN failure (Krzysztof Wilczyński) - Return "int" from pciconfig_read() syscall (Krzysztof Wilczyński) Virtualization: - Extend "pci=noats" to also turn on Translation Blocking to protect against some DMA attacks (Alex Williamson) - Add sysfs mechanism to control the type of reset used between device assignments to VMs (Amey Narkhede) - Add support for ACPI _RST reset method (Shanker Donthineni) - Add ACS quirks for Cavium multi-function devices (George Cherian) - Add ACS quirks for NXP LX2xx0 and LX2xx2 platforms (Wasim Khan) - Allow HiSilicon AMBA devices that appear as fake PCI devices to use PASID and SVA (Zhangfei Gao) Endpoint framework: - Add support for SR-IOV Endpoint devices (Kishon Vijay Abraham I) - Zero-initialize endpoint test tool parameters so we don't use random parameters (Shunyong Yang) APM X-Gene PCIe controller driver: - Remove redundant dev_err() call in xgene_msi_probe() (ErKun Yang) Broadcom iProc PCIe controller driver: - Don't fail devm_pci_alloc_host_bridge() on missing 'ranges' because it's optional on BCMA devices (Rob Herring) - Fix BCMA probe resource handling (Rob Herring) Cadence PCIe driver: - Work around J7200 Link training electrical issue by increasing delays in LTSSM (Nadeem Athani) Intel IXP4xx PCI controller driver: - Depend on ARCH_IXP4XX to avoid useless config questions (Geert Uytterhoeven) Intel Keembay PCIe controller driver: - Add Intel Keem Bay PCIe controller (Srikanth Thokala) Marvell Aardvark PCIe controller driver: - Work around config space completion handling issues (Evan Wang) - Increase timeout for config access completions (Pali Rohár) - Emulate CRS Software Visibility bit (Pali Rohár) - Configure resources from DT 'ranges' property to fix I/O space access (Pali Rohár) - Serialize INTx mask/unmask (Pali Rohár) MediaTek PCIe controller driver: - Add MT7629 support in DT (Chuanjia Liu) - Fix an MSI issue (Chuanjia Liu) - Get syscon regmap ("mediatek,generic-pciecfg"), IRQ number ("pci_irq"), PCI domain ("linux,pci-domain") from DT properties if present (Chuanjia Liu) Microsoft Hyper-V host bridge driver: - Add ARM64 support (Boqun Feng) - Support "Create Interrupt v3" message (Sunil Muthuswamy) NVIDIA Tegra PCIe controller driver: - Use seq_puts(), move err_msg from stack to static, fix OF node leak (Christophe JAILLET) NVIDIA Tegra194 PCIe driver: - Disable suspend when in Endpoint mode (Om Prakash Singh) - Fix MSI-X address programming error (Om Prakash Singh) - Disable interrupts during suspend to avoid spurious AER link down (Om Prakash Singh) Renesas R-Car PCIe controller driver: - Work around hardware issue that prevents Link L1->L0 transition (Marek Vasut) - Fix runtime PM refcount leak (Dinghao Liu) Rockchip DesignWare PCIe controller driver: - Add Rockchip RK356X host controller driver (Simon Xue) TI J721E PCIe driver: - Add support for J7200 and AM64 (Kishon Vijay Abraham I) Toshiba Visconti PCIe controller driver: - Add Toshiba Visconti PCIe host controller driver (Nobuhiro Iwamatsu) Xilinx NWL PCIe controller driver: - Enable PCIe reference clock via CCF (Hyun Kwon) Miscellaneous: - Convert sta2x11 from 'pci_' to 'dma_' API (Christophe JAILLET) - Fix pci_dev_str_match_path() alloc while atomic bug (used for kernel parameters that specify devices) (Dan Carpenter) - Remove pointless Precision Time Management warning when PTM is present but not enabled (Jakub Kicinski) - Remove surplus "break" statements (Krzysztof Wilczyński)" * tag 'pci-v5.15-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (132 commits) PCI: ibmphp: Fix double unmap of io_mem x86/PCI: sta2x11: switch from 'pci_' to 'dma_' API PCI/VPD: Use unaligned access helpers PCI/VPD: Clean up public VPD defines and inline functions cxgb4: Use pci_vpd_find_id_string() to find VPD ID string PCI/VPD: Add pci_vpd_find_id_string() PCI/VPD: Include post-processing in pci_vpd_find_tag() PCI/VPD: Stop exporting pci_vpd_find_info_keyword() PCI/VPD: Stop exporting pci_vpd_find_tag() PCI: Set dma-can-stall for HiSilicon chips PCI: rockchip-dwc: Add Rockchip RK356X host controller driver PCI: dwc: Remove surplus break statement after return PCI: artpec6: Remove local code block from switch statement PCI: artpec6: Remove surplus break statement after return MAINTAINERS: Add entries for Toshiba Visconti PCIe controller PCI: visconti: Add Toshiba Visconti PCIe host controller driver PCI/portdrv: Enable Bandwidth Notification only if port supports it PCI: Allow PASID on fake PCIe devices without TLP prefixes PCI: mediatek: Use PCI domain to handle ports detection PCI: mediatek: Add new method to get irq number ...
2021-09-02Merge branch 'remotes/lorenzo/pci/misc'Bjorn Helgaas1-0/+1
- Make ixp4xx driver depend on ARCH_IXP4XX (Geert Uytterhoeven) * remotes/lorenzo/pci/misc: PCI: controller: PCI_IXP4XX should depend on ARCH_IXP4XX
2021-09-02Merge branch 'remotes/lorenzo/pci/endpoint'Bjorn Helgaas5-89/+192
- Add max-virtual-functions to endpoint binding (Kishon Vijay Abraham I) - Add pci_epf_add_vepf() API to add virtual function to endpoint (Kishon Vijay Abraham I) - Add pci_epf_vepf_link() to link virtual function to endpoint physical function (Kishon Vijay Abraham I) - Add virtual function number to pci_epc_ops endpoint ops interfaces (Kishon Vijay Abraham I) - Simplify register base address computation for endpoint BAR configuration (Kishon Vijay Abraham I) - Add support to configure virtual functions in cadence endpoint driver (Kishon Vijay Abraham I) - Add SR-IOV configuration to endpoint test driver (Kishon Vijay Abraham I) - Document configfs usage to create virtual functions for endpoints (Kishon Vijay Abraham I) * remotes/lorenzo/pci/endpoint: Documentation: PCI: endpoint/pci-endpoint-cfs: Guide to use SR-IOV misc: pci_endpoint_test: Populate sriov_configure ops to configure SR-IOV device PCI: cadence: Add support to configure virtual functions PCI: cadence: Simplify code to get register base address for configuring BAR PCI: endpoint: Add virtual function number in pci_epc ops PCI: endpoint: Add support to link a physical function to a virtual function PCI: endpoint: Add support to add virtual function in endpoint core dt-bindings: PCI: pci-ep: Add binding to specify virtual function
2021-09-02Merge branch 'remotes/lorenzo/pci/xilinx-nwl'Bjorn Helgaas1-0/+12
- Document optional clock DT property (Michal Simek) - Enable PCIe ref clock (Hyun Kwon) * remotes/lorenzo/pci/xilinx-nwl: PCI: xilinx-nwl: Enable the clock through CCF dt-bindings: pci: xilinx-nwl: Document optional clock property
2021-09-02Merge branch 'remotes/lorenzo/pci/xgene'Bjorn Helgaas1-1/+0
- Remove redundant dev_err() after devm_ioremap_resource() (ErKun Yang) * remotes/lorenzo/pci/xgene: PCI: xgene-msi: Remove redundant dev_err() call in xgene_msi_probe()
2021-09-02Merge branch 'remotes/lorenzo/pci/tegra194'Bjorn Helgaas1-23/+31
- Fix handling BME_CHGED event (Om Prakash Singh) - Fix MSI-X programming (Om Prakash Singh) - Disable interrupts before entering L2 (Om Prakash Singh) - Don't allow suspend when Tegra PCIe is in EP mode (Om Prakash Singh) * remotes/lorenzo/pci/tegra194: PCI: tegra194: Cleanup unused code PCI: tegra194: Don't allow suspend when Tegra PCIe is in EP mode PCI: tegra194: Disable interrupts before entering L2 PCI: tegra194: Fix MSI-X programming PCI: tegra194: Fix handling BME_CHGED event
2021-09-02Merge branch 'remotes/lorenzo/pci/tegra'Bjorn Helgaas1-16/+14
- Remove unused struct tegra_pcie_bus (Krzysztof Wilczyński) * remotes/lorenzo/pci/tegra: PCI: tegra: make const array err_msg static PCI: tegra: Use 'seq_puts' instead of 'seq_printf' PCI: tegra: Fix OF node reference leak PCI: tegra: Remove unused struct tegra_pcie_bus
2021-09-02Merge branch 'remotes/lorenzo/pci/rcar'Bjorn Helgaas3-2/+95
- Fix runtime PM imbalance in rcar_pcie_ep_probe() (Dinghao Liu) * remotes/lorenzo/pci/rcar: PCI: rcar: Add L1 link state fix into data abort hook PCI: rcar: Fix runtime PM imbalance in rcar_pcie_ep_probe()
2021-09-02Merge branch 'remotes/lorenzo/pci/mediatek'Bjorn Helgaas1-13/+39
- Split DT bindings for PCIe controllers with independent MSI domains into separate nodes for MT2712/MT7622 (Chuanjia Liu) - Locate shared registers from "mediatek,generic-pciecfg" property (Chuanjia Liu) - Get IRQ from "pcie_irq" if "interrupt-names" property is present to fix an MSI issue (Chuanjia Liu) - Get PCI domain from "linux,pci-domain" property if present (Chuanjia Liu) * remotes/lorenzo/pci/mediatek: PCI: mediatek: Use PCI domain to handle ports detection PCI: mediatek: Add new method to get irq number PCI: mediatek: Add new method to get shared pcie-cfg base address dt-bindings: PCI: mediatek: Update the Device tree bindings
2021-09-02Merge branch 'remotes/lorenzo/pci/keembay'Bjorn Helgaas3-0/+489
- Add Intel Keem Bay PCIe controller driver and DT binding (Srikanth Thokala) * remotes/lorenzo/pci/keembay: PCI: keembay: Add support for Intel Keem Bay dt-bindings: PCI: Add Intel Keem Bay PCIe controller
2021-09-02Merge branch 'remotes/lorenzo/pci/iproc'Bjorn Helgaas1-10/+6
- Don't fail devm_pci_alloc_host_bridge() on missing 'ranges' (Rob Herring) - Fix BCMA probe resource handling (Rob Herring) * remotes/lorenzo/pci/iproc: PCI: iproc: Fix BCMA probe resource handling PCI: of: Don't fail devm_pci_alloc_host_bridge() on missing 'ranges'
2021-09-02Merge branch 'remotes/lorenzo/pci/hyper-v'Bjorn Helgaas1-36/+50
- Add domain_nr in struct pci_host_bridge (Boqun Feng) - Use host bridge MSI domain for root buses if present (Boqun Feng) - Allow ARM64 virtual host bridge with no ACPI companion (e.g., Hyper-V) (Boqun Feng) - Make Hyper-V enumeration more generic (Arnd Bergmann) - Set Hyper-V domain_nr at probe-time (Boqun Feng) - Set up Hyper-V MSI domain at bridge probe-time (Boqun Feng) - Enable Hyper-V bridge probing on ARM64 (Boqun Feng) * remotes/lorenzo/pci/hyper-v: PCI: hv: Turn on the host bridge probing on ARM64 PCI: hv: Set up MSI domain at bridge probing time PCI: hv: Set ->domain_nr of pci_host_bridge at probing time PCI: hv: Generify PCI probing arm64: PCI: Support root bridge preparation for Hyper-V arm64: PCI: Restructure pcibios_root_bridge_prepare() PCI: Support populating MSI domains of root buses via bridges PCI: Introduce domain_nr in pci_host_bridge
2021-09-02Merge branch 'remotes/lorenzo/pci/hv'Bjorn Helgaas1-5/+62
- Support Hyper-V Create Interrupt v3 message (Sunil Muthuswamy) * remotes/lorenzo/pci/hv: PCI: hv: Support for create interrupt v3
2021-09-02Merge branch 'remotes/lorenzo/pci/cadence'Bjorn Helgaas5-6/+95
- Convert bool in structs to bitfield (Kishon Vijay Abraham I) - Work around J7200 non-PCIe SERDES lane electrical issue that prevents PCIe link training (Nadeem Athani) - Add J7200 PCIe support to j721e (Kishon Vijay Abraham I) - Add AM64 PCIe support to j721e (Kishon Vijay Abraham I) - Add J7200 and AM64 device IDs to endpoint test (Kishon Vijay Abraham I) * remotes/lorenzo/pci/cadence: misc: pci_endpoint_test: Add deviceID for AM64 and J7200 PCI: j721e: Add PCIe support for AM64 PCI: j721e: Add PCIe support for J7200 PCI: cadence: Add quirk flag to set minimum delay in LTSSM Detect.Quiet state PCI: cadence: Use bitfield for *quirk_retrain_flag* instead of bool
2021-09-02Merge branch 'remotes/lorenzo/pci/aardvark'Bjorn Helgaas1-11/+318
- Fix PIO config access status checking (Evan Wang) - Increase config access polling delay to 1.5s (Pali Rohár) - Add PCIe Root Capabilities to bridge emulation (Pali Rohár) - Report Config Request Retry Status when Software Visibility enabled (Pali Rohár) - Add back configuration of PCIe resources from 'ranges' DT property and pay attention to DT size and CPU/PCI offset to fix issues with I/O port space (Pali Rohár) - Serialize masking and unmasking legacy INTx interrupts (Pali Rohár) * remotes/lorenzo/pci/aardvark: PCI: aardvark: Fix masking and unmasking legacy INTx interrupts PCI: aardvark: Configure PCIe resources from 'ranges' DT property PCI: aardvark: Fix reporting CRS value PCI: pci-bridge-emul: Add PCIe Root Capabilities Register PCI: aardvark: Increase polling delay to 1.5s while waiting for PIO response PCI: aardvark: Fix checking for PIO status
2021-09-02Merge branch 'pci/visconti'Bjorn Helgaas3-0/+342
- Add Toshiba Visconti PCIe host controller driver (Nobuhiro Iwamatsu) * pci/visconti: MAINTAINERS: Add entries for Toshiba Visconti PCIe controller PCI: visconti: Add Toshiba Visconti PCIe host controller driver
2021-09-02Merge branch 'pci/rockchip-dwc'Bjorn Helgaas3-0/+291
- Add Rockchip RK356X host controller driver (Simon Xue) * pci/rockchip-dwc: PCI: rockchip-dwc: Add Rockchip RK356X host controller driver
2021-09-02Merge branch 'pci/dwc'Bjorn Helgaas1-1/+0
- Remove surplus break statement (Krzysztof Wilczyński) * pci/dwc: PCI: dwc: Remove surplus break statement after return
2021-09-02Merge branch 'pci/artpec6'Bjorn Helgaas1-5/+2
- Remove surplus break statement and local code block (Krzysztof Wilczyński) * pci/artpec6: PCI: artpec6: Remove local code block from switch statement PCI: artpec6: Remove surplus break statement after return
2021-09-02PCI: VMD: ACPI: Make ACPI companion lookup work for VMD busRafael J. Wysocki1-0/+55
On some systems, in order to get to the deepest low-power state of the platform (which may be necessary to save significant enough amounts of energy while suspended to idle. for example), devices on the PCI bus exposed by the VMD driver need to be power-managed via ACPI. However, the layout of the ACPI namespace below the VMD controller device object does not reflect the layout of the PCI bus under the VMD host bridge, so in order to identify the ACPI companion objects for the devices on that bus, it is necessary to use a special _ADR encoding on the ACPI side. In other words, acpi_pci_find_companion() does not work for these devices, so it needs to be amended with a special lookup logic specific to the VMD bus. Address this issue by allowing the VMD driver to temporarily install an ACPI companion lookup hook containing the code matching the devices on the VMD PCI bus with the corresponding objects in the ACPI namespace. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Jon Derrick <jonathan.derrick@intel.com>
2021-08-31PCI: rockchip-dwc: Add Rockchip RK356X host controller driverSimon Xue3-0/+291
Add a driver for the DesignWare-based PCIe controller found on RK356X. The existing pcie-rockchip-host driver is only used for the Rockchip-designed IP found on RK3399. Link: https://lore.kernel.org/r/20210625065511.1096935-1-xxm@rock-chips.com Tested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Simon Xue <xxm@rock-chips.com> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Rob Herring <robh@kernel.org>
2021-08-31PCI: dwc: Remove surplus break statement after returnKrzysztof Wilczyński1-1/+0
As part of code refactoring completed in a0fd361db8e5 ("PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into common code"), dw_plat_add_pcie_ep() was removed and the call to the dw_pcie_ep_init() was moved into dw_plat_pcie_probe(). This left a break statement behind that is not needed any more as as dw_plat_pcie_probe() returns immediately after calling dw_pcie_ep_init(). Remove this surplus break statement that became dead code. Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/r/20210701210252.1638709-1-kw@linux.com Signed-off-by: Krzysztof Wilczyński <kw@linux.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2021-08-31PCI: artpec6: Remove local code block from switch statementKrzysztof Wilczyński1-4/+2
The switch statement in the artpec6_pcie_probe() has a local code block where "val" is defined and immediately used by the artpec6_pcie_readl(). This extra code block adds brackets at the same indentation level as the switch statement itself which can hinder readability of the code. Move the "val" declaration to the top of the function and remove the extra code block from the switch statement. Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/r/20210701204401.1636562-2-kw@linux.com Signed-off-by: Krzysztof Wilczyński <kw@linux.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
2021-08-31PCI: artpec6: Remove surplus break statement after returnKrzysztof Wilczyński1-1/+0
As part of code refactoring completed in a0fd361db8e5 ("PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into common code"), artpec6_add_pcie_ep() was removed and the call to the dw_pcie_ep_init() was moved into artpec6_pcie_probe(). This left a break statement behind that is not needed any more as artpec6_pcie_probe() returns immediately after calling dw_pcie_ep_init(). Remove this surplus break statement that became dead code. Link: https://lore.kernel.org/r/20210701204401.1636562-1-kw@linux.com Signed-off-by: Krzysztof Wilczyński <kw@linux.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
2021-08-31PCI: visconti: Add Toshiba Visconti PCIe host controller driverNobuhiro Iwamatsu3-0/+342
Add support for the PCIe RC controller on Toshiba Visconti ARM SoCs. This PCIe controller is based on the Synopsys DesignWare PCIe core. Link: https://lore.kernel.org/r/20210811083830.784065-3-nobuhiro1.iwamatsu@toshiba.co.jp Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rob Herring <robh@kernel.org>
2021-08-26PCI: mediatek: Use PCI domain to handle ports detectionChuanjia Liu1-12/+17
Use of_get_pci_domain_nr() to get the pci domain. If the "linux,pci-domain" property is present, we assume that the PCIe bridge is an individual bridge, hence we only need to parse one port. Link: https://lore.kernel.org/r/20210823032800.1660-5-chuanjia.liu@mediatek.com Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com> [lorenzo.pieralisi@arm.com: commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2021-08-26PCI: mediatek: Add new method to get irq numberChuanjia Liu1-1/+5
Use platform_get_irq_byname() to get the irq number if the "interrupt-names" property is defined. Link: https://lore.kernel.org/r/20210823032800.1660-4-chuanjia.liu@mediatek.com Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com> [lorenzo.pieralisi@arm.com: commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2021-08-26PCI: mediatek: Add new method to get shared pcie-cfg base addressChuanjia Liu1-0/+17
For the new dts format, add a new method to get shared pcie-cfg base address and use it to configure the PCIECFG controller Link: https://lore.kernel.org/r/20210823032800.1660-3-chuanjia.liu@mediatek.com Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
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