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2021-01-30net: mhi: Get RX queue size from MHI coreLoic Poulain1-3/+3
The RX queue size can be determined at runtime by retrieving the number of available transfer descriptors. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-01-30net/ethernet: convert to use module_platform_driver in octeon_mgmt.cdingsenjie1-12/+1
Simplify the code by using module_platform_driver macro for octeon_mgmt. Signed-off-by: dingsenjie <dingsenjie@yulong.com> Link: https://lore.kernel.org/r/20210128035330.17676-1-dingsenjie@163.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-01-30net/mlx5: DR, Allow SW steering for sw_owner_v2 devicesYevgeny Kliteynik4-16/+29
Allow sw_owner_v2 based on sw_format_version. Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-30net/mlx5: DR, Copy all 64B whenever replacing STE in the head of miss-listYevgeny Kliteynik1-4/+15
Till now the code assumed that need to copy reduced size of the ste because the rest is the mask part which shouldn't be changed. This is not true for all types of HW (like STEv1). Take all 64B from the new STE and write them in the replaced STE place. This change will make it easier to handle all STE HW types because we have all the data that is about to be written into HW. Signed-off-by: Erez Shitrit <erezsh@nvidia.com> Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-30net/mlx5: DR, Use HW specific logic API when writing STEYevgeny Kliteynik6-13/+60
STEv0 format and STEv1 HW format are different, each has a different order: STEv0: CTRL 32B, TAG 16B, BITMASK 16B STEv1: CTRL 32B, BITMASK 16B, TAG 16B To make this transparent to upper layers we introduce a new ste_ctx function to format the STE prior to writing it. Signed-off-by: Erez Shitrit <erezsh@nvidia.com> Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-30net/mlx5: DR, Use the right size when writing partial STE into HWYevgeny Kliteynik2-5/+9
In these cases we need to update only the ctrl area of the STE. So it is better to write only the control 32B and avoid copying the unneeded reduced 48B (control 32B + tag 16B). Signed-off-by: Erez Shitrit <erezsh@nvidia.com> Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-30net/mlx5: DR, Add STEv1 modify header logicYevgeny Kliteynik2-0/+273
Add HW specific modify header fields and logic to STEv1 file. Since STEv0 and STEv1 modify actions values are different, each version has its own implementation. Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-30net/mlx5: DR, Add STEv1 action apply logicYevgeny Kliteynik2-0/+458
Add HW specific action apply logic to STEv1. Since STEv0 and STEv1 actions format is different, each version has its implementation. Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-30net/mlx5: DR, Add STEv1 setters and gettersYevgeny Kliteynik2-0/+133
Add HW specific setter and getters to STEv1 file. Since STEv0 and STEv1 format are different, each version should implemented different setters and getters. Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-30net/mlx5: DR, Allow native protocol support for HW STEv1Yevgeny Kliteynik1-4/+8
Some flex parser protocols are native as part of STEv1. The check for supported protocols was modified to allow this. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-30net/mlx5: DR, Add HW STEv1 match logicYevgeny Kliteynik4-2/+911
Add STEv1 match logic to a new file. This file will be used for HW specific STEv1. Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-30net/mlx5: DR, Add match STEv1 structs to ifcYevgeny Kliteynik1-0/+273
Add mlx5_ifc_dr_ste_v1.h - a new header with HW specific STE structs for version 1. Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-30net/mlx5: DR, Fix potential shift wrapping of 32-bit valueYevgeny Kliteynik1-2/+2
Fix 32-bit variable shift wrapping in dr_ste_v0_get_miss_addr. Fixes: 6b93b400aa88 ("net/mlx5: DR, Move STEv0 setters and getters") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-30net/mlx5: CT: Add support for matching on ct_state reply flagPaul Blakey1-3/+10
Add support for matching on ct_state reply flag. Example: $ tc filter add dev ens1f0_0 ingress prio 1 chain 1 proto ip flower \ ct_state +trk+est+rpl \ action mirred egress redirect dev ens1f0_1 $ tc filter add dev ens1f0_1 ingress prio 1 chain 1 proto ip flower \ ct_state +trk+est-rpl \ action mirred egress redirect dev ens1f0_0 Signed-off-by: Paul Blakey <paulb@nvidia.com> Acked-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-01-30hv_netvsc: Copy packets sent by Hyper-V out of the receive bufferAndrea Parri (Microsoft)4-86/+150
Pointers to receive-buffer packets sent by Hyper-V are used within the guest VM. Hyper-V can send packets with erroneous values or modify packet fields after they are processed by the guest. To defend against these scenarios, copy (sections of) the incoming packet after validating their length and offset fields in netvsc_filter_receive(). In this way, the packet can no longer be modified by the host. Reported-by: Juan Vazquez <juvazq@microsoft.com> Signed-off-by: Andrea Parri (Microsoft) <parri.andrea@gmail.com> Link: https://lore.kernel.org/r/20210126162907.21056-1-parri.andrea@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-01-29mt76: mt7663: introduce coredump supportLorenzo Bianconi7-1/+72
Similar to mt7921 devices, introduce coredump support for mt7663 chipset Co-developed-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: add coredump supportSean Wang10-1/+117
Introduce coredump support to mt7921 driver. The coredump would be produced when MCU met the fatal error or driver sent out the specific cmd to force trigger it. Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: enable MSI interruptsLorenzo Bianconi1-1/+1
Enable MSI interrupts for mt7921 driver Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: introduce regdomain notifier supportLorenzo Bianconi1-0/+16
Register regdomain notifier to determine the channel domain the hw scan should rely on. Co-developed-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: introduce Runtime PM supportSean Wang8-54/+372
Introduce runtime PM to mt7921 driver Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: rely on mt76_connac_mcu module for suspend and WoW supportLorenzo Bianconi5-412/+11
Rely on mt76_connac_mcu module for suspend and WoW support and remove duplicated code Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: rely on mt76_connac_mcu module for sched_scan and hw_scanLorenzo Bianconi5-334/+15
Rely on mt76_connac_mcu module for sched_scan and hw_scan and remove duplicated code Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: rely on mt76_connac_mcu common libraryLorenzo Bianconi10-1811/+411
Rely on mt76_connac_mcu common library and remove duplicated code Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: introduce PM supportSean Wang5-0/+589
Introduce suspend/resume and WoW (Wake-on-WoWLAN) support to mt7921 driver to allow remote wakeu-up from the suspend state. Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Co-developed-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: introduce beacon_loss mcu eventSean Wang2-0/+41
If device has enabled beacon hw filter rx beacons are not reported to the host. Introduce beacon_loss mcu event to trigger mac80211 mlme connection state machine in this configuration. IEEE80211_VIF_BEACON_FILTER has not set in vif flags since hw beacon filter is not enabled yet Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Co-developed-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: introduce support for hardware beacon filterSean Wang3-0/+80
Introduce support for hw beacon filter available in the mt7921 firmware. According to mt7921e firmware, enabling hardware filter would rely on mt7921_mcu_uni_bss_bcnft and disabling hardware filter still rely on legacy mt7921_mcu_set_bss_pm. Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Co-developed-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: introduce 802.11 PS support in sta modeSean Wang6-3/+45
Enable 802.11 power-save support available in mt7921 firmware Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Co-developed-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: introduce schedule scan supportSean Wang5-0/+155
introduce schedule scan to control mt7921 firmware to do background scan in defined plan to see if the matched SSID is available. Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Co-developed-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: add debugfs supportSean Wang2-1/+179
Add debugfs support to dump driver statistics and hardware details. Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Co-developed-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: introduce mt7921e supportSean Wang6-0/+449
Introduce support for mt7921e 802.11ax (Wi-Fi 6) 2x2:2SS chipset. Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Co-developed-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: add ieee80211_opsSean Wang1-0/+960
Filling ieee80211_ops with the mt7921 operations. Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Co-developed-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: add EEPROM supportSean Wang2-0/+127
Add EEPROM support to MT7921 to determine the capability the card has such as indentificaiton, MAC address, the band and antenna number the card able to support. Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Co-developed-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: add DMA supportSean Wang2-0/+359
Add DMA and register access support to MT7921e driver to set up the link for the data movement between the host and MT7921 MAC, or the host and MT7921 MCU. Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Co-developed-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: add MCU supportSean Wang4-0/+3462
MT7921 contains a microprocessor with which the host can use command/event to communicate to implement offload features such as establish connection, hardware scan and so on. The host has to download the ROM patch, RAM firmware and finally activate the MCU to complete the MT7921 initialization. Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Co-developed-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt7921: add MAC supportSean Wang4-0/+2457
Add Rx packet description parsing, Tx packet description compositon, handle packet recycling and provide MAC information mt76 core needs to support mac80211. Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Co-developed-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Soul Huang <Soul.Huang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29Fix "ordering" comment typosBjorn Helgaas1-1/+1
Fix comment typos in "ordering". Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Kalle Valo <kvalo@codeaurora.org> Acked-by: Vasily Gorbik <gor@linux.ibm.com> # s390
2021-01-29mt76: mt76_connac: move pm utility routines in mt76_connac_lib moduleLorenzo Bianconi7-143/+177
Move power_save common code shared between mt7663 and mt7921 in mt76_connac module Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt76_connac: move pm data struct in mt76_connac.hLorenzo Bianconi5-61/+70
Move pm mt7663 data structure in mt76_connac.h introducing mt76_connac_pm data struct. This is a preliminary patch to share pm code between mt7663 and mt7921 Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt76_connac: move WoW and suspend code in mt76_connac_mcu moduleLorenzo Bianconi9-442/+449
Move WoW and suspend code in mt76_connac_mcu module in order to be reused in mt7615 and mt7921 drivers Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt76_connac: move hw_scan and sched_scan routine in mt76_connac_mcu moduleLorenzo Bianconi7-356/+359
Move hw_scan/sched_scan in mt76_connac_mcu module in order to be reused in mt7615 and mt7921 drivers Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: mt76_connac: create mcu libraryLorenzo Bianconi12-1420/+1864
Introduce mt76_connac common mcu library for code sharing between mt7615 and mt7921 devices Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29mt76: introduce mt76_vif data structureLorenzo Bianconi6-81/+85
Introduce mt76_vif data structure to share common fields between mt7615_vif and mt7921_vif and create a mcu common library Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
2021-01-29can: mcp251xfd: mcp251xfd_probe(): use dev_err_probe() to simplify error ↵Marc Kleine-Budde1-16/+12
handling dev_err_probe() can reduce code size, uniform error handling and record the defer probe reason etc., use it to simplify the code. Link: https://lore.kernel.org/r/20210128104644.2982125-9-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-29can: mcp251xfd: mcp251xfd_chip_clock_enable(): simplify returnMarc Kleine-Budde1-3/+1
This patch simplifies the return of the mcp251xfd_chip_clock_enable() function by direct returning the error. Link: https://lore.kernel.org/r/20210128104644.2982125-8-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-29can: mcp251xfd: add missing _MASK postfix to MCP251XFD_OBJ_FLAGS_DLCMarc Kleine-Budde2-3/+3
As MCP251XFD_OBJ_FLAGS_DLC is a mask, add the missing _MASK postfix, that all other masks in the driver have. Link: https://lore.kernel.org/r/20210128104644.2982125-7-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-29can: mcp251xfd: unify error messages and commetsMarc Kleine-Budde1-4/+4
This patch unifies the error messages: - have a "." and the end of each message - write controller with a small "c", if not the first word of an error message. Link: https://lore.kernel.org/r/20210128104644.2982125-6-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-29can: mcp251xfd: mcp251xfd_probe(): add imx6 to errata tableMarc Kleine-Budde1-0/+1
This patch adds an imx6 as known good to the errata table. Link: https://lore.kernel.org/r/20210128104644.2982125-5-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-29can: mcp251xfd: mcp251xfd_probe(): remove known bad combinations from errata ↵Marc Kleine-Budde1-10/+7
tabe The published errata specify the maximum allowed SPI frequency to be max 85% of (FSYSCLK/2). So there's no need to track known bad clock settings in the driver. As the setup of known good values is a bit tricky, keep them. Link: https://lore.kernel.org/r/20210128104644.2982125-4-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-29can: mcp251xfd: mcp251xfd_probe(): sort errata table alphabetically, fix ↵Marc Kleine-Budde1-2/+2
indention This patch sorts the errata table alphabetically and fixes the indention. Link: https://lore.kernel.org/r/20210128104644.2982125-3-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-29can: mcp251xfd: mcp251xfd_probe(): fix errata referenceMarc Kleine-Budde1-1/+1
This patch fixes the reference to the errata for both the mcp2517fd and the mcp2518fd. Fixes: f5b84dedf7eb ("can: mcp25xxfd: mcp25xxfd_probe(): add SPI clk limit related errata information") Link: https://lore.kernel.org/r/20210128104644.2982125-2-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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