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2021-03-17mlxsw: spectrum: Add mlxsw_sp_port_egress_ethtype_set()Amit Cohen2-0/+18
A subsequent patch will cause decapsulated packets to have their EtherType determined by the egress port. Add mlxsw_sp_port_egress_ethtype_set() which will be called when a port joins an 802.1ad bridge, so that it will set an 802.1ad EtherType on decapsulated packets transmitted through it, instead of the default 802.1q EtherType. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17mlxsw: reg: Add Switch Port Egress VLAN EtherType RegisterAmit Cohen1-0/+36
SPEVET configures which EtherType to push at egress for packets incoming through a local port for which 'SPVID.egr_et_set' is set. The next patches will use SPEVET to configure EtherType 0x88A8 and 0x8100 for local ports member in 802.1ad and 802.1q bridges, respectively. This allows using dual VxLAN bridges (802.1d and 802.1ad at the same time). Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17mlxsw: reg: Add egr_et_set field to SPVIDAmit Cohen1-0/+9
SPVID.egr_et_set=1 means that when VLAN is pushed at ingress (for untagged packets or for QinQ push mode) then the EtherType is decided at the egress port. The next patches will use this field for VxLAN devices (tunnel port) in order to allow using dual VxLAN bridges (802.1d and 802.1ad at the same time). Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17net: dsa: b53: support legacy tagsÁlvaro Fernández Rojas2-5/+8
These tags are used on BCM5325, BCM5365 and BCM63xx switches. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17net: ppp: Mundane typo fixes in the file pppoe.cBhaskar Chowdhury1-2/+2
s/procesing/processing/ s/comparations/comparisons/ Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17net: dsa: b53: relax is63xx() conditionÁlvaro Fernández Rojas1-4/+0
BCM63xx switches are present on bcm63xx and bmips devices. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17net: stmmac: add timestamp correction to rid CDC sync errorVoon Weifeng1-0/+16
According to Synopsis DesignWare EQoS Databook, the Clock Domain Cross synchronization error is introduced tue to the clock(GMII Tx/Rx clock) being different at the capture as compared to the PTP clock(clk_ptp_ref_i) that is used to generate the time. The CDC synchronization error is almost equal to 2 times the clock period of the PTP clock(clk_ptp_ref_i). On a Intel Tigerlake platform (with Marvell 88E2110 external PHY): Before applying this patch (with CDC synchronization error): ptp4l[64.044]: rms 8 max 13 freq +30877 +/- 11 delay 216 +/- 0 ptp4l[65.047]: rms 13 max 20 freq +30869 +/- 17 delay 213 +/- 0 ptp4l[66.050]: rms 12 max 20 freq +30857 +/- 11 delay 213 +/- 0 ptp4l[67.052]: rms 11 max 22 freq +30849 +/- 10 delay 215 +/- 0 ptp4l[68.055]: rms 10 max 16 freq +30853 +/- 13 delay 215 +/- 0 ptp4l[69.057]: rms 7 max 13 freq +30848 +/- 9 delay 216 +/- 0 ptp4l[70.060]: rms 8 max 13 freq +30846 +/- 10 delay 216 +/- 0 ptp4l[71.063]: rms 9 max 15 freq +30836 +/- 8 delay 218 +/- 0 After applying this patch (CDC syncrhonization error is taken care of): ptp4l[61.516]: rms 773 max 824 freq +31526 +/- 158 delay 200 +/- 0 ptp4l[62.519]: rms 427 max 596 freq +31668 +/- 39 delay 198 +/- 0 ptp4l[63.522]: rms 113 max 206 freq +31482 +/- 57 delay 198 +/- 0 ptp4l[64.525]: rms 40 max 56 freq +31316 +/- 29 delay 200 +/- 0 ptp4l[65.528]: rms 47 max 56 freq +31255 +/- 17 delay 200 +/- 0 ptp4l[66.531]: rms 26 max 36 freq +31246 +/- 9 delay 200 +/- 0 ptp4l[67.534]: rms 12 max 18 freq +31254 +/- 12 delay 202 +/- 0 ptp4l[68.537]: rms 7 max 12 freq +31263 +/- 10 delay 202 +/- 0 Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: Wong Vee Khee <vee.khee.wong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17ionic: Update driver to use ethtool_sprintfAlexander Duyck1-85/+60
Update the ionic driver to make use of ethtool_sprintf. In addition add separate functions for Tx/Rx stats strings in order to reduce the total amount of indenting needed in the driver code. Acked-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17bna: Update driver to use ethtool_sprintfAlexander Duyck1-161/+105
Update the bnad_get_strings to make use of ethtool_sprintf and avoid unnecessary line wrapping. To do this we invert the logic for the string set test and instead exit immediately if we are not working with the stats strings. In addition the function is broken up into subfunctions for each area so that we can simply call ethtool_sprintf once for each string in a given subsection. Signed-off-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17vmxnet3: Update driver to use ethtool_sprintfAlexander Duyck1-34/+19
So this patch actually does 3 things. First it removes a stray white space at the start of the variable declaration in vmxnet3_get_strings. Second it flips the logic for the string test so that we exit immediately if we are not looking for the stats strings. Doing this we can avoid unnecessary indentation and line wrapping. Then finally it updates the code to use ethtool_sprintf rather than a memcpy and pointer increment to write the ethtool strings. Signed-off-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17virtio_net: Update driver to use ethtool_sprintfAlexander Duyck1-11/+7
Update the code to replace instances of snprintf and a pointer update with just calling ethtool_sprintf. Also replace the char pointer with a u8 pointer to avoid having to recast the pointer type. Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Jason Wang <jasowang@redhat.com> Signed-off-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17netvsc: Update driver to use ethtool_sprintfAlexander Duyck1-22/+11
Replace instances of sprintf or memcpy with a pointer update with ethtool_sprintf. Signed-off-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17ena: Update driver to use ethtool_sprintfAlexander Duyck1-14/+11
Replace instances of snprintf or memcpy with a pointer update with ethtool_sprintf. Acked-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17hisilicon: Update drivers to use ethtool_sprintfAlexander Duyck5-162/+90
Update the hisilicon drivers to make use of ethtool_sprintf. The general idea is to reduce code size and overhead by replacing the repeated pattern of string printf statements and ETH_STRING_LEN counter increments. Signed-off-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17nfp: Replace nfp_pr_et with ethtool_sprintfAlexander Duyck3-49/+36
The nfp_pr_et function is nearly identical to ethtool_sprintf except for the fact that it passes the pointer by value and as a return whereas ethtool_sprintf passes it as a pointer. Since they are so close just update nfp to make use of ethtool_sprintf Reviewed-by: Simon Horman <simon.horman@netronome.com> Signed-off-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17intel: Update drivers to use ethtool_sprintfAlexander Duyck4-101/+50
Update the Intel drivers to make use of ethtool_sprintf. The general idea is to reduce code size and overhead by replacing the repeated pattern of string printf statements and ETH_STRING_LEN counter increments. Signed-off-by: Alexander Duyck <alexanderduyck@fb.com> Acked-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17ionic: linearize tso skb with too many fragsShannon Nelson1-6/+7
We were linearizing non-TSO skbs that had too many frags, but we weren't checking number of frags on TSO skbs. This could lead to a bad page reference when we received a TSO skb with more frags than the Tx descriptor could support. v2: use gso_segs rather than yet another division don't rework the check on the nr_frags Fixes: 0f3154e6bcb3 ("ionic: Add Tx and Rx handling") Signed-off-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17Merge tag 'mlx5-updates-2021-03-16' of ↵David S. Miller23-271/+493
git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux Saeed Mahameed says: ==================== mlx5-updates-2021-03-16 mlx5 uplink representor netdev persistence. Before this patchset we used to have separate netdevs for Native NIC mode and Switchdev mode (uplink representor netdev), meaning that if user switches modes between Native to Switchdev and vice versa, the driver would cleanup the current netdev representor and create a new one for the new mode, such behavior created an administrative nightmare for users, where users need to be aware of such loss of both data path and control path configurations, e.g. netdev attributes and arp/route tables, where the later is more painful. A simple solution for this is not to replace the netdev in first place and use a single netdev to serve the uplink/physical port whether it is in switchdev mode or native mode. We already have different HW profiles for each netdev mode, in this series we just replace the HW profile on the fly and we keep the same netdev attached. Refactoring: Some refactoring has been made to overcome some technical difficulties 1) The netdev is created with the maximum amount of tx/rx queues to serve the two profiles. 2) Some ndos are not supported in some modes, so we added a mode check for such cases, e.g legacy sriov ndos must be blocked in switchdev mode. 3) Some mlx5 netdev private attributes need to be moved out of profiles and kept in a persistent place, where the netdev is created e.g devlink port and other global HW resources 4) The netdev devlink port is now always registered with the switch id Implementation: the last three patches implement the mechanism now as the netdev can be shared. 5) Don't recreate the netdev on switchdev mode changes 6) Prevent changing switchdev mode when some netdev operations are active, mostly when TC rules are being processed. This is required since the netdev is kept registered while switchdev mode can be changed. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17ath9k: Use tasklet_disable_in_atomic()Sebastian Andrzej Siewior1-1/+1
All callers of ath9k_beacon_ensure_primary_slot() are preemptible / acquire a mutex except for this callchain: spin_lock_bh(&sc->sc_pcu_lock); ath_complete_reset() -> ath9k_calculate_summary_state() -> ath9k_beacon_ensure_primary_slot() It's unclear how that can be distangled, so use tasklet_disable_in_atomic() for now. This allows tasklet_disable() to become sleepable once the remaining atomic users are cleaned up. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Kalle Valo <kvalo@codeaurora.org> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/20210309084242.313899703@linutronix.de
2021-03-17net: sundance: Use tasklet_disable_in_atomic().Sebastian Andrzej Siewior1-1/+1
tasklet_disable() is used in the timer callback. This might be distangled, but without access to the hardware that's a bit risky. Replace it with tasklet_disable_in_atomic() so tasklet_disable() can be changed to a sleep wait once all remaining atomic users are converted. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/20210309084242.209110861@linutronix.de
2021-03-17net: jme: Replace link-change tasklet with workSebastian Andrzej Siewior2-6/+6
The link change tasklet disables the tasklets for tx/rx processing while upating hw parameters and then enables the tasklets again. This update can also be pushed into a workqueue where it can be performed in preemptible context. This allows tasklet_disable() to become sleeping. Replace the linkch_task tasklet with a work. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/20210309084242.106288922@linutronix.de
2021-03-17net/mlx5: E-Switch, Protect changing mode while adding rulesRoi Dayan4-3/+122
We re-use the native NIC port net device instance for the Uplink representor, a driver currently cannot unbind TC setup callback actively, hence protect changing E-Switch mode while adding rules. Signed-off-by: Roi Dayan <roid@nvidia.com> Reviewed-by: Parav Pandit <parav@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-03-17net/mlx5: E-Switch, Change mode lock from mutex to rw semaphoreRoi Dayan3-20/+19
E-Switch mode change routine will take the write lock to prevent any consumer to access the E-Switch resources while E-Switch is going through a mode change. In the next patch E-Switch consumers (e.g vport representors) will take read_lock prior to accessing E-Switch resources to prevent E-Switch mode changing in the middle of the operation. Signed-off-by: Roi Dayan <roid@nvidia.com> Reviewed-by: Parav Pandit <parav@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-03-17net/mlx5e: Do not reload ethernet ports when changing eswitch modeRoi Dayan7-54/+115
When switching modes between legacy and switchdev and back, do not reload ethernet interfaces. just change the profile from nic profile to uplink rep profile in switchdev mode. Signed-off-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-03-17net/mlx5e: Unregister eth-reps devices firstRoi Dayan1-4/+4
When we clean all the interfaces, i.e. rescan or reload module, we need to clean eth-reps devices first, before eth devices. We will re-use the native NIC port net device instance for the Uplink representor. Changing eswitch mode will skip destroying the eth device so the net device won't be destroyed and only change the profile. Creating uplink eth-rep will initialize the representor related resources. In that sense when we destroy all devices we first need to destroy eth-rep devices so uplink eth-rep will clean all representor related resources and only then destroy the eth device which will destroy rest of the resources and the net device. Signed-off-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-03-17net/mlx5: Move devlink port from mlx5e priv to mlx5e resourcesRoi Dayan6-9/+28
We re-use the native NIC port net device instance for the Uplink representor, and the devlink port. When changing profiles we reset the mlx5e priv but we should still use the devlink port so move it to mlx5e resources. Signed-off-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-03-17net/mlx5: Move mlx5e hw resources into a sub objectRoi Dayan7-31/+34
This is to separate between resources attributes and other attributes we will want to use. Signed-off-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-03-17net/mlx5e: Register nic devlink port with switch idRoi Dayan2-1/+29
We will re-use the native NIC port net device instance for the Uplink representor. Since the netdev will be kept registered while we engage switchdev mode also the devlink will be kept registered. Register the nic devlink port with switch id so it will be available when changing profiles. Signed-off-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-03-17net/mlx5e: Move devlink port register and unregister callsRoi Dayan2-11/+21
We will re-use the native NIC port net device instance for the Uplink representor. As such we also don't want to unregister/register the devlink port as part of the profile. Signed-off-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-03-17net/mlx5e: Verify dev is present in some ndosRoi Dayan3-0/+26
We will re-use the native NIC port net device instance for the Uplink representor. While changing profiles private resources are not available but some ndos are not checking if the netdev is present. So for those ndos check the netdev is present in the driver before accessing the private resources. Signed-off-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-03-17net/mlx5e: Use nic mode netdev ndos and ethtool ops for uplink representorRoi Dayan1-129/+4
Remove dedicated uplink rep netdev ndos and ethtools ops. We will re-use the native NIC port net device instance and ethtool ops for the Uplink representor. Signed-off-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-03-17net/mlx5e: Add offload stats ndos to nic netdev opsRoi Dayan3-3/+37
We will re-use the native NIC port net device instance for the Uplink representor, hence same ndos must be used. Signed-off-by: Roi Dayan <roid@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-03-17net/mlx5e: Distinguish nic and esw offload in tc setup block cbRoi Dayan1-1/+6
We will re-use the native NIC port net device instance for the Uplink representor, hence same ndos will be used. Now we need to distinguish in the TC callback if the mode is legacy or switchdev and set the proper flag. Signed-off-by: Roi Dayan <roid@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-03-17net/mlx5e: Allow legacy vf ndos only if in legacy modeRoi Dayan3-9/+51
We will re-use the native NIC port net device instance for the Uplink representor. Several VF ndo ops are not relevant in switchdev mode. Disallow them when eswitch mode is not legacy as a preparation. Signed-off-by: Roi Dayan <roid@nvidia.com> Reviewed-by: Parav Pandit <parav@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-03-17net/mlx5e: Same max num channels for both nic and uplink profilesSaeed Mahameed1-1/+2
In downstream patches NIC netdev can change profile dynamically from NIC mode to uplink mode and vise-versa. It is required that both profiles must advertise the same max amount of tx/rx queues. Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com>
2021-03-17net: ocelot: Remove ocelot_xfh_get_cpuqHoratiu Vultur1-2/+1
Now when extracting frames from CPU the cpuq is not used anymore so remove it. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17net: ocelot: Extend MRPHoratiu Vultur2-81/+158
This patch extends MRP support for Ocelot. It allows to have multiple rings and when the node has the MRC role it forwards MRP Test frames in HW. For MRM there is no change. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17net: ocelot: Add PGID_BLACKHOLEHoratiu Vultur1-0/+3
Add a new PGID that is used not to forward frames anywhere. It is used by MRP to make sure that MRP Test frames will not reach CPU port. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17nfp: flower: fix pre_tun mask id allocationLouis Peens1-7/+17
pre_tun_rule flows does not follow the usual add-flow path, instead they are used to update the pre_tun table on the firmware. This means that if the mask-id gets allocated here the firmware will never see the "NFP_FL_META_FLAG_MANAGE_MASK" flag for the specific mask id, which triggers the allocation on the firmware side. This leads to the firmware mask being corrupted and causing all sorts of strange behaviour. Fixes: f12725d98cbe ("nfp: flower: offload pre-tunnel rules") Signed-off-by: Louis Peens <louis.peens@corigine.com> Signed-off-by: Simon Horman <simon.horman@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17nfp: flower: add ipv6 bit to pre_tunnel control messageLouis Peens1-2/+13
Differentiate between ipv4 and ipv6 flows when configuring the pre_tunnel table to prevent them trampling each other in the table. Fixes: 783461604f7e ("nfp: flower: update flow merge code to support IPv6 tunnels") Signed-off-by: Louis Peens <louis.peens@corigine.com> Signed-off-by: Simon Horman <simon.horman@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17nfp: flower: fix unsupported pre_tunnel flowsLouis Peens1-0/+18
There are some pre_tunnel flows combinations which are incorrectly being offloaded without proper support, fix these. - Matching on MPLS is not supported for pre_tun. - Match on IPv4/IPv6 layer must be present. - Destination MAC address must match pre_tun.dev MAC Fixes: 120ffd84a9ec ("nfp: flower: verify pre-tunnel rules") Signed-off-by: Louis Peens <louis.peens@corigine.com> Signed-off-by: Simon Horman <simon.horman@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17Merge branch '40GbE' of ↵David S. Miller3-12/+22
git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue Tony Nguyen says: ==================== 40GbE Intel Wired LAN Driver Updates 2021-03-16 This series contains updates to i40e, ixgbe, and ice drivers. Magnus Karlsson says: Optimize run_xdp_zc() for the XDP program verdict being XDP_REDIRECT in the xsk zero-copy path. This path is only used when having AF_XDP zero-copy on and in that case most packets will be directed to user space. This provides around 100k extra packets in throughput on my server when running l2fwd in xdpsock. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17mlxsw: spectrum_acl: Offload FLOW_ACTION_SAMPLEIdo Schimmel5-1/+175
Implement support for action sample when used with a flower classifier by implementing the required sampler_add() / sampler_del() callbacks and registering an Rx listener for the sampled packets. The sampler_add() callback returns an error for Spectrum-1 as the functionality is not supported. In Spectrum-{2,3} the callback creates a mirroring agent towards the CPU. The agent's identifier is used by the policy engine code to mirror towards the CPU with probability. The Rx listener for the sampled packet is registered with the 'policy engine' mirroring reason and passes trapped packets to the psample module after looking up their parameters (e.g., sampling group). Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17mlxsw: core_acl_flex_actions: Add mirror sampler actionIdo Schimmel2-0/+142
Add core functionality required to support mirror sampler action in the policy engine. The switch driver (e.g., 'mlxsw_spectrum') is required to implement the sampler_add() / sampler_del() callbacks that perform the necessary configuration before the sampler action can be installed. The next patch will implement it for Spectrum-{2,3}, while Spectrum-1 will return an error, given it is not supported. Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17mlxsw: spectrum_matchall: Add support for egress samplingIdo Schimmel2-12/+69
Allow user space to install a matchall classifier with sample action on egress. This is only supported on Spectrum-2 onwards, so Spectrum-1 will continue to return an error. Programming the hardware to sample on egress is identical to ingress sampling with the sole change of using a different sampling trigger. Upon receiving a sampled packet, the sampling trigger (ingress vs. egress) will be encoded in the mirroring reason in the Completion Queue Element (CQE). The mirroring reason is used to lookup the sampling parameters (e.g., psample group) which are passed to the psample module. Note that locally generated packets that are sampled are simply consumed. This is done for several reasons. First, such packets do not have an ingress netdev given that their Rx local port is the CPU port. This breaks several basic assumptions. Second, sampling using the same interface (tc), but with flower classifier will not result in locally generated packets being sampled given that such packets are not subject to the policy engine. Third, realistically, this is not a big deal given that the vast majority of the packets being transmitted through the port are not locally generated packets. Fourth, if such packets do need to be sampled, they can be sampled with a 'skip_hw' filter and reported to the same sampling group as the data path packets. The software sampling rate can also be adjusted to fit the rate of the locally generated packets which is much lower than the rate of the data path traffic. Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17mlxsw: spectrum: Start using sampling triggers hash tableIdo Schimmel3-42/+46
Start using the previously introduced sampling triggers hash table to store sampling parameters instead of storing them as attributes of the sampled port. This makes it easier to introduce new sampling triggers. Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17mlxsw: spectrum: Track sampling triggers in a hash tableIdo Schimmel2-0/+178
Currently, mlxsw supports a single sampling trigger type (i.e., received packet). When sampling is configured on an ingress port, the sampling parameters (e.g., pointer to the psample group) are stored as an attribute of the port, so that they could be passed to psample_sample_packet() when a sampled packet is trapped to the CPU. Subsequent patches are going to add more types of sampling triggers, making it difficult to maintain the current scheme. Instead, store all the active sampling triggers with their associated parameters in a hash table. That way, more trigger types can be easily added. The next patch will flip mlxsw to use the hash table instead of the current scheme. Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17mlxsw: spectrum_matchall: Pass matchall entry to sampling operationsIdo Schimmel2-14/+22
The entry will be required by the next patches, so pass it. No functional changes intended. Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17mlxsw: spectrum_matchall: Push sampling checks to per-ASIC operationsIdo Schimmel2-14/+22
Push some sampling checks to the per-ASIC operations, as they are no longer relevant for all ASICs. The sampling rate validation against the MPSC maximum rate is only relevant for Spectrum-1, as Spectrum-2 and later ASICs no longer use MPSC register for sampling. The ingress / egress validation is pushed down to the per-ASIC operations since subsequent patches are going to remove it for Spectrum-2 and later ASICs. Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-17mlxsw: spectrum_matchall: Propagate extack furtherIdo Schimmel3-22/+43
Due to the differences between Spectrum-1 and later ASICs, some of the checks currently performed at the common code (where extack is available) will need to be pushed to the per-ASIC operations. As a preparation, propagate extack further to maintain proper error reporting. Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-18 02:34:13 +0300