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path: root/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
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2019-05-02net: mvpp2: cls: Add Classification offload supportMaxime Chevallier1-1/+19
This commit introduces basic classification offloading support for the PPv2 controller. The PPv2 classifier has many classification engines, for now we only use the C2 TCAM match engine. This engine allows to perform ternary lookups on 64 bits keys (called Header Extracted Key), that are built by extracting fields from the packet header and concatenating them. At most 4 fields can be extracted for a single lookup. This basic implementation allows to build the HEK from the following fields : - L4 source and destination ports (for UDP and TCP) More fields are to be added in the future. Classification flows are added through the ethtool interface, using the newly introduced flow_rule infrastructure as an internal rule representation, allowing to more easily implement tc flower rules if need be. The internal design for now allocates one range of 4 rules per port due to the internal design of the flow table, which uses 22 sub-flows. When inserting a classification rule, the rule is created in every relevant sub-flow. This low rule-count is a very simple design which reaches quickly the limitations of the flow table ordering, but guarantees that the rule ordering will always be respected. This commit only introduces support for the "steer to rxq" action. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-27net: mvpp2: cls: Rename classifer per-port functionsMaxime Chevallier1-3/+3
This commit renames some of the classifier functions to follow the naming 'mvpp2_port_*' that's used for function that act on a given port. This commit is purely cosmetic. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-27net: mvpp2: Don't use an int to store netdev_features_tMaxime Chevallier1-1/+1
int is not long enough to store all netdev_features, use the correct dedicated type to store them when building the list of dev->features. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-02net: mvpp2: set the GMAC, XLG MAC, XPCS and MPCS in reset when a port is downAntoine Tenart1-0/+3
This patch adds calls in the stop() helper to ensure both MACs and both PCS blocks are set in reset when the user manually sets a port down. This is done so that we have the exact same block reset states at boot time and when a port is set down. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-02net: mvpp2: set the XPCS and MPCS in reset when not usedAntoine Tenart1-8/+58
This patch sets both the XPCS and MPCS blocks in reset when they aren't used. This is done both at boot time and when reconfiguring a port mode. The advantage now is that only the PCS used is set out of reset when the port is configured (10GKR uses the MCPS while RXAUI uses the XPCS). Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-02net: mvpp2: reset the MACs when reconfiguring a portAntoine Tenart1-0/+3
This patch makes sure both PPv2 MACs (GMAC + XLG MAC) are set in reset while a port is reconfigured. This is done so that we make sure a MAC is in a reset state when not used, as only one of the two will be set out of reset after the port is configured properly. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-02net: mvpp2: rework the XLG MAC reset handlingAntoine Tenart1-9/+18
This patch reworks the way the XLG MAC is set in reset: the XLG MAC is set in reset at probe time and taken out of this state only when used. The idea is to move forward a situation where only the blocks used are taken out of reset. This also has the effect to handle the GMAC and the XLG MAC in a similar way (the GMAC already is set in reset at boot time). Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-02net: mvpp2: force the XLG MAC link up or down when not using in-bandAntoine Tenart1-10/+25
This patch force the XLG MAC link state in the phylink link_up() and link_down() helpers when not using in-band auto-negotiation. This mimics what's already done for the GMAC and follows what's advised in the phylink documentation. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-02net: mvpp2: only update the XLG configuration when neededAntoine Tenart1-5/+8
This patch improves the XLG configuration function, to only update the XLG configuration register when a change is needed. This helps not writing over and over the same XLG configuration each time phylink request the MAC to be configured. This mimics the GMAC configuration function. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-02net: mvpp2: always disable both MACs when disabling a portAntoine Tenart1-4/+4
This patch modifies the port_disable() helper to always disable both the GMAC and the XLG MAC when called. At boot time we do not know of a port was enabled in the firmware/bootloader, and if so what mode was used (hence which of the two MACs was used). This also help in implementing a logic where all blocks are disabled when not used, and only enabled regarding the current mode used on a given port. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-02net: mvpp2: some AN fields require the link to be down when updatedAntoine Tenart1-1/+11
The GMAC configuration helper modifies values in the auto-negotiation register. Some of its values require the port to be forced down when modifying their values. This patches fixes the check made on the bit to be updated in this register, so that the port is forced down when needed. This fix cases where some of those parameters were updated, but not taken into account, such as when using RGMII interfaces. Fixes: d14e078f23cc ("net: marvell: mvpp2: only reprogram what is necessary on mac_config") Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-02net: mvpp2: fix the computation of the RXQsAntoine Tenart1-8/+15
The patch fixes the computation of RXQs being used by the PPv2 driver, which is set depending on the PPv2 engine version and the queue mode used. There are three cases: - PPv2.1: 1 RXQ per CPU. - PPV2.2 with MVPP2_QDIST_MULTI_MODE: 1 RXQ per CPU. - PPv2.2 with MVPP2_QDIST_SINGLE_MODE: 1 RXQ is shared between the CPUs. The PPv2 engine supports a maximum of 32 queues per port. This patch adds a check so that we do not overstep this maximum. It appeared the calculation was broken for PPv2.1 engines since f8c6ba8424b0, as PPv2.1 ports ended up with a single RXQ while they needed 4. This patch fixes it. Fixes: f8c6ba8424b0 ("net: mvpp2: use only one rx queue per port per CPU") Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-02net: mvpp2: fix validate for PPv2.1Antoine Tenart1-1/+1
The Phylink validate function is the Marvell PPv2 driver makes a check on the GoP id. This is valid an has to be done when using PPv2.2 engines but makes no sense when using PPv2.1. The check done when using an RGMII interface makes sure the GoP id is not 0, but this breaks PPv2.1. Fixes it. Fixes: 0fb628f0f250 ("net: mvpp2: fix phylink handling of invalid PHY modes") Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-02net: mvpp2: reconfiguring the port interface is PPv2.2 specificAntoine Tenart1-8/+6
This patch adds a check on the PPv2 version in-use not to reconfigure the port mode when an interface is updated when using PPv2.1 as the functions called are PPv2.2 specific. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-02net: mvpp2: a port can be disabled even if we use the link IRQAntoine Tenart1-7/+0
We had a check in the mvpp2_mac_link_down() function (called by phylink) to avoid disabling the port when link interrupts are used. It turned out the interrupt can still be used with the port disabled. We can thus remove this check. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-25net: mvpp2: Add 2.5GBaseT supportMaxime Chevallier1-0/+1
The PPv2 controller is able to support 2.5G speeds, allowing to use 2.5GBASET in conjunction with PHYs that use 2500BASEX as their MII interface when using this mode. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-12net: marvell: mvpp2: use mvpp2_is_xlg() helper elsewhereRussell King1-9/+6
There are several places which make the decision whether to access the XLGMAC vs GMAC that only check for PHY_INTERFACE_MODE_10GKR and not its XAUI variant. Switch these to use the new helper so that we have consistency through the driver. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-12net: marvell: mvpp2: add mvpp2_is_xlg() helperRussell King1-11/+9
Add a mvpp2_is_xlg() helper to identify whether the interface mode should be using the XLGMAC rather than the GMAC. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-09net: marvell: mvpp2: clear flow control modes in 10G modeRussell King1-0/+5
When mvpp2 configures the flow control modes in mvpp2_xlg_config() for 10G mode, it only ever set the flow control enable bits. There is no mechanism to clear these bits, which means that userspace is unable to use standard APIs to disable flow control (the only way is to poke the register directly.) Fix the missing bit clearance to allow flow control to be disabled. This means that, by default, as there is no negotiation in 10G modes with mvpp2, flow control is now disabled rather than being rx-only. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-09net: marvell: mvpp2: fix AN restartRussell King1-10/+5
phylink already limits which interface modes are able to call the MACs AN restart function, but in any case, the commentry seems incorrect: the AN restart bit does not automatically clear when set. This has been found via manual setting using devmem2, and we can observe that the AN does indeed restart and complete, yet the AN restart bit remains set. Explicitly clear the AN restart bit. Tested-by: Sven Auhagen <sven.auhagen@voleatech.de> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-09net: marvell: mvpp2: only reprogram what is necessary on mac_configRussell King1-23/+35
mac_config() can be called at any point, and the expected behaviour from MAC drivers is to only reprogram when necessary - and certainly avoid taking the link down on every call. Unfortunately, mvpp2 does exactly that - it takes the link down, and reprograms everything, and then releases the forced-link down. This is bad, it can cause the link to bounce: - SFP detects signal, disables LOS indication. - SFP code calls into phylink, calling phylink_sfp_link_up() which triggers a resolve. - phylink_resolve() calls phylink_get_mac_state() and finds the MAC reporting link up. - phylink wants to configure the pause mode on the MAC, so calls phylink_mac_config() - mvpp2 takes the link down temporarily, generating a MAC link down event followed by another MAC link event. - phylink calls mac_link_up() and then processes the MAC link down event. - phylink_resolve() gets called again, registers the link down, and calls mach_link_down() before re-running itself. - phylink_resolve() starts again at step 3 above. This sequence repeats. GMAC versions prior to mvpp2 do not require the link to be taken down except when certain link properties (eg, switching between SGMII and 1000base-X mode, or enabling/disabling in-band negotiation) are changed. Implement this for mvpp2. Tested-by: Sven Auhagen <sven.auhagen@voleatech.de> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-09net: marvell: mvpp2: fix stuck in-band SGMII negotiationRussell King1-6/+11
It appears that the mvpp22 can get stuck with SGMII negotiation. The symptoms are that in-band negotiation never completes and the partner (eg, PHY) never reports SGMII link up, or if it supports negotiation bypass, goes into negotiation bypass mode (which will happen when the PHY sees that the MAC is alive but gets no response.) Triggering the PHY end of the link to re-negotiate results in the bypass bit clearing on the PHY, and then re-setting - indicating that the problem is at the mvpp22 GMAC end. Asserting the GMAC reset and de-asserting it resolves the issue. Arrange to assert the GMAC reset at probe time, and deassert it only after we have configured the GMAC for the appropriate mode. This resolves the issue. Tested-by: Sven Auhagen <sven.auhagen@voleatech.de> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-09net: marvell: mvpp2: phylink compliance updatesRussell King1-36/+61
Sven Auhagen reported issues with negotiation on a couple of his platforms using a mixture of SFP and PHYs in various different modes. Debugging to root cause proved difficult, but essentially the problem comes down to the mvpp2 phylink implementation being slightly at odds with what is expected. phylink operates in three modes: phy, fixed-link, and in-band mode. In the first two modes, the expected behaviour from a MAC driver is that phylink resolves the operating mode and passes the mode to the MAC driver for it to program, including when the link should be brought up or taken down. This is basically the same as the libphy approach. This does not negate the requirement to advertise a correct control word for interface modes that have control words where that can be reasonably controlled. The second mode is in-band mode, where the MAC is expected to use the in-band control word to determine the operating mode. The mvneta driver implements the correct pattern required to support this: configure the port interface type separately from the in-band mode(s). This is now specified in the phylink documentation patches. mvpp2 was programming in-band mode for SGMII and the 802.3z modes no what, and avoided forcing the link up in fixed/phy modes. This caused a problem with some boards where the PHY is by default programmed to enter AN bypass mode, the PHY would report that the link was up, but the mvpp2 never completed the exchange of control word. Another issue that mvpp2 has is it sets SGMII AN format control word for both SGMII and 802.3z modes. The format of the control word is defined by MVPP2_GMAC_INBAND_AN_MASK, which should be set for SGMII and clear for 802.3z. Available Marvell documentation for earlier GMAC implementations does not make this clear, but this has been ascertained via extensive testing on earlier GMAC implementations, and then confirmed with a Macchiatobin Single Shot connected to a Clearfog: when MVPP2_GMAC_INBAND_AN_MASK is set, the clearfog does not receive the advertised pause mode settings. Lastly, there is no flow control in the in-band control word in Cisco SGMII, setting the flow control autonegotiation bit even with a PHY that has the Marvell extension to send this information does not result in the flow control being enabled at the MAC. We need to do this manually using the information provided via phylink. Re-code mvpp2's mac_config() and mac_link_up() to follow this pattern. This allows Sven Auhagen's board and Macchiatobin to reliably bring the link up with the 88e1512 PHY with phylink operating in PHY mode with COMPHY built as a module but the rest of the networking built-in, and u-boot having brought up the interface. in-band mode requires an additional patch to resolve another problem. Tested-by: Sven Auhagen <sven.auhagen@voleatech.de> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-05net: marvell: mvpp2: fix lack of link interruptsRussell King1-7/+14
Sven Auhagen reports that if he changes a SFP+ module for a SFP module on the Macchiatobin Single Shot, the link does not come back up. For Sven, it is as easy as: - Insert a SFP+ module connected, and use ping6 to verify link is up. - Remove SFP+ module - Insert SFP 1000base-X module use ping6 to verify link is up: Link up event did not trigger and the link is down but that doesn't show the problem for me. Locally, this has been reproduced by: - Boot with no modules. - Insert SFP+ module, confirm link is up. - Replace module with 25000base-X module. Confirm link is up. - Set remote end down, link is reported as dropped at both ends. - Set remote end up, link is reported up at remote end, but not local end due to lack of link interrupt. Fix this by setting up both GMAC and XLG interrupts for port 0, but only unmasking the appropriate interrupt according to the current mode set in the mac_config() method. However, only do the mask/unmask dance when we are really changing the link mode to avoid missing any link interrupts. Tested-by: Sven Auhagen <sven.auhagen@voleatech.de> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-05net: marvell: mvpp2: use phy_interface_mode_is_8023z() helperRussell King1-23/+15
Use the phy_interface_mode_is_8023z() helper for detecting interface modes that use 802.3z serial encoding. This is equivalent to testing for both 1000base-X and 2500base-X. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-01-08cross-tree: phase out dma_zalloc_coherent()Luis Chamberlain1-3/+3
We already need to zero out memory for dma_alloc_coherent(), as such using dma_zalloc_coherent() is superflous. Phase it out. This change was generated with the following Coccinelle SmPL patch: @ replace_dma_zalloc_coherent @ expression dev, size, data, handle, flags; @@ -dma_zalloc_coherent(dev, size, handle, flags) +dma_alloc_coherent(dev, size, handle, flags) Suggested-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Luis Chamberlain <mcgrof@kernel.org> [hch: re-ran the script on the latest tree] Signed-off-by: Christoph Hellwig <hch@lst.de>
2019-01-03Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds1-0/+2
Pull networking fixes from David Miller: "Several fixes here. Basically split down the line between newly introduced regressions and long existing problems: 1) Double free in tipc_enable_bearer(), from Cong Wang. 2) Many fixes to nf_conncount, from Florian Westphal. 3) op->get_regs_len() can throw an error, check it, from Yunsheng Lin. 4) Need to use GFP_ATOMIC in *_add_hash_mac_address() of fsl/fman driver, from Scott Wood. 5) Inifnite loop in fib_empty_table(), from Yue Haibing. 6) Use after free in ax25_fillin_cb(), from Cong Wang. 7) Fix socket locking in nr_find_socket(), also from Cong Wang. 8) Fix WoL wakeup enable in r8169, from Heiner Kallweit. 9) On 32-bit sock->sk_stamp is not thread-safe, from Deepa Dinamani. 10) Fix ptr_ring wrap during queue swap, from Cong Wang. 11) Missing shutdown callback in hinic driver, from Xue Chaojing. 12) Need to return NULL on error from ip6_neigh_lookup(), from Stefano Brivio. 13) BPF out of bounds speculation fixes from Daniel Borkmann" * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (57 commits) ipv6: Consider sk_bound_dev_if when binding a socket to an address ipv6: Fix dump of specific table with strict checking bpf: add various test cases to selftests bpf: prevent out of bounds speculation on pointer arithmetic bpf: fix check_map_access smin_value test when pointer contains offset bpf: restrict unknown scalars of mixed signed bounds for unprivileged bpf: restrict stack pointer arithmetic for unprivileged bpf: restrict map value pointer arithmetic for unprivileged bpf: enable access to ax register also from verifier rewrite bpf: move tmp variable into ax register in interpreter bpf: move {prev_,}insn_idx into verifier env isdn: fix kernel-infoleak in capi_unlocked_ioctl ipv6: route: Fix return value of ip6_neigh_lookup() on neigh_create() error net/hamradio/6pack: use mod_timer() to rearm timers net-next/hinic:add shutdown callback net: hns3: call hns3_nic_net_open() while doing HNAE3_UP_CLIENT ip: validate header length on virtual device xmit tap: call skb_probe_transport_header after setting skb->dev ptr_ring: wrap back ->producer in __ptr_ring_swap_queue() net: rds: remove unnecessary NULL check ...
2018-12-28net: marvell: fix a missing check of acpi_match_deviceKangjie Lu1-0/+2
When acpi_match_device fails, its return value is NULL. Directly using the return value without a check may result in a NULL-pointer dereference. The fix checks if acpi_match_device fails, and if so, returns -EINVAL. Signed-off-by: Kangjie Lu <kjlu@umn.edu> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-21Merge USB 4.20-rc8 mergepoint into usb-nextGreg Kroah-Hartman1-7/+9
We need the USB changes in here for additional patches to be able to apply cleanly. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-12-20net: mvpp2: fix the phylink mode validationAntoine Tenart1-1/+1
The mvpp2_phylink_validate() sets all modes that are supported by a given PPv2 port. An mistake made the 10000baseT_Full mode being advertised in some cases when a port wasn't configured to perform at 10G. This patch fixes this. Fixes: d97c9f4ab000 ("net: mvpp2: 1000baseX support") Reported-by: Russell King <linux@armlinux.org.uk> Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-19net: mvpp2: 10G modes aren't supported on all portsAntoine Tenart1-6/+8
The mvpp2_phylink_validate() function sets all modes that are supported by a given PPv2 port. A recent change made all ports to advertise they support 10G modes in certain cases. This is not true, as only the port #0 can do so. This patch fixes it. Fixes: 01b3fd5ac97c ("net: mvpp2: fix detection of 10G SFP modules") Cc: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-12Merge tag 'phy-for-4.21_v1' of ↵Greg Kroah-Hartman1-17/+2
git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next Kishon writes: phy: for 4.21 *) Change phy set_mode ops to take both mode and setmode as arguments *) Add phy_configure() and phy_validate() API's mostly used for MIPI D-PHY *) Add helpers to get default values of parameters define in MIPI D-PHY spec *) Add driver for TI's CPSW Port PHY Interface Mode selection *) Add driver for Cadence Sierra PHY used with USB and PCIe *) Add driver for Freescale i.MX8MQ USB3 PHY *) Fixes QMP PHY bindings to allow the clocks provided by the PHY to be pointed at in device tree *) Fix for using fully specified regions (in device tree) for configuring the second lane in dual lane PHYs in QMP PHY *) Add support for Allwinner H6 USB2 PHY in phy-sun4i-usb driver *) Update phy-rcar-gen3-usb driver to follow the hardware manual *) Add support for fine grained power management in mapphone-mdm6600 driver Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> * tag 'phy-for-4.21_v1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (30 commits) phy: qcom-qmp: Expose provided clocks to DT dt-bindings: phy-qcom-qmp: Move #clock-cells to child phy: qcom-qmp: Utilize fully-specified DT registers dt-bindings: phy-qcom-qmp: Fix register underspecification phy: ti: fix semicolon.cocci warnings phy: dphy: Add configuration helpers phy: Add MIPI D-PHY configuration options phy: Add configuration interface phy: Add MIPI D-PHY mode phy: add driver for Freescale i.MX8MQ USB3 PHY dt-bindings: phy: add binding for Freescale i.MX8MQ USB3 PHY phy: Use of_node_name_eq for node name comparisons net: ethernet: ti: cpsw: add support for port interface mode selection phy dt-bindings: net: ti: cpsw: switch to use phy-gmii-sel phy phy: ti: introduce phy-gmii-sel driver dt-bindings: phy: add cpsw port interface mode selection phy bindings phy: mvebu-cp110-comphy: fix spelling in structure name phy: mapphone-mdm6600: Improve phy related runtime PM calls phy: renesas: rcar-gen3-usb2: follow the hardware manual procedure phy: cadence: Add driver for Sierra PHY ...
2018-12-12phy: mvebu-cp110-comphy: convert to use eth phy mode and submodeGrygorii Strashko1-17/+2
Convert mvebu-cp110-comphy PHY driver to use recently introduced PHY_MODE_ETHERNET and phy_set_mode_ext(). Cc: Russell King - ARM Linux <linux@armlinux.org.uk> Cc: Maxime Chevallier <maxime.chevallier@bootlin.com> Cc: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-05net: mvpp2: fix phylink handling of invalid PHY modesBaruch Siach1-1/+32
The .validate phylink callback should empty the supported bitmap when the interface mode is invalid. Cc: Maxime Chevallier <maxime.chevallier@bootlin.com> Cc: Antoine Tenart <antoine.tenart@bootlin.com> Reported-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-05net: mvpp2: fix detection of 10G SFP modulesBaruch Siach1-0/+1
The mvpp2_phylink_validate() relies on the interface field of phylink_link_state to determine valid link modes. However, when called from phylink_sfp_module_insert() this field in not initialized. The default switch case then excludes 10G link modes. This allows 10G SFP modules that are detected correctly to be configured at max rate of 2.5G. Catch the uninitialized PHY mode case, and allow 10G rates. Fixes: d97c9f4ab000b ("net: mvpp2: 1000baseX support") Cc: Maxime Chevallier <maxime.chevallier@bootlin.com> Cc: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-10-30net: mvpp2: Fix affinity hint allocationMarc Zyngier1-4/+14
The mvpp2 driver has the curious behaviour of passing a stack variable to irq_set_affinity_hint(), which results in the kernel exploding the first time anyone accesses this information. News flash: userspace does, and irqbalance will happily take the machine down. Great stuff. An easy fix is to track the mask within the queue_vector structure, and to make sure it has the same lifetime as the interrupt itself. Fixes: e531f76757eb ("net: mvpp2: handle cases where more CPUs are available than s/w threads") Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-10-07Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller1-4/+5
2018-10-06net: mvpp2: Extract the correct ethtype from the skb for tx csum offloadMaxime Chevallier1-4/+5
When offloading the L3 and L4 csum computation on TX, we need to extract the l3_proto from the ethtype, independently of the presence of a vlan tag. The actual driver uses skb->protocol as-is, resulting in packets with the wrong L4 checksum being sent when there's a vlan tag in the packet header and checksum offloading is enabled. This commit makes use of vlan_protocol_get() to get the correct ethtype regardless the presence of a vlan tag. Fixes: 3f518509dedc ("ethernet: Add new driver for Marvell Armada 375 network unit") Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-09-25Merge ra.kernel.org:/pub/scm/linux/kernel/git/davem/netDavid S. Miller1-4/+6
Version bump conflict in batman-adv, take what's in net-next. iavf conflict, adjustment of netdev_ops in net-next conflicting with poll controller method removal in net. Signed-off-by: David S. Miller <davem@davemloft.net>
2018-09-24net: mvpp2: use round-robin scheduling for TX queues on the same CPUMaxime Chevallier1-0/+3
This commit allows each TXQ to be picked in a round-robin fashion by the PPv2 transmit scheduling mechanism. This is opposed to the default behaviour that prioritizes the highest numbered queues. Suggested-by: Yan Markman <ymarkman@marvell.com> Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-09-24net: mvpp2: support XPS by mapping TX queues to CPUsMaxime Chevallier1-1/+5
Since the PPv2 controller has multiple TX queues, we can spread traffic by assining TX queues to CPUs, allowing to use XPS to balance egress traffic between CPUs. Suggested-by : Yan Markman <ymarkman@marvell.com> Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-09-20net: marvell: fix return type of ndo_start_xmit functionYueHaibing1-1/+1
The method ndo_start_xmit() is defined as returning an 'netdev_tx_t', which is a typedef for an enum type, so make sure the implementation in this driver has returns 'netdev_tx_t' value, and change the function return type to netdev_tx_t. Found by coccinelle. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-09-20net: mvpp2: do not explicitly set the carrier state in openAntoine Tenart1-1/+0
This patch removes the explicit call to netif_carrier_off() in PPv2's open() path, as this is now handled in phylink_start(). Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-09-20net: mvpp2: rename mvpp2_percpu function to mvpp2_threadAntoine Tenart1-47/+47
As the mvpp2_percpu_read/write/... functions aren't really per-cpu but per s/w thread, rename them to include 'thread' instead of 'percpu'. This is a cosmetic patch. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-09-20net: mvpp2: handle cases where more CPUs are available than s/w threadsAntoine Tenart1-51/+101
The Marvell PPv2 network controller has 9 internal threads. The driver works fine when there are less CPUs available than threads. This isn't true if more CPUs are available. As this is a valid use case, handle this particular case. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-09-20net: mvpp2: map the CPUs to threadsAntoine Tenart1-39/+51
This patch maps all uses of the CPU to threads. All this_cpu calls are replaced, and all smp_processor_id() calls are wrapped into the indirection. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-09-20net: mvpp2: do not use the CPU number to access the per-thread registersAntoine Tenart1-81/+88
This patch reworks the Marvell PPv2 driver to stop using directly the CPU number to access per-thread registers. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-09-20net: mvpp2: make mvpp2_read_relaxed staticAntoine Tenart1-1/+1
In the Marvell PPv2 driver the mvpp2_read_relaxed function is only used in a single file. Make it static and remove its prototype from the header. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-09-20net: mvpp2: make the per-cpu helpers staticAntoine Tenart1-3/+3
The Marvell PPv2 driver has per-cpu functions. As they only are used in the main file, make them static and remove their prototype from the header. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-09-20net: mvpp2: cpu should always be unsignedAntoine Tenart1-25/+29
Updates the PPv2 driver so that all CPU variables are unsigned, as it makes no sense to have a negative CPU number. This patch is cosmetic. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>