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path: root/drivers/mtd/spi-nor
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2021-12-29mtd: spi-nor: Remove debugfs entries that duplicate sysfs entriesTudor Ambarus1-12/+0
SPI NOR sysfs defines partname and jedec_id device attributes, which duplicate the information from debugfs. Since the sysfs directory structure and the attributes in each directory define an ABI between the kernel and user space, thus it can never be removed, remove the debugfs entries so that we don't duplicate the information. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211217122636.474976-2-tudor.ambarus@microchip.com
2021-12-23mtd: spi-nor: micron-st: write 2 bytes when disabling Octal DTR modePratyush Yadav1-5/+17
The Octal DTR configuration is stored in the CFR0V register. This register is 1 byte wide. But 1 byte long transactions are not allowed in 8D-8D-8D mode. The next byte address contains the CFR1V register, which contains the number of dummy cycles. This is very fortunate since the enable path changes the value of this register. Reset the value to its default when disabling Octal DTR mode. This way, both changes to the flash state made when enabling can be reverted in one single transaction. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20210531181757.19458-4-p.yadav@ti.com
2021-12-23mtd: spi-nor: spansion: write 2 bytes when disabling Octal DTR modePratyush Yadav1-5/+13
The Octal DTR configuration is stored in the CFR5V register. This register is 1 byte wide. But 1 byte long transactions are not allowed in 8D-8D-8D mode. Since the next byte address does not contain any register, it is safe to write any value to it. Write a 0 to it. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20210531181757.19458-3-p.yadav@ti.com
2021-12-23mtd: spi-nor: core: use 2 data bytes for template opsPratyush Yadav1-2/+2
The template ops used in spi_nor_spimem_check_pp() and spi_nor_spimem_check_readop() currently set the data phase to 1 byte long. This is problematic for 8D-8D-8D protocol where odd length data phase is invalid since one cycle transfers 2 bytes and odd number of bytes would mean half a cycle is left over. This could result in a controller rejecting the op as "not supported" even though it actually supports the protocol. Change the data length to 2 bytes in these templates. One might argue that this should only be done for 8D-8D-8D operations but when talking about these templates, there is no functional difference between one and two bytes, even in STR modes. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20210531181757.19458-2-p.yadav@ti.com
2021-12-23mtd: spi-nor: Constify part specific fixup hooksTudor Ambarus6-7/+7
Constify 'struct spi_nor_fixups' in order to respect flash_info structure declaration. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211106102915.153552-1-tudor.ambarus@microchip.com
2021-12-23mtd: spi-nor: core: Remove reference to spi-nor.cFlavio Suligoi1-2/+2
Remove the references to the old spi-nor.c file. The old drivers/mtd/spi-nor/spi-nor.c file is not more present and now some of its code is contained in: drivers/mtd/spi-nor/core.c Signed-off-by: Flavio Suligoi <f.suligoi@asem.it> [tudor.ambarus@microchip.com: - remove change in Documentation/driver-api/mtd/spi-nor.rst. The documentation has to be rewritten entirely. - update commit message] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20210126092516.1431913-1-f.suligoi@asem.it
2021-12-07mtd: spi-nor: issi: is25lp256: Init flash based on SFDPTudor Ambarus1-1/+1
Get rid of the static initialization of the flash parameters and init them when parsing SFDP. Generated a 256 Kbyte random data and did an erase, write, read back and compare test. The flash uses for reads SPINOR_OP_READ_1_4_4_4B 0xec, for erases SPINOR_OP_BE_4K_4B 0x21, and for writes SPINOR_OP_PP_4B 0x12. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20211207140254.87681-15-tudor.ambarus@microchip.com
2021-12-07mtd: spi-nor: gigadevice: gd25q256: Init flash based on SFDPTudor Ambarus1-1/+1
Get rid of the static initialization of the flash parameters and init them when parsing SFDP. Generated a 256 Kbyte random data and did an erase, write, read back and compare test. The flash uses for reads SPINOR_OP_READ_1_4_4_4B 0xec, for erases SPINOR_OP_BE_4K_4B 0x21, and for writes SPINOR_OP_PP_1_1_4_4B 0x34. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20211207140254.87681-14-tudor.ambarus@microchip.com
2021-12-07mtd: spi-nor: spansion: s25fl256s0: Skip SFDP parsingTudor Ambarus1-1/+2
s25fl256s0 does not define the SFDP tables nor implements the RDSFDP 0x5a command. Skip the SFDP parsing in order to avoid issuing an unsupported command to the flash. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20211207140254.87681-13-tudor.ambarus@microchip.com
2021-12-07mtd: spi-nor: winbond: w25q256jvm: Init flash based on SFDPTudor Ambarus1-2/+1
Get rid of the static initialization of the flash parameters and init them when parsing SFDP. Generated a 256 Kbyte random data and did an erase, write, read back and compare test. The flash uses for reads SPINOR_OP_READ_1_4_4 0xeb, for erases SPINOR_OP_BE_4K 0x20, and for writes SPINOR_OP_PP 0x02. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20211207140254.87681-12-tudor.ambarus@microchip.com
2021-12-07mtd: spi-nor: core: Move spi_nor_set_addr_width() in spi_nor_setup()Tudor Ambarus1-50/+52
spi_nor_setup() configures the SPI NOR memory. Setting the addr width is too a configuration, hence we can move the spi_nor_set_addr_width() in spi_nor_setup(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20211207140254.87681-11-tudor.ambarus@microchip.com
2021-12-07mtd: spi-nor: core: Init all flash parameters based on SFDP where possibleTudor Ambarus1-78/+119
New flash additions that support SFDP should be declared with PARSE_SFDP and with all the other flags that are not SFDP discoverable. Keep the old way of initializing the flash, until all the flashes are converted to use either PARSE_SFDP or SPI_NOR_SKIP_SFDP. Flashes that declare PARSE_SFDP do not have a roll-back mechanism because if spi_nor_parse_sfdp() returns an error it means that either BFPT is not supported, thus SFDP is not supported and the user didn't correctly declared the flash_info entry, or some memalloc failed. Either way we should return an error. The rest of the SFDP tables are optional, if one of the optional SFDP tables fails, we just continue. We would like to get rid of the default_init() hook, so the spi_nor_manufacturer_init_params() is not called in the new sequnce of flash initialization. Split spi_nor_info_init_params() in spi_nor_init_default_params() and spi_nor_no_sfdp_init_params(). spi_nor_init_default_params() is called for all the flashes regardless if they support SFDP or not. spi_nor_no_sfdp_init_params() is called just for the flashes that do not define SFDP and initializes parameters and setting solely based on flash_info data. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211207140254.87681-10-tudor.ambarus@microchip.com
2021-12-07mtd: spi-nor: Introduce spi_nor_init_fixup_flags()Tudor Ambarus1-8/+20
Group NOR flags initialization. Introduce a dedicated function for setting the fixup_flags and emphasise when those flash_info flags should be set: when the SNOR_F_4B_OPCODES/SNOR_F_IO_MODE_EN_VOLATILE setttings can not be discovered by SFDP for this particular flash because the SFDP table that indicates this support is not defined in the flash. In case the table for his support is defined but has wrong values, one should instead use a post_sfdp() hook to set the SNOR_F equivalent flag. No functional change intended in this patch. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211207140254.87681-9-tudor.ambarus@microchip.com
2021-12-07mtd: spi-nor: Introduce spi_nor_init_flags()Tudor Ambarus1-38/+51
Used to initialize the NOR flags for settings that are not defined in the JESD216 SFDP standard, thus can not be retrieved when parsing SFDP. This moves the setting of SNOR_F_READY_XSR_RDY and SNOR_F_HAS_LOCK late in the init call, without any functional change expected. The rest of the flags were already set after the spi_nor_init_params(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211207140254.87681-8-tudor.ambarus@microchip.com
2021-12-07mtd: spi-nor: Rework the flash_info flagsTudor Ambarus17-566/+695
Clarify for what the flash_info flags are used for. Split them in four categories and a bool: 1/ FLAGS: flags that indicate support that is not defined by the JESD216 standard in its SFDP tables. 2/ NO_SFDP_FLAGS: these flags are used when the flash does not define the SFDP tables. These flags indicate support that can be discovered via SFDP. Used together with SPI_NOR_SKIP_SFDP flag. 3/ FIXUP_FLAGS: flags that indicate support that can be discovered via SFDP ideally, but can not be discovered for this particular flash because the SFDP table that indicates this support is not defined by the flash. In case the table for this support is defined but has wrong values, one should instead use a post_sfdp() hook to set the SNOR_F equivalent flag. 4/ MFR_FLAGS: manufacturer private flags. Used in the manufacturer fixup hooks to differentiate support between flashes of the same manufacturer. 5/ PARSE_SFDP: sets info->parse_sfdp to true. All flash_info entries that support SFDP should be converted to set info->parse_sfdp to true. SPI NOR flashes that statically declare one of the SPI_NOR_{DUAL, QUAD, OCTAL, OCTAL_DTR}_READ flags and do not support the RDSFDP command are gratuiously receiving the RDSFDP command in the attempt of parsing the SFDP tables. It is not desirable to issue commands that are not supported, so introduce PARSE_SFDP to help on this situation. New flash additions/updates should be declared/updated to use either PARSE_SFDP or SPI_NOR_SKIP_SFDP. Once all the flash_info entries are converted to use SPI_NOR_SKIP_SFDP or PARSE_SFDP, we can get rid of the SPI_NOR_SKIP_SFDP flag and use just the bool nor->info->parse_sfdp to determine whether to parse SFDP or not. SPI_NOR_SKIP_SFDP flag is kept just as a way to differentiate whether a flash is converted to the new flags logic or not. Support that can be discovered when parsing SFDP should not be duplicated by explicit flags at flash declaration. All the flash parameters will be discovered when parsing SFDP. Sometimes manufacturers wrongly define some fields in the SFDP tables. If that's the case, SFDP data can be amended with the fixups() hooks. It is not common, but if the SFDP tables are entirely wrong, and it does not worth the hassle to tweak the SFDP parameters by using the fixups hooks, or if the flash does not define the SFDP tables at all, then statically init the flash with the SPI_NOR_SKIP_SFDP flag and specify the rest of flash capabilities with the flash info flags. With time, we want to convert all flashes to use PARSE_SFDP and stop triggering the SFDP parsing with the SPI_NOR_{DUAL, QUAD, OCTAL*}_READ flags. Getting rid of the SPI_NOR_{OCTAL, OCTAL_DTR}_READ trigger is easily achievable, the rest are a long term goal. Manufacturer specific flags like USE_CLSR, USE_FSR, SPI_NOR_XSR_RDY, will be removed in a future series. No functional changes intended in this patch. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211207140254.87681-7-tudor.ambarus@microchip.com
2021-12-07mtd: spi-nor: core: Introduce flash_info mfr_flagsTudor Ambarus2-11/+40
Used in the manufacturer fixup hooks to differentiate support between flashes of the same manufacturer. Not used in the SPI NOR core. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211207140254.87681-6-tudor.ambarus@microchip.com
2021-12-07mtd: spi-nor: core: Call spi_nor_post_sfdp_fixups() only when SFDP is definedTudor Ambarus2-29/+24
spi_nor_post_sfdp_fixups() was called even when there were no SFDP tables defined. late_init() should be instead used for flashes that do not define SFDP tables. Use spi_nor_post_sfdp_fixups() just to fix SFDP data. post_sfdp() hook is as of now used just by s28hs512t, mt35xu512aba, and both support SFDP, there's no functional change with this patch. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211207140254.87681-5-tudor.ambarus@microchip.com
2021-12-07mtd: spi-nor: Introduce spi_nor_set_mtd_info()Tudor Ambarus4-29/+35
Used to init all the mtd_info fields. Move the mtd_info init the last thing in the spi_nor_scan(), so that we avoid superfluous initialization of the mtd_info fields in case of errors. While here use common naming scheme for functions that are setting mtd_info fields: s/spi_nor_register_locking_ops/spi_nor_set_mtd_locking_ops s/spi_nor_otp_init/spi_nor_set_mtd_otp_ops The functions names are self explanatory, get rid of the comment for the OTP function. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211207140254.87681-4-tudor.ambarus@microchip.com
2021-12-07mtd: spi-nor: core: Don't use mtd_info in the NOR's probe sequence of callsTudor Ambarus2-5/+4
Use NOR parameters in the probe's sequence of calls, thus nor->params->size instead of nor->mtd.size and let the mtd_info fields be used by the mtd calls (mtd->_erase, mtd->_read, mtd->_write). mtd_info fields should not be used during probe because we haven't registered mtd yet. It's safe to drop xilinx's setting of nor->mtd.size, now that we use nor->params->size in spi_nor_set_addr_width(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211207140254.87681-3-tudor.ambarus@microchip.com
2021-12-07mtd: spi-nor: Fix mtd size for s3an flashesTudor Ambarus1-1/+2
As it was before the blamed commit, s3an_nor_scan() was called after mtd size was set with params->size, and it overwrote the mtd size value with '8 * nor->page_size * nor->info->n_sectors' when XSR_PAGESIZE was set. With the introduction of s3an_post_sfdp_fixups(), we missed to update the mtd size for the s3an flashes. Fix the mtd size by updating both nor->params->size, (which will update the mtd_info size later on) and nor->mtd.size (which is used in spi_nor_set_addr_width()). Fixes: 641edddb4f43 ("mtd: spi-nor: Add s3an_post_sfdp_fixups()") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211207140254.87681-2-tudor.ambarus@microchip.com
2021-11-17mtd: spi-nor: spansion: Use manufacturer late_init()Tudor Ambarus1-2/+2
spansion_post_sfdp_fixups() was called regardless if the flash defined SFDP tables or not. A better place for this kind of parameters init is in manufacturer's late_init() hook. post_sfdp() should be called only when SFDP is defined. No functional change in this patch. Instead of doing the 4b opcodes settings at manufacturer level, thus also for every flash that will be introduced, this should be done just where it is needed, per flash. I'll let this for other patch. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211029172633.886453-12-tudor.ambarus@microchip.com
2021-11-17mtd: spi-nor: sst: Use manufacturer late_init() to set _write()Tudor Ambarus1-2/+2
Setting the correct nor->mtd._write in a fixup hook was misleading, since this is not a fixup, just a specific setting for SST, that differs from the SPI NOR core default init. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211029172633.886453-11-tudor.ambarus@microchip.com
2021-11-17mtd: spi-nor: xilinx: Use manufacturer late_init() to set setup methodTudor Ambarus1-2/+2
post_sfdp was misleading in this case, as SFDP is not supported by xilinx. Plus, there's no fixup here, just setting the correct setup method, as required by xilinx parts. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211029172633.886453-10-tudor.ambarus@microchip.com
2021-11-17mtd: spi-nor: winbond: Use manufacturer late_init() for OTP opsTudor Ambarus1-0/+5
OTP is not described in the JESD216 SFDP standard, place the OTP ops init in late_init(). We can't get rid of the default_init() hook for winbond, as the 4byte_addr_mode is SFDP specific and will require to have all flashes at hand, in order to check which has the SFDP tables defined, in which case there's nothing to do if the SFDP tables are corect, and which of the flashes do not define the SFDP tables in which case each flash should declare a late_init() fixup. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211029172633.886453-9-tudor.ambarus@microchip.com
2021-11-17mtd: spi-nor: sst: Use flash late_init() for lockingTudor Ambarus1-2/+2
Locking is not described in JESD216 SFDP standard, place the locking init in late_init(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211029172633.886453-8-tudor.ambarus@microchip.com
2021-11-17mtd: spi-nor: atmel: Use flash late_init() for lockingTudor Ambarus1-4/+4
Locking is not described in JESD216 SFDP standard, place the locking init in late_init(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211029172633.886453-7-tudor.ambarus@microchip.com
2021-11-17mtd: spi-nor: core: Introduce the late_init() hookTudor Ambarus2-4/+17
Flash parameters init is done in a spaghetti way right now. There is the init based on the flash_info data, then there is the default_init() hook, then SFDP init, an intermediary post_bft(), then post_sfdp() and a spi_nor_late_init_params(). Each method can overwrite previuosly initialized parameters. We want to separate what is SFDP and non-SFDP specific. late_init() will replace the default_init() hook and will be used only to initialize flash parameters that are not declared in the JESD216 SFDP standard, or where SFDP tables are not defined at all. We cut a member in the chain of initializing parameters by getting rid of the default_init() hook, and we make it clear that everything that is in late_init() is not covered by the SFDP tables defined by the flash. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211029172633.886453-6-tudor.ambarus@microchip.com
2021-11-17mtd: spi-nor: Get rid of nor->page_sizeTudor Ambarus2-17/+19
nor->page_size duplicated what nor->params->page_size indicates for no good reason. page_size is a flash parameter of fixed value and it is better suited to be found in nor->params->page_size. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20211029172633.886453-5-tudor.ambarus@microchip.com
2021-11-17mtd: spi-nor: core: Use container_of to get the pointer to struct spi_norTudor Ambarus2-3/+2
"struct mtd_info mtd" is member of "struct spi_nor", there's no need to use "mtd->priv". Get the pointer to the containing struct spi_nor by using container_of. While here, make the function inline and get rid of the __maybe_unused. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20211029172633.886453-3-tudor.ambarus@microchip.com
2021-11-17mtd: spi-nor: core: Fix spi_nor_flash_parameter otp descriptionTudor Ambarus1-2/+1
Update the description of the otp member of the struct spi_nor_flash_parameter. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20211029172633.886453-2-tudor.ambarus@microchip.com
2021-10-15mtd: spi-nor: nxp-spifi: Make use of the helper function ↵Cai Huoqing1-5/+2
devm_platform_ioremap_resource_byname() Use the devm_platform_ioremap_resource_byname() helper instead of calling platform_get_resource_byname() and devm_ioremap_resource() separately Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20210901074307.9733-1-caihuoqing@baidu.com
2021-10-15mtd: spi-nor: hisi-sfc: Make use of the helper function ↵Cai Huoqing1-5/+2
devm_platform_ioremap_resource_byname() Use the devm_platform_ioremap_resource_byname() helper instead of calling platform_get_resource_byname() and devm_ioremap_resource() separately Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20210901074259.9683-1-caihuoqing@baidu.com
2021-10-15mtd: spi-nor: hisi-sfc: Remove excessive clk_disable_unprepare()Evgeny Novikov1-1/+0
hisi_spi_nor_probe() invokes clk_disable_unprepare() on all paths after successful call of clk_prepare_enable(). Besides, the clock is enabled by hispi_spi_nor_prep() and disabled by hispi_spi_nor_unprep(). So at remove time it is not possible to have the clock enabled. The patch removes excessive clk_disable_unprepare() from hisi_spi_nor_remove(). Found by Linux Driver Verification project (linuxtesting.org). Fixes: e523f11141bd ("mtd: spi-nor: add hisilicon spi-nor flash controller driver") Signed-off-by: Evgeny Novikov <novikov@ispras.ru> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20210709144529.31379-1-novikov@ispras.ru
2021-10-15mtd: spi-nor: Enable locking for n25q128a13Jonathan Lemon1-1/+3
As 4bit block protection patchset for some micron models are merged, n25q128a13 also uses 4 bit Block Protection scheme, so enable locking for it. Tested it on n25q128a13, the locking functions work well. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20210628211729.3625017-1-jonathan.lemon@gmail.com
2021-06-21mtd: spi-nor: remove redundant continue statementColin Ian King1-3/+1
The continue statement at the end of a for-loop has no effect, invert the if expression and remove the continue. Addresses-Coverity: ("Continue has no effect") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Michael Walle <michael@walle.cc> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
2021-06-15mtd: spi-nor: add initial sysfs supportMichael Walle4-1/+97
Add support to show the manufacturer, the partname and JEDEC identifier as well as to dump the SFDP table. Not all flashes list their SFDP table contents in their datasheet. So having that is useful. It might also be helpful in bug reports from users. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Pratyush Yadav <p.yadav@ti.com>
2021-06-15mtd: spi-nor: sfdp: save a copy of the SFDP dataMichael Walle2-0/+68
Due to possible mode switching to 8D-8D-8D, it might not be possible to read the SFDP after the initial probe. To be able to dump the SFDP via sysfs afterwards, make a complete copy of it. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Tested-by: Heiko Thiery <heiko.thiery@gmail.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
2021-06-09mtd: spi-nor: otp: implement erase for Winbond and similar flashesMichael Walle4-1/+92
Winbond flashes with OTP support provide a command to erase the OTP data. This might come in handy during development. This was tested with a Winbond W25Q32JW on a LS1028A SoC with the NXP FSPI controller. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-06-09mtd: spi-nor: otp: return -EROFS if region is read-onlyMichael Walle1-3/+38
SPI NOR flashes will just ignore program commands if the OTP region is locked. Thus, a user might not notice that the intended write didn't end up in the flash. Return -EROFS to the user in this case. From what I can tell, chips/cfi_cmdset_0001.c also return this error code. One could optimize spi_nor_mtd_otp_range_is_locked() to read the status register only once and not for every OTP region, but for that we would need some more invasive changes. Given that this is one-time-programmable memory and the normal access mode is reading, we just live with the small overhead. By moving the code around a bit, we can just check the length before calling spi_nor_mtd_otp_range_is_locked() and avoid an underflow there if a len is 0. This way we don't need to take the lock either. We also skip the "*retlen = 0" assignment, mtdcore already takes care of that for us. Fixes: 069089acf88b ("mtd: spi-nor: add OTP support") Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-06-09mtd: spi-nor: otp: use more consistent wordingMichael Walle1-8/+19
Use the wording as used in the datasheet to describe the access methods of the security registers (aka OTP storage). This will also match the function names. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-06-09mtd: spi-nor: otp: fix access to security registers in 4 byte modeMichael Walle1-2/+0
The security registers either take a 3 byte or a 4 byte address offset, depending on the address mode of the flash. Thus just leave the nor->addr_width as is. Fixes: cad3193fe9d1 ("mtd: spi-nor: implement OTP support for Winbond and similar flashes") Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Pratyush Yadav <p.yadav@ti.com>
2021-05-27mtd: spi-nor: enable locking support for MX25L12805DDavid Bauer1-1/+2
Macronix MX25L12805D supports locking with 4 block protection bits in its status register. Add the corresponding flag in order to clear these bits when unloking the flash. Otherwise, the flash might not be writable depending on the state left by the bootloader. Tested-on: Ubiquiti UniFi AC Lite (ath79) Signed-off-by: David Bauer <mail@david-bauer.net> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Michael Walle <michael@walle.cc>
2021-05-27mtd: spi-nor: macronix: Fix name for mx66l51235fTudor Ambarus1-1/+1
According to macronix website, there is no mx66l51235l part number. The chip detected as such is actually mx66l51235f. Rename the flash. Do not update the mx66l51235l name from the spi_nor_dev_ids[], since there are dt that are using this compatible. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-05-27mtd: spi-nor: intel-spi: Add support for Intel Alder Lake-M SPI serial flashMika Westerberg1-0/+1
Intel Alder Lake-M has the same SPI serial flash controller as Alder Lake-S. Add Alder Lake-M PCI ID to the driver list of supported devices. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-05-26mtd: spi-nor: otp: fix kerneldoc typosMichael Walle1-2/+2
Use the correct argument names in the kerneldoc. Fixes: cad3193fe9d1 ("mtd: spi-nor: implement OTP support for Winbond and similar flashes") Reported-by: Pratyush Yadav <p.yadav@ti.com> Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
2021-05-26mtd: spi-nor: Add documentation for spi_nor_soft_reset()Pratyush Yadav1-0/+15
Document what the function does and that it should only be used when it is known that the device supports it. This will avoid unaware programmers thinking that they can arbitrarily use it to reset the device. Suggested-by: Michael Walle <michael@walle.cc> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Michael Walle <michael@walle.cc>
2021-05-26mtd: spi-nor: nxp-spifi: Use SPI_MODE_X_MASKAndy Shevchenko1-1/+1
Use SPI_MODE_X_MASK instead of open coded variant. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Michael Walle <michael@walle.cc>
2021-04-16mtd: core: Constify buf in mtd_write_user_prot_reg()Tudor Ambarus2-6/+9
The write buffer comes from user and should be const. Constify write buffer in mtd core and across all _write_user_prot_reg() users. cfi_cmdset_{0001, 0002} and onenand_base will pay the cost of an explicit cast to discard the const qualifier since the beginning, since they are using an otp_op_t function prototype that is used for both reads and writes. mtd_dataflash and SPI NOR will benefit of the const buffer because they are using different paths for writes and reads. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210403060931.7119-1-tudor.ambarus@microchip.com
2021-04-11Revert "mtd: spi-nor: macronix: Add support for mx25l51245g"Tudor Ambarus1-3/+0
This reverts commit 04b8edad262eec0d153005973dfbdd83423c0dcb. mx25l51245g and mx66l51235l have the same flash ID. The flash detection returns the first entry in the flash_info array that matches the flash ID that was read, thus for the 0xc2201a ID, mx25l51245g was always hit, introducing a regression for mx66l51235l. If one wants to differentiate the flash names, a better fix would be to differentiate between the two at run-time, depending on SFDP, and choose the correct name from a list of flash names, depending on the SFDP differentiator. Fixes: 04b8edad262e ("mtd: spi-nor: macronix: Add support for mx25l51245g") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Pratyush Yadav <p.yadav@ti.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20210402082031.19055-2-tudor.ambarus@microchip.com
2021-04-11mtd: spi-nor: core: Fix an issue of releasing resources during read/writeXiang Chen1-0/+33
If rmmod the driver during read or write, the driver will release the resources which are used during read or write, so it is possible to refer to NULL pointer. Use the testcase "mtd_debug read /dev/mtd0 0xc00000 0x400000 dest_file & sleep 0.5;rmmod spi_hisi_sfc_v3xx.ko", the issue can be reproduced in hisi_sfc_v3xx driver. To avoid the issue, fill the interface _get_device and _put_device of mtd_info to grab the reference to the spi controller driver module, so the request of rmmod the driver is rejected before read/write is finished. Fixes: b199489d37b2 ("mtd: spi-nor: add the framework for SPI NOR") Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Tested-by: Michael Walle <michael@walle.cc> Tested-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/1617262486-4223-1-git-send-email-yangyicong@hisilicon.com