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2012-12-03mtd cs553x_nand: Initialise ecc.strength before nand_scan()Nathan Williams1-2/+1
Loading cs553x_nand with Hynix H27U1G8F2BTR NAND flash causes this bug: kernel BUG at drivers/mtd/nand/nand_base.c:3345! invalid opcode: 0000 [#1] Modules linked in: cs553x_nand(+) vfat fat usb_storage ehci_hcd usbcore usb_comr Pid: 436, comm: modprobe Not tainted 3.6.7 #1 EIP: 0060:[<c118d205>] EFLAGS: 00010296 CPU: 0 EIP is at nand_scan_tail+0x64c/0x69c EAX: 00000034 EBX: cea6ed98 ECX: 00000000 EDX: 00000000 ESI: cea6ec00 EDI: cea6ec00 EBP: 20000000 ESP: cdd17e48 DS: 007b ES: 007b FS: 0000 GS: 0000 SS: 0068 CR0: 8005003b CR2: 0804e119 CR3: 0d850000 CR4: 00000090 DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000 DR6: ffff0ff0 DR7: 00000400 Process modprobe (pid: 436, ti=cdd16000 task=cdd1c320 task.ti=cdd16000) Stack: c12e962c c118f7ef 00000003 cea6ed98 d014b25c 20000000 fffff007 00000001 00000000 cdd53b00 d014b000 c1001021 cdd53b00 d01493c0 cdd53b00 cdd53b00 d01493c0 c1047f83 d014b4a0 00000000 cdd17f9c ce4be454 cdd17f48 cdd1c320 Call Trace: [<c118f7ef>] ? nand_scan+0x1b/0x4d [<d014b25c>] ? init_module+0x25c/0x2de [cs553x_nand] [<d014b000>] ? 0xd014afff [<c1001021>] ? do_one_initcall+0x21/0x111 [<c1047f83>] ? sys_init_module+0xe4/0x1261 [<c1031207>] ? task_work_run+0x36/0x43 [<c1265ced>] ? syscall_call+0x7/0xb Code: fa ff ff c7 86 d8 00 00 00 01 00 00 00 e9 5f fc ff ff 68 f8 26 2e c1 e8 a7 EIP: [<c118d205>] nand_scan_tail+0x64c/0x69c SS:ESP 0068:cdd17e48 Initialising ecc.strength before the call to nand_scan() fixes this. Signed-off-by: Nathan Williams <nathan@traverse.com.au> Cc: stable@vger.kernel.org [3.4+] Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Mike Dunn <mikedunn@newsguy.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-12-01Merge tag 'tags/omap-for-v3.8/cleanup-multiplatform-no-clock-signed' of ↵Olof Johansson1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/pm2 From Tony Lindgren: Remaining patches to allow omap2+ to build with multiplatform enabled. Unfortunately the DMA header patch had to be redone to avoid adding new multiplatform specific include paths, the other patches are just trivial compile fixes. Note that this does not yet contain the necessary Kconfig changes as we are still waiting for some drivers to get fixed up first. * tag 'tags/omap-for-v3.8/cleanup-multiplatform-no-clock-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP: Move plat-omap/dma-omap.h to include/linux/omap-dma.h ASoC: OMAP: mcbsp fixes for enabling ARM multiplatform support watchdog: OMAP: fixup for ARM multiplatform support Conflicts due to surrounding changes in: arch/arm/mach-omap2/omap_hwmod_2420_data.c arch/arm/mach-omap2/omap_hwmod_2430_data.c Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-30ARM: OMAP: Move plat-omap/dma-omap.h to include/linux/omap-dma.hTony Lindgren1-1/+0
Based on earlier discussions[1] we attempted to find a suitable location for the omap DMA header in commit 2b6c4e73 (ARM: OMAP: DMA: Move plat/dma.h to plat-omap/dma-omap.h) until the conversion to dmaengine is complete. Unfortunately that was before I was able to try to test compile of the ARM multiplatform builds for omap2+, and the end result was not very good. So I'm creating yet another all over the place patch to cut the last dependency for building omap2+ for ARM multiplatform. After this, we have finally removed the driver dependencies to the arch/arm code, except for few drivers that are being worked on. The other option was to make the <plat-omap/dma-omap.h> path to work, but we'd have to add some new header directory to for multiplatform builds. Or we would have to manually include arch/arm/plat-omap/include again from arch/arm/Makefile for omap2+. Neither of these alternatives sound appealing as they will likely lead addition of various other headers exposed to the drivers, which we want to avoid for the multiplatform kernels. Since we already have a minimal include/linux/omap-dma.h, let's just use that instead and add a note to it to not use the custom omap DMA functions any longer where possible. Note that converting omap DMA to dmaengine depends on dmaengine supporting automatically incrementing the FIFO address at the device end, and converting all the remaining legacy drivers. So it's going to be few more merge windows. [1] https://patchwork.kernel.org/patch/1519591/# cc: Russell King <linux@arm.linux.org.uk> cc: Kevin Hilman <khilman@ti.com> cc: "Benoît Cousson" <b-cousson@ti.com> cc: Herbert Xu <herbert@gondor.apana.org.au> cc: "David S. Miller" <davem@davemloft.net> cc: Vinod Koul <vinod.koul@intel.com> cc: Dan Williams <djbw@fb.com> cc: Mauro Carvalho Chehab <mchehab@infradead.org> cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> cc: David Woodhouse <dwmw2@infradead.org> cc: Kyungmin Park <kyungmin.park@samsung.com> cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> cc: Tomi Valkeinen <tomi.valkeinen@ti.com> cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> cc: Hans Verkuil <hans.verkuil@cisco.com> cc: Vaibhav Hiremath <hvaibhav@ti.com> cc: Lokesh Vutla <lokeshvutla@ti.com> cc: Rusty Russell <rusty@rustcorp.com.au> cc: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> cc: Afzal Mohammed <afzal@ti.com> cc: linux-crypto@vger.kernel.org cc: linux-media@vger.kernel.org cc: linux-mtd@lists.infradead.org cc: linux-usb@vger.kernel.org cc: linux-fbdev@vger.kernel.org Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-11-30Merge branch 'pm-qos'Rafael J. Wysocki1-1/+3
* pm-qos: PM / QoS: Handle device PM QoS flags while removing constraints PM / QoS: Resume device before exposing/hiding PM QoS flags PM / QoS: Document request manipulation requirement for flags PM / QoS: Fix a free error in the dev_pm_qos_constraints_destroy() PM / QoS: Fix the return value of dev_pm_qos_update_request() PM / ACPI: Take device PM QoS flags into account PM / Domains: Check device PM QoS flags in pm_genpd_poweroff() PM / QoS: Make it possible to expose PM QoS device flags to user space PM / QoS: Introduce PM QoS device flags support PM / QoS: Prepare struct dev_pm_qos_request for more request types PM / QoS: Introduce request and constraint data types for PM QoS flags PM / QoS: Prepare device structure for adding more constraint types
2012-11-26Merge tag 'v3.7-rc7' into next/cleanupOlof Johansson1-4/+6
Merging in mainline back to next/cleanup since it has collected a few conflicts between fixes going upstream and some of the cleanup patches. Git doesn't auto-resolve some of them, and they're mostly noise so let's take care of it locally. Conflicts are in: arch/arm/mach-omap2/omap_hwmod_44xx_data.c arch/arm/plat-omap/i2c.c drivers/video/omap2/dss/dss.c Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-22mtd: fix a number of checkpatch complaintsArtem Bityutskiy1-2/+6
While checking the "__devinit" removal patches with checkpatch.pl, I noticed several warnings related to a space between the function name and '(', as well as long lines. I fixed the warnings up in this patch. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-22mtd: remove use of __devexitBill Pemberton22-22/+22
CONFIG_HOTPLUG is going away as an option so __devexit is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-22mtd: remove use of __devinitdataBill Pemberton1-1/+1
CONFIG_HOTPLUG is going away as an option so __devinitdata is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-22mtd: remove use of __devinitBill Pemberton26-46/+46
CONFIG_HOTPLUG is going away as an option so __devinit is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-22mtd: remove use of __devexit_pBill Pemberton18-18/+18
CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-22mtd: bcm47xxnflash: enable BCM4706 driverRafał Miłecki3-3/+5
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-22mtd: bcm47xxnflash: implement readingRafał Miłecki2-0/+107
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-22mtd: bcm47xxnflash: support for NAND_CMD_READID commandRafał Miłecki2-0/+106
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-22mtd: bcm47xxnflash: init NAND on BCM4706Rafał Miłecki2-0/+110
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-22mtd: prepare place for BCMA NAND flash driver(s)Rafał Miłecki5-0/+135
BCMA bus can contain NAND flash memory, it's registered in system as platform device. This adds required hooks and place for controler specific drivers. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-21Merge branch 'clps711x/soc2' into next/socOlof Johansson4-428/+0
From Alexander Shiyan: The main direction of this patchset - approaching the platform to the possibility of using configurations with multiple platforms in a single kernel. Added support of the majority of the necessary kernel symbol. Also part of the driver code used only for the platform was moved to the board code and converted to the use of standard drivers. * clps711x/soc2: MAINTAINERS: Add ARM CLPS711X entry ARM: clps711x: Update defconfig due latest changes and new kernel symbols ARM: clps711x: Rename board files to match functionality ARM: clps711x: edb7211: Add support for NOR-Flash ARM: clps711x: Moving backlight controls of framebuffer driver to the board ARM: clps711x: p720t: Special driver for handling NAND memory is removed ARM: clps711x: Moving power management of framebuffer driver to the board ARM: clps711x: autcpu12: Special driver for handling NAND memory is removed ARM: clps711x: Unused empty "ACK" calls for IRQ-chips removed ARM: clps711x: Add FIQ interrupt handling ARM: clps711x: Implement usage "MULTI_IRQ_HANDLER" kernel option for a platform ARM: clps711x: Implement usage "SPARSE_IRQ" kernel option for a platform ARM: clps711x: cdb89712: Special driver for handling memory is removed ARM: clps711x: Always select AUTO_ZRELADDR for a platform ARM: clps711x: p720t: Unneeded inclusion of head-sa1100.S removed ARM: clps711x: Transform clps711x-framebuffer to platform driver and use it ARM: clps711x: p720t: Using "leds-gpio" driver for LED control ARM: clps711x: Using platform_driver for ethernet device
2012-11-21ARM: clps711x: p720t: Special driver for handling NAND memory is removedAlexander Shiyan3-183/+0
This patch provide migration to using "gpio-nand" driver instead of using special driver for handling NAND memory. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-21ARM: clps711x: autcpu12: Special driver for handling NAND memory is removedAlexander Shiyan3-245/+0
This patch provide migration to using "gpio-nand" and "basic-mmio-gpio" drivers instead of using special driver for handling NAND memory. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-19Fix misspellings of "whether" in comments.Adam Buchbinder1-1/+1
"Whether" is misspelled in various comments across the tree; this fixes them. No code changes. Signed-off-by: Adam Buchbinder <adam.buchbinder@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2012-11-18mtd: Fix typo mtd/testsMasanari Iida1-1/+1
Correct spelling typo in printk within drivers/mtd/tests. Signed-off-by: Masanari Iida <standby24x7@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-18mtd: de-select the chip when it is not usedHuang Shijie1-4/+6
When we scan several nand chips with nand_scan(), such as ....................... nand_scan(*, 2); ....................... In nand_scan_ident(), the maxchips will become 2, so the current code will select chip 1 to read the device ID. But the chip 0 is still selected in this case. To make the logic clear, we'd better de-select the chip when it is not used. This patch de-select the nand chip if it is not used any more. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-18mtd: s3c2410: Fix potential NULL pointer dereference errorSachin Kamat1-2/+5
'set' is tested for NULL. But subsequently accessed without the check. Thus making it conditional to avoid NULL pointer dereferencing. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-16mtd: fsl_ifc_nand: wait tWB time, poll R/B before command executionPrabhakar Kushwaha1-2/+2
IFC_FIR_OP_CMD0 issues command for execution without checking flash readiness. It may cause problem if flash is not ready. Instead use IFC_FIR_OP_CW0 which Wait for tWB time and poll R/B to return high or time-out, before issuing command. NAND_CMD_READID command implemention does not fulfill above requirement. So update its programming. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Hemant Nautiyal <hemant.nautiyal@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-16mtd: diskonchip: don't warn about ARM architectureArnd Bergmann1-2/+0
Enabling the diskonchip drivers on most architectures results in a pointless warning "#warning Unknown architecture for DiskOnChip. No default probe locations defined". The driver can in fact handle the default location already through the CONFIG_MTD_DOCPROBE_ADDRESS, which gets set on the platforms that need it, and we get a run-time error if this is not set correctly. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: nand_wait: warn if the nand is busy on exitMatthieu CASTET1-0/+2
This patch allow to detect buggy driver/hardware with bad RnB (dev_ready) management or when timeout occurs in polling mode. This works when dev_ready is set or not set. There are 2 methods to wait for an erase/program command completion: 1. Wait until nand RnB pin goes high (that's what chip->dev_ready usually does) 2. Poll the device: send a status (0x70) command and read status byte in a loop until bit NAND_STATUS_READY is set In all cases, you should send a status command after completion, to check if the operation was successful. And if the operation completed, the status should have bit NAND_STATUS_READY set. Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: davinci: add support for parition binding nodesMurali Karicheri1-3/+10
Enhance the driver to support partition subnodes inside the nand device bindings to describe partions on the nand device. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15Merge branch 'omap/headers4' into next/cleanupArnd Bergmann1-22/+107
2012-11-15mtd: sh_flctl: Add device tree supportBastian Hecht1-7/+87
The flctl can now be probed via device tree setup in addition to the existing platform data way. SoC specific setup data is set in the .data member of the OF match, so kept within the driver itself, while board/user specific setup - like partitioning - is taken from the device tree. Actual configuration is added for the SoC sh7372. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: sh_flctl: Add DMA capabiltyBastian Hecht1-2/+171
The code probes if DMA channels can get allocated and tears them down at removal/failure if needed. If available it uses them to transfer the data part (not ECC). On failure we fall back to PIO mode. Based on Guennadi Liakhovetski's code from the sh_mmcif driver. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Reviewed-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: sh_flctl: Minor cleanupsBastian Hecht1-21/+16
Some small fixes to avoid sparse and smatch complain. Other cosmetic fixes as well. - Change of the type of the member index in struct sh_flctl from signed to unsigned. We use index by addressing array members, so unsigned is more concise here. Adapt functions relying on sh_flctl::index. - Remove a blurring cast in write_fiforeg(). - Apply consistent naming scheme when refering to the data buffer. - Shorten some unnecessarily verbose functions. - Remove spaces at start of lines. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: gpmi: remove unneccessary headerHuang Shijie3-3/+6
The whole gpmi-nand driver has turned to pure devicetree supported. So the linux/mtd/gpmi-nand.h is not neccessary now. Just remove it, and move some macros to the gpmi-nand driver itself. Signed-off-by: Huang Shijie <shijie8@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: gpio-nand: Ability to use driver for configurations without RDY-pinAlexander Shiyan1-7/+15
In some configurations of "gpio-nand" RDY-pin may be not connected. This patch allow to use driver for these configurations. In this case we are assume that device always ready. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: use the NAND_STATUS_FAIL to replace the hardcodeHuang Shijie1-2/+2
Use the NAND_STATUS_FAIL to replace the hardcode "0x01", which make the code more readable. Signed-off-by: Huang Shijie <shijie8@gmail.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: fsmc_nand: use relaxed variants of io accessorsVipin Kumar1-25/+29
Use relaxed variants of readl/writel accessors. readl/writel io accessors use explicit dsb instruction which causes stalls in the processor core resulting several cycles of delay for each access Use relaxed variants where ever possible. This also results in an improved read/write performance. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: fsmc_nand: modify the wait to uninterruptibleVipin Kumar1-1/+1
Interruptible wait caused trouble in fsmc hardware state machine if the application was killed abruptly. To make fsmc operation safe turn wait in to un-interruptible. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: fsmc_nand: change the type for regs to void __iomem *Vipin Kumar1-1/+1
Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: fsmc_nand: pass the ale and cmd resource via resourceJean-Christophe PLAGNIOL-VILLARD1-33/+11
Do not use the platform_data to pass resource and be smart in the drivers. Just pass it via resource Switch to devm_request_and_ioremap at the sametime Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-By: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: delete nomadik_nand driverLinus Walleij3-242/+0
The nomadik_nand driver is really just a subset of the FSMC NAND driver, and there are no users anymore so let's delete it. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: denali: add a DT driverDinh Nguyen4-1/+177
Add a device tree version of the Denali NAND driver. Based on an original patch from Jamie Iles to add a MMIO version of this driver. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: denali: split the generic driver and PCI layerDinh Nguyen5-134/+188
The Denali controller can also be found in SoC devices attached to a simple bus. Move the PCI specific parts into denali_pci so that we can add a denali_dt that uses the same driver but for a device tree driver instead of a PCI based device. Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: fsl_elbc_nand: remove unnecessary badblock_patternBrian Norris1-15/+0
Since the introduction of nand_create_default_bbt_descr() (now known as nand_create_badblock_pattern()) in commit 58373ff0afff4cc8ac40608872995f4d87eb72ec nand_chip.badblock_pattern will be dynamically calculated to the same 1-byte-length pattern that is required by fsl_elbc_nand. This custom badblock_pattern is no longer needed, then, and its removal may help facilitate further nand_bbt.c/nand_base.c cleanup in the future (one down, many to go?) Anyway, with nand_bbt.c fixed, this effectively reverts: commit 452db2724351ff3d9416a183a7955e00ab4e6ab4 [MTD] [NAND] fsl_elbc_nand: fix OOB workability for large page NAND chips Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: gpmi-nand: make debug prints more clearVikram Narayanan1-6/+8
Make the error messages more debugging friendly Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Acked-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: nand: fix Samsung SLC detection regressionBrian Norris1-0/+1
This patch fixes errors seen in identifying old Samsung SLC, due to the following commits: commit e2d3a35ee427aaba99b6c68a56609ce276c51270 mtd: nand: detect Samsung K9GBG08U0A, K9GAG08U0F ID commit e3b88bd604283ef83ae6e8f53622d5b1ffe9d43a mtd: nand: add generic READ ID length calculation functions Some Samsung NAND with "5-byte" ID really appear to have 6-byte IDs, with wraparound like: Samsung K9K8G08U0D ec d3 51 95 58 ec ec d3 Samsung K9F1G08U0C ec f1 00 95 40 ec ec f1 Samsung K9F2G08U0B ec da 10 95 44 00 ec da This bad wraparound makes it hard to reliably detect the difference between Samsung SLC with 5-byte ID and Samsung SLC with 6-byte ID. The fix is to, for now, only use the new Samsung table for MLC. We cannot support the new SLC (K9FAG08U0M) until Samsung gives better ID decode information. Note that this applies in addition to the previous regression fix: commit bc86cf7af2ebda88056538e8edff852ee627f76a mtd: nand: fix Samsung SLC NAND identification regression Together, these patches completely restore the previous detection behavior so that we cannot see any more regressions in Samsung SLC NAND (finger crossed). With luck, I can get a hold of a Samsung representative and stop having to cross my fingers eventually. Reported-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: nand: fix Samsung SLC NAND identification regressionBrian Norris1-4/+5
A combination of the following two commits caused a regression in 3.7-rc1 when identifying some Samsung NAND, so that some previously working NAND were no longer detected properly: commit e3b88bd604283ef83ae6e8f53622d5b1ffe9d43a mtd: nand: add generic READ ID length calculation functions commit e2d3a35ee427aaba99b6c68a56609ce276c51270 mtd: nand: detect Samsung K9GBG08U0A, K9GAG08U0F ID Particularly, a regression was seen on Samsung K9F2G08U0B, with the following full 8-byte READ ID string: ec da 10 95 44 00 ec da The basic problem is that Samsung manufactures both SLC and MLC NAND that use a non-standard decoding table for deriving information from their IDs. I have heuristically determined that all the chips that use the new table have ID strings which wrap around after the 6th byte. Unfortunately, I overlooked the fact that some older Samsung SLC (which use a different decoding table) have "5 byte ID strings" which also wrap around after the 6th byte. This patch re-introduces a distinction between these old and new Samsung NAND by checking that the 6th byte is non-zero, allowing both old and new Samsung NAND to be detected properly. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Brian Norris <computersforpeace@gmail.com> Reported-by: Marek Vasut <marex@denx.de> Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-05ARM: plat-nomadik: move MTU, kill plat-nomadikLinus Walleij1-1/+1
This moves the MTU timer driver from arch/arm/plat-nomadik to drivers/clocksource and moves the header file to the platform_data directory. As this moves the last file being compiled to an object out of arch/arm/plat-nomadik, we have to "turn off the light" and delete the plat-nomadik directory, because it is not allowed to have an empty Makefile in a plat-* directory. This is probably also a desired side effect of depopulating the arch/arm directory of drivers. Luckily we have just deleted all the <plat/*> include files prior to this so by moving the last one we may delete the directory. After this all the Ux500 and Nomadik device drivers live outside of the arch/arm hierarchy. Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-23PM / QoS: Introduce PM QoS device flags supportRafael J. Wysocki1-1/+3
Modify the device PM QoS core code to support PM QoS flags requests. First, add a new field of type struct pm_qos_flags called "flags" to struct dev_pm_qos for representing the list of PM QoS flags requests for the given device. Accordingly, add a new "type" field to struct dev_pm_qos_request (along with an enum for representing request types) and a new member called "flr" to its data union for representig flags requests. Second, modify dev_pm_qos_add_request(), dev_pm_qos_update_request(), the internal routine apply_constraint() used by them and their existing callers to cover flags requests as well as latency requests. In particular, dev_pm_qos_add_request() gets a new argument called "type" for specifying the type of a request to be added. Finally, introduce two routines, __dev_pm_qos_flags() and dev_pm_qos_flags(), allowing their callers to check which PM QoS flags have been requested for the given device (the caller is supposed to pass the mask of flags to check as the routine's second argument and examine its return value for the result). Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: mark gross <markgross@thegnar.org>
2012-10-17Merge branch 'omap-for-v3.8/cleanup-headers-gpmc' into ↵Tony Lindgren1-21/+104
omap-for-v3.8/cleanup-headers Conflicts: arch/arm/mach-omap2/board-3430sdp.c arch/arm/mach-omap2/board-h4.c arch/arm/mach-omap2/board-rx51-peripherals.c arch/arm/mach-omap2/board-rx51.c arch/arm/mach-omap2/pm34xx.c drivers/mtd/nand/omap2.c drivers/mtd/onenand/omap2.c
2012-10-16ARM: OMAP: DMA: Move plat/dma.h to plat-omap/dma-omap.hLokesh Vutla1-1/+1
Move plat/dma.h to plat-omap/dma-omap.h as part of single zImage work Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-10-16ARM: OMAP2+: DMA: Moving OMAP2+ DMA channel definitions to mach-omap2Lokesh Vutla1-0/+2
Similar to omap1, some of the omap2+ dma channel definitions are used by some drivers. For moving omap2+ dma channel definitions to mach-omap2/, the used ones should be defined locally to driver. Drivers can eliminate it using DT, platform data, or IORESOURCE_DMA And moving omap2+ DMA channel definitions to mach-omap2 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-10-15mtd: nand: omap: handle gpmc bch[48]Afzal Mohammed1-11/+89
gpmc-nand bch registers are now available in driver, make use of it to handle bch[48] instead of relying on gpmc exported functions. And so nand driver no longer needs gpmc header, remove it. Signed-off-by: Afzal Mohammed <afzal@ti.com>
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