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2018-03-21mmc: sdhci-acpi: Fix IRQ 0Adrian Hunter1-1/+1
Zero is a valid IRQ number and is being used on some CHT tablets. Stop treating it as an error. Reported-by: Luke Ross <luke@lukeross.name> Fixes: 1b7ba57ecc86 ("mmc: sdhci-acpi: Handle return value of platform_get_irq") Cc: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-03-16mmc: dw_mmc: fix falling from idmac to PIO mode when dw_mci_reset occursEvgeniy Didin1-2/+4
It was found that in IDMAC mode after soft-reset driver switches to PIO mode. That's what happens in case of DTO timeout overflow calculation failure: 1. soft-reset is called 2. driver restarts dma 3. descriptors states are checked, one of descriptor is owned by the IDMAC. 4. driver can't use DMA and then switches to PIO mode. Failure was already fixed in: https://www.spinics.net/lists/linux-mmc/msg48125.html. Behaviour while soft-reset is not something we except or even want to happen. So we switch from dw_mci_idmac_reset to dw_mci_idmac_init, so descriptors are cleaned before starting dma. And while at it explicitly zero des0 which otherwise might contain garbage as being allocated by dmam_alloc_coherent(). Signed-off-by: Evgeniy Didin <Evgeniy.Didin@synopsys.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Cc: Shawn Lin <shawn.lin@rock-chips.com> Cc: Alexey Brodkin <abrodkin@synopsys.com> Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Cc: linux-snps-arc@lists.infradead.org Cc: <stable@vger.kernel.org> # 4.4+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-03-15mmc: core: Disable HPI for certain Micron (Numonyx) eMMC cardsDirk Behme2-0/+7
Certain Micron eMMC v4.5 cards might get broken when HPI feature is used and hence this patch disables the HPI feature for such buggy cards. In U-Boot, these cards are reported as Manufacturer: Micron (ID: 0xFE) OEM: 0x4E Name: MMC32G Revision: 19 (0x13) Serial: 959241022 Manufact. date: 8/2015 (0x82) CRC: 0x00 Tran Speed: 52000000 Rd Block Len: 512 MMC version 4.5 High Capacity: Yes Capacity: 29.1 GiB Boot Partition Size: 16 MiB Bus Width: 8-bit According to JEDEC JEP106 manufacturer 0xFE is Numonyx, which was bought by Micron. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Mark Craske <Mark_Craske@mentor.com> Cc: <stable@vger.kernel.org> # 4.8+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-03-15mmc: dw_mmc: exynos: fix the suspend/resume issue for exynos5433Jaehoon Chung1-1/+7
Before enabling the clock, dwmmc exynos driver is trying to access the register. Then the kernel panic can be occurred. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-03-15mmc: block: fix updating ext_csd caches on ioctl callBastian Stender1-0/+19
PARTITION_CONFIG is cached in mmc_card->ext_csd.part_config and the currently active partition in mmc_blk_data->part_curr. These caches do not always reflect changes if the ioctl call modifies the PARTITION_CONFIG registers, e.g. by changing BOOT_PARTITION_ENABLE. Write the PARTITION_CONFIG value extracted from the ioctl call to the cache and update the currently active partition accordingly. This ensures that the user space cannot change the values behind the kernel's back. The next call to mmc_blk_part_switch() will operate on the data set by the ioctl and reflect the changes appropriately. Signed-off-by: Bastian Stender <bst@pengutronix.de> Signed-off-by: Jan Luebbe <jlu@pengutronix.de> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-03-05mmc: dw_mmc: Fix the DTO/CTO timeout overflow calculation for 32-bit systemsEvgeniy Didin1-3/+6
The commit 9d9491a7da2a ("mmc: dw_mmc: Fix the DTO timeout calculation") and commit 4c2357f57dd5 ("mmc: dw_mmc: Fix the CTO timeout calculation") made changes, which cause multiply overflow for 32-bit systems. The broken timeout calculations leads to unexpected ETIMEDOUT errors and causes stacktrace splat (such as below) during normal data exchange with SD-card. | Running : 4M-check-reassembly-tcp-cmykw2-rotatew2.out -v0 -w1 | - Info: Finished target initialization. | mmcblk0: error -110 transferring data, sector 320544, nr 2048, cmd | response 0x900, card status 0x0 DIV_ROUND_UP_ULL helps to escape usage of __udivdi3() from libgcc and so code gets compiled on all 32-bit platforms as opposed to usage of DIV_ROUND_UP when we may only compile stuff on a very few arches. Lets cast this multiply to u64 type to prevent the overflow. Fixes: 9d9491a7da2a ("mmc: dw_mmc: Fix the DTO timeout calculation") Fixes: 4c2357f57dd5 ("mmc: dw_mmc: Fix the CTO timeout calculation") Tested-by: Vineet Gupta <Vineet.Gupta1@synopsys.com> Reported-by: Vineet Gupta <Vineet.Gupta1@synopsys.com> # ARC STAR 9001306872 HSDK, sdio: board crashes when copying big files Signed-off-by: Evgeniy Didin <Evgeniy.Didin@synopsys.com> Cc: <stable@vger.kernel.org> # 4.14 Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-02-27mmc: core: Avoid hanging to claim host for mmc via some nested callsUlf Hansson1-4/+0
As the block layer, since the conversion to blkmq, claims the host using a context, a following nested call to mmc_claim_host(), which isn't using a context, may hang. Calling mmc_interrupt_hpi() and mmc_read_bkops_status() via the mmc block layer, may suffer from this problem, as these functions are calling mmc_claim|release_host(). Let's fix the problem by removing the calls to mmc_claim|release_host() from the above mentioned functions and instead make the callers responsible of claiming/releasing the host. As a matter of fact, the existing callers already deals with it. Fixes: 81196976ed94 ("mmc: block: Add blk-mq support") Reported-by: Dmitry Osipenko <digetx@gmail.com> Suggested-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
2018-02-27mmc: dw_mmc: Avoid accessing registers in runtime suspended stateShawn Lin1-0/+4
cat /sys/kernel/debug/mmc0/regs will hang up the system since it's in runtime suspended state, so the genpd and biu_clk is off. This patch fixes this problem by calling pm_runtime_get_sync to wake it up before reading the registers. Fixes: e9ed8835e990 ("mmc: dw_mmc: add runtime PM callback") Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-02-27mmc: dw_mmc: Fix out-of-bounds access for slot's capsShawn Lin6-1/+14
Add num_caps field for dw_mci_drv_data to validate the controller id from DT alias and non-DT ways. Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Fixes: 800d78bfccb3 ("mmc: dw_mmc: add support for implementation specific callbacks") Cc: <stable@vger.kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-02-27mmc: dw_mmc: Factor out dw_mci_init_slot_capsShawn Lin1-30/+43
Factor out dw_mci_init_slot_caps to consolidate parsing all differents types of capabilities from host contrllers. No functional change intended. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Fixes: 800d78bfccb3 ("mmc: dw_mmc: add support for implementation specific callbacks") Cc: <stable@vger.kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-02-27mmc: dw_mmc-k3: Fix out-of-bounds access through DT aliasGeert Uytterhoeven1-0/+3
The hs_timing_cfg[] array is indexed using a value derived from the "mshcN" alias in DT, which may lead to an out-of-bounds access. Fix this by adding a range check. Fixes: 361c7fe9b02eee7e ("mmc: dw_mmc-k3: add sd support for hi3660") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Cc: <stable@vger.kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-02-27mmc: sdhci-pci: Fix S0i3 for Intel BYT-based controllersAdrian Hunter1-4/+31
Tuning can leave the IP in an active state (Buffer Read Enable bit set) which prevents the entry to low power states (i.e. S0i3). Data reset will clear it. Generally tuning is followed by a data transfer which will anyway sort out the state, so it is rare that S0i3 is actually prevented. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-02-14mmc: bcm2835: Don't overwrite max frequency unconditionallyPhil Elwell1-1/+2
The optional DT parameter max-frequency could init the max bus frequency. So take care of this, before setting the max bus frequency. Fixes: 660fc733bd74 ("mmc: bcm2835: Add new driver for the sdhost controller.") Signed-off-by: Phil Elwell <phil@raspberrypi.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Cc: <stable@vger.kernel.org> # 4.12+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-02-14Revert "mmc: meson-gx: include tx phase in the tuning process"Jerome Brunet1-18/+1
This reverts commit 0a44697627d17a66d7dc98f17aeca07ca79c5c20. This commit was initially intended to fix problems with hs200 and hs400 on some boards, mainly the odroid-c2. The OC2 (Rev 0.2) I have performs well in this modes, so I could not confirm these issues. We've had several reports about the issues being still present on (some) OC2, so apparently, this change does not do what it was supposed to do. Maybe the eMMC signal quality is on the edge on the board. This may explain the variability we see in term of stability, but this is just a guess. Lowering the max_frequency to 100Mhz seems to do trick for those affected by the issue Worse, the commit created new issues (CRC errors and hangs) on other boards, such as the kvim 1 and 2, the p200 or the libretech-cc. According to amlogic, the Tx phase should not be tuned and left in its default configuration, so it is best to just revert the commit. Fixes: 0a44697627d1 ("mmc: meson-gx: include tx phase in the tuning process") Cc: <stable@vger.kernel.org> # 4.14+ Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-02-10Merge tag 'kbuild-v4.16-2' of ↵Linus Torvalds1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild Pull more Kbuild updates from Masahiro Yamada: "Makefile changes: - enable unused-variable warning that was wrongly disabled for clang Kconfig changes: - warn about blank 'help' and fix existing instances - fix 'choice' behavior to not write out invisible symbols - fix misc weirdness Coccinell changes: - fix false positive of free after managed memory alloc detection - improve performance of NULL dereference detection" * tag 'kbuild-v4.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: (21 commits) kconfig: remove const qualifier from sym_expand_string_value() kconfig: add xrealloc() helper kconfig: send error messages to stderr kconfig: echo stdin to stdout if either is redirected kconfig: remove check_stdin() kconfig: remove 'config*' pattern from .gitignnore kconfig: show '?' prompt even if no help text is available kconfig: do not write choice values when their dependency becomes n coccinelle: deref_null: avoid useless computation coccinelle: devm_free: reduce false positives kbuild: clang: disable unused variable warnings only when constant kconfig: Warn if help text is blank nios2: kconfig: Remove blank help text arm: vt8500: kconfig: Remove blank help text MIPS: kconfig: Remove blank help text MIPS: BCM63XX: kconfig: Remove blank help text lib/Kconfig.debug: Remove blank help text Staging: rtl8192e: kconfig: Remove blank help text Staging: rtl8192u: kconfig: Remove blank help text mmc: kconfig: Remove blank help text ...
2018-02-05Merge tag 'mmc-v4.16-2' of ↵Linus Torvalds3-10/+161
git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc Pull MMC host fixes from Ulf Hansson: - renesas_sdhi: Fix build error in case NO_DMA=y - sdhci: Implement a bounce buffer to address throughput regressions * tag 'mmc-v4.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: mmc: MMC_SDHI_{SYS,INTERNAL}_DMAC should depend on HAS_DMA mmc: sdhci: Implement an SDHCI-specific bounce buffer
2018-02-05mmc: meson-gx-mmc: Explicitly include pinctr/consumer.hThierry Reding1-0/+1
The Meson GX MMC driver fails to build after commit 23c35f48f5fb ("pinctrl: remove include file from <linux/device.h>") because it relies on the pinctrl/consumer.h being pulled in by the device.h header implicitly. Include the header explicitly to avoid the build failure. Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2018-02-02mmc: kconfig: Remove blank help textUlf Magnusson1-1/+0
Blank help texts are probably either a typo, a Kconfig misunderstanding, or some kind of half-committing to adding a help text (in which case a TODO comment would be clearer, if the help text really can't be added right away). Best to remove them, IMO. Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-31mmc: MMC_SDHI_{SYS,INTERNAL}_DMAC should depend on HAS_DMAGeert Uytterhoeven1-2/+2
If NO_DMA=y: ERROR: "bad_dma_ops" [drivers/mmc/host/renesas_sdhi_sys_dmac.ko] undefined! ERROR: "bad_dma_ops" [drivers/mmc/host/renesas_sdhi_internal_dmac.ko] undefined! Add dependencies on HAS_DMA to fix this. Fixes: e578afab6e5f57e7 ("mmc: renesas_sdhi: remove wrong depends on to enable compile test") Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-31mmc: sdhci: Implement an SDHCI-specific bounce bufferLinus Walleij2-8/+159
The bounce buffer is gone from the MMC core, and now we found out that there are some (crippled) i.MX boards out there that have broken ADMA (cannot do scatter-gather), and also broken PIO so they must use SDMA. Closer examination shows a less significant slowdown also on SDMA-only capable Laptop hosts. SDMA sets down the number of segments to one, so that each segment gets turned into a singular request that ping-pongs to the block layer before the next request/segment is issued. Apparently it happens a lot that the block layer send requests that include a lot of physically discontiguous segments. My guess is that this phenomenon is coming from the file system. These devices that cannot handle scatterlists in hardware can see major benefits from a DMA-contiguous bounce buffer. This patch accumulates those fragmented scatterlists in a physically contiguous bounce buffer so that we can issue bigger DMA data chunks to/from the card. When tested with a PCI-integrated host (1217:8221) that only supports SDMA: 0b:00.0 SD Host controller: O2 Micro, Inc. OZ600FJ0/OZ900FJ0/OZ600FJS SD/MMC Card Reader Controller (rev 05) This patch gave ~1Mbyte/s improved throughput on large reads and writes when testing using iozone than without the patch. dmesg: sdhci-pci 0000:0b:00.0: SDHCI controller found [1217:8221] (rev 5) mmc0 bounce up to 128 segments into one, max segment size 65536 bytes mmc0: SDHCI controller on PCI [0000:0b:00.0] using DMA On the i.MX SDHCI controllers on the crippled i.MX 25 and i.MX 35 the patch restores the performance to what it was before we removed the bounce buffers. Cc: Pierre Ossman <pierre@ossman.eu> Cc: Benoît Thébaudeau <benoit@wsystem.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Benjamin Beckmeyer <beckmeyer.b@rittal.de> Cc: stable@vger.kernel.org # v4.14+ Fixes: de3ee99b097d ("mmc: Delete bounce buffer handling") Tested-by: Benjamin Beckmeyer <beckmeyer.b@rittal.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-29Merge tag 'mmc-v4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmcLinus Torvalds41-1440/+3971
Pull MMC updates from Ulf Hansson: "There are two major achievements for MMC in this release, which deserves to be specially highlighted. First, we have converted the MMC block device from using the legacy blk interface into using the modern blkmq interface. Not only do we get all the nice effects from using blkmq, but it also means that new fresh nice code replaces old rusty code. Great news to everybody that cares about MMC/SD! It should also be noted that converting to blkmq has not been trivial, mostly because of that we have been carrying too much of MMC specific optimizations for the I/O request path, rather than striving to move these to the generic blk layer. Hopefully we won't be doing that mistake, ever again. Special thanks to Adrian Hunter (Intel) and to Linus Walleij (Linaro), who both have been working on this for quite some time! Second, on top of the blkmq deployment, we have enabled full support the eMMC command queuing feature, introduced in the eMMC v.5.1 spec. This also includes an implementation of a host driver library, supporting the corresponding CQHCI HW. Ideally, those controllers that supports CQHCI should only need some minor adaptations to make this play. So far the sdhci-pci driver for the Intel GLKs and the sdhci-of-arasan driver used on Rockchip RK3399, have enabled support for eMMC command queueing. Worth to highlight is also that, implementing the eMMC command queuing support has been a collaborative effort, as several people from Codeaurora, Rockchip, Intel and Linaro have been involved. However, the work has been driven by Adrian Hunter (Intel). In some shadow of the above, here are the rest of the highlights: MMC core: - Don't remove non-removable cards during system suspend - Add a slot-gpio helper to check capability of GPIO WP detection MMC host: - sdhci: Cleanups and improvements of some wakeup related code - sdhci-pci-arasan: New variant to support Arasan PCI HW with integrated phy - sdhci-acpi: Avoid broken UHS transfer modes on Intel CHT - sdhci-acpi: Add support for ACPI HID of AMD Controller with HS400 - sdhci_f_sdh30: Add ACPI support - sdhci-esdhc-imx: Enable/disable clock at runtime suspend/resume - sdhci-of-esdhc: A few minor fixes - mmci: Add support for new STM32 variant - renesas_sdhi: enable R-Car D3 (r8a77995) support - tmio/renesas_sdhi: Re-structuring, cleanups and modernizations" * tag 'mmc-v4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (96 commits) mmc: mmci: fix error return code in mmci_probe() mmc: davinci: suppress error message on EPROBE_DEFER mmc: davinci: dont' use module_platform_driver_probe() mmc: tmio: hide unused tmio_mmc_clk_disable/tmio_mmc_clk_enable functions mmc: mmci: Add STM32 variant mmc: mmci: Add support for setting pad type via pinctrl mmc: mmci: Don't pretend all variants to have OPENDRAIN bit mmc: mmci: Don't pretend all variants to have MCI_STARBITERR flag mmc: mmci: Don't pretend all variants to have MMCIMASK1 register mmc: tmio: refactor .get_ro hook mmc: slot-gpio: add a helper to check capability of GPIO WP detection mmc: tmio: remove dma_ops from tmio_mmc_host_probe() argument mmc: tmio: move {tmio_}mmc_of_parse() to tmio_mmc_host_alloc() mmc: tmio: move clk_enable/disable out of tmio_mmc_host_probe() mmc: tmio: ioremap memory resource in tmio_mmc_host_alloc() mmc: sh_mmcif: remove redundant initialization of 'opc' mmc: sdhci: Rework sdhci_enable_irq_wakeups() mmc: sdhci: Handle failure of enable_irq_wake() mmc: sdhci: Stop exporting sdhci_enable_irq_wakeups() mmc: sdhci-pci: Use device wakeup capability to determine MMC_PM_WAKE_SDIO_IRQ capability ...
2018-01-29Merge tag 'mfd-next-4.16' of ↵Linus Torvalds3-4/+4
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Drivers: - Add support for RAVE Supervisory Processor Moved drivers: - Move Realtek Card Reader Driver to Misc New Device Support: - Add support for Pinctrl to axp20x New Functionality: - Add resume support to atmel-flexcom Fix-ups: - Split MFD (mfd) and userspace handlers (platform) in cros_ec - Fix trivial (whitespace, spelling) issue(s) in pcf50633-core - Clean-up error handling in ab8500-debugfs - General tidying up in tmio_core - Kconfig fix-ups for qcom-pm8xxx - Licensing changes (SPDX) to stm32-lptimer, stm32-timers - Device Tree fixups in mc13xxx - Simplify/remove unused code in cros_ec_spi, axp20x, ti_am335x_tscadc, kempld-core, intel_soc_pmic_core.c, ab8500-debugfs" * tag 'mfd-next-4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (32 commits) mfd: lpc_ich: Do not touch SPI-NOR write protection bit on Apollo Lake mfd: axp20x: Mark axp288 CHRG_BAK_CTRL register volatile mfd: ab8500: Introduce DEFINE_SHOW_ATTRIBUTE() macro atmel_flexcom: Support resuming after a chip reset mfd: Remove duplicate includes dt-bindings: mfd: mc13xxx: Add the unit address to sysled mfd: stm32: Adopt SPDX identifier mfd: axp20x: Add pinctrl cell for AXP813 mfd: pm8xxx: Make elegible for COMPILE_TEST mfd: kempld-core: Use resource_size function on resource object mfd: tmio: Move register macros to tmio_core.c mfd: cros ec: spi: Simplify delay handling between SPI messages mfd: palmas: Assign the right powerhold mask for tps65917 mfd: ab8500-debugfs: Use common error handling code in ab8500_print_modem_registers() mfd: ti_am335x_tscadc: Remove redundant assignment to node mfd: pcf50633: Fix spelling mistake: 'Falied' -> 'Failed' dt-bindings: watchdog: Add bindings for RAVE SP watchdog driver watchdog: Add RAVE SP watchdog driver mfd: Add driver for RAVE Supervisory Processor serdev: Introduce devm_serdev_device_open() ...
2018-01-24mmc: mmci: fix error return code in mmci_probe()Wei Yongjun1-0/+3
Fix to return a negative error code from the error handling case instead of 0, as done elsewhere in this function. Fixes: f9bb304ce855 ("mmc: mmci: Add support for setting pad type via pinctrl") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-22mmc: davinci: suppress error message on EPROBE_DEFERDavid Lechner1-2/+3
This suppresses printing an error message during probe of the TI DaVinci MMC driver when the error is EPROBE_DEFER. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-22mmc: davinci: dont' use module_platform_driver_probe()David Lechner1-6/+6
This changes module_platform_driver_probe() to module_platform_driver() in the TI DaVinci MMC driver. On device tree systems, we can get a -EPROBE_DEFER when using a pinmux for the CD GPIO, which results in the driver never loading because module_platform_driver_probe() prevents it from being re-probed. So, we replace module_platform_driver_probe() with module_platform_driver() and removed the __init attributes accordingly. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-22mmc: tmio: hide unused tmio_mmc_clk_disable/tmio_mmc_clk_enable functionsArnd Bergmann1-14/+14
When CONFIG_PM is disabled, we get a warning about the clock handling being unused: drivers/mmc/host/tmio_mmc_core.c:937:13: error: 'tmio_mmc_clk_disable' defined but not used [-Werror=unused-function] static void tmio_mmc_clk_disable(struct tmio_mmc_host *host) ^~~~~~~~~~~~~~~~~~~~ drivers/mmc/host/tmio_mmc_core.c:929:12: error: 'tmio_mmc_clk_enable' defined but not used [-Werror=unused-function] static int tmio_mmc_clk_enable(struct tmio_mmc_host *host) ^~~~~~~~~~~~~~~~~~~ As the clock handling is now done elsewhere, this is only used when power management is enabled. We could make the functions as __maybe_unused, but since there is already an #ifdef section, it seems easier to move the helpers closer to their callers. Fixes: b21fc294387e ("mmc: tmio: move clk_enable/disable out of tmio_mmc_host_probe()") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-18mmc: mmci: Add STM32 variantPatrice Chotard1-0/+22
STM32F4 and STM32F7 MCUs has a SDIO controller that looks like an ARM PL810. This patch adds the STM32 variant so that mmci driver supports it. Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-18mmc: mmci: Add support for setting pad type via pinctrlPatrice Chotard2-2/+44
If variant hasn't the control bit to switch pads in opendrain mode, we can achieve the same result by asking to the pinmux driver to configure pins for us. This patch make the mmci driver able to do this whenever needed. Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-18mmc: mmci: Don't pretend all variants to have OPENDRAIN bitPatrice Chotard1-11/+12
This patch prepares for supporting STM32 variant which doesn't have opendrain bit in MMCIPOWER register. ST others variant (u300, nomadik and ux500) uses MCI_OD bit whereas others variants uses MCI_ROD bit. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-18mmc: mmci: Don't pretend all variants to have MCI_STARBITERR flagPatrice Chotard1-2/+14
This patch prepares for supporting the STM32 variant that has no such bit in the status register. Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-18mmc: mmci: Don't pretend all variants to have MMCIMASK1 registerPatrice Chotard2-4/+25
Two mask registers are used in order to select which events have to actually generate an interrupt on each IRQ line. It seems that in the single-IRQ case it's assumed that the IRQs lines are simply OR-ed, while the two mask registers are still present. The driver still programs the two mask registers separately. However the STM32 variant has only one IRQ, and also has only one mask register. This patch prepares for STM32 variant support by making the driver using only one mask register. This patch also optimize the MMCIMASK1 mask usage by caching it into host->mask1_reg which avoid to read it into mmci_irq(). Tested only on STM32 variant. RFT for variants other than STM32 Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-18mmc: tmio: refactor .get_ro hookMasahiro Yamada1-8/+5
This IP provides the write protect signal level in the status register, but it is also possible to use GPIO for WP. They are exclusive, so it is not efficient to call mmc_gpio_get_ro() every time from tmio_mmc_get_ro() if we know gpio_ro is not used. Check the capability of gpio_ro just once in the probe function, then set mmc_gpio_get_ro to .get_ro if it is the case. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-18mmc: slot-gpio: add a helper to check capability of GPIO WP detectionMasahiro Yamada1-0/+8
Like mmc_can_gpio_cd(), mmc_can_gpio_ro() will also be useful for host drivers to know whether GPIO write-protect detection is supported. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-18mmc: tmio: remove dma_ops from tmio_mmc_host_probe() argumentMasahiro Yamada4-7/+5
Drivers need to set up various struct members for tmio_mmc_host before calling tmio_mmc_host_probe(). Do likewise for host->dma_ops instead of passing it as a function argument. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-18mmc: tmio: move {tmio_}mmc_of_parse() to tmio_mmc_host_alloc()Masahiro Yamada1-6/+13
mmc_of_parse() parses various DT properties and sets capability flags accordingly. However, drivers have no chance to run platform init code depending on such flags because mmc_of_parse() is called from tmio_mmc_host_probe(). Move mmc_of_parse() to tmio_mmc_host_alloc() so that drivers can handle capabilities before mmc_add_host(). Move tmio_mmc_of_parse() likewise. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-18mmc: tmio: move clk_enable/disable out of tmio_mmc_host_probe()Masahiro Yamada4-27/+30
The clock is enabled in the tmio_mmc_host_probe(). It also prevents drivers from performing platform-specific settings before mmc_add_host() because the register access generally requires a clock. Enable/disable the clock in drivers' probe/remove. Also, I passed tmio_mmc_data to tmio_mmc_host_alloc() because renesas_sdhi_clk_enable() needs it to get the private data from tmio_mmc_host. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-18mmc: tmio: ioremap memory resource in tmio_mmc_host_alloc()Masahiro Yamada3-10/+14
The register region is ioremap'ed in the tmio_mmc_host_probe(), i.e. drivers cannot get access to the hardware before mmc_add_host(). Actually, renesas_sdhi_core.c reads out the CTL_VERSION register to complete the platform-specific settings. However, at this point, the MMC host is already running. Move the register ioremap to tmio_mmc_host_alloc() so that drivers can perform platform-specific settings between tmio_mmc_host_alloc() and tmio_mmc_host_probe(). I changed tmio_mmc_host_alloc() to return an error pointer to propagate the return code from devm_ioremap_resource(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-18mmc: sh_mmcif: remove redundant initialization of 'opc'Colin Ian King1-1/+1
Variable opc is initialized with a value that is never read, opc is later re-assigned a newer value, hence the initialization can be removed. Cleans up clang warning: drivers/mmc/host/sh_mmcif.c:919:6: warning: Value stored to 'opc' during its initialization is never read Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-17mmc: sdhci: Rework sdhci_enable_irq_wakeups()Adrian Hunter1-10/+15
In preparation for adding more conditions for whether IRQ wakeup is enabled, rework sdhci_enable_irq_wakeups() so that needed bits are added instead of adding them all and then removing the unneeded bits. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-17mmc: sdhci: Handle failure of enable_irq_wake()Adrian Hunter2-9/+16
Now that sdhci_enable_irq_wakeups() is a local function, change it to return whether the IRQ wakeup was successfully enabled. This is in preparation for adding more conditions for whether IRQ wakeup is enabled. Note it is assumed, for SDHCI devices, that suspend is more important than wakeup, so we continue to suspend regardless. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-17mmc: sdhci: Stop exporting sdhci_enable_irq_wakeups()Adrian Hunter2-3/+1
Now that it is not being used by any drivers, stop exporting it. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-17mmc: sdhci-pci: Use device wakeup capability to determine ↵Adrian Hunter1-4/+7
MMC_PM_WAKE_SDIO_IRQ capability PCI and ACPI determine if a device is wakeup capable, so use that to determine the MMC_PM_WAKE_SDIO_IRQ capability correctly. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-17mmc: sdhci-pci: Stop calling sdhci_enable_irq_wakeups()Adrian Hunter1-37/+21
sdhci_enable_irq_wakeups() is already called by sdhci_suspend_host() so sdhci-pci should not need to call it. However sdhci_suspend_host() only calls it if wakeups are enabled, and sdhci-pci does not enable them until after calling sdhci_suspend_host(). So move the calls to sdhci_pci_init_wakeup() before calling sdhci_suspend_host(), and stop calling sdhci_enable_irq_wakeups(). That results in some simplification because sdhci_pci_suspend_host() and __sdhci_pci_suspend_host() no longer need to be separate functions. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-16mmc: sdhci-of-arasan: Add CQHCI support for arasan,sdhci-5.1Shawn Lin2-6/+132
Add CQHCI initialization and implement CQHCI operations for Arasan SDHCI variant host, namely arasan,sdhci-5.1, which is used by Rockchip RK3399 platform. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-15Merge branch 'fixes' into nextUlf Hansson1-0/+14
2018-01-15mmc: sdhci-esdhc-imx: Fix i.MX53 eSDHCv3 clockBenoît Thébaudeau1-0/+14
Commit 5143c953a786 ("mmc: sdhci-esdhc-imx: Allow all supported prescaler values") made it possible to set SYSCTL.SDCLKFS to 0 in SDR mode, thus bypassing the SD clock frequency prescaler, in order to be able to get higher SD clock frequencies in some contexts. However, that commit missed the fact that this value is illegal on the eSDHCv3 instance of the i.MX53. This seems to be the only exception on i.MX, this value being legal even for the eSDHCv2 instances of the i.MX53. Fix this issue by changing the minimum prescaler value if the i.MX53 eSDHCv3 is detected. According to the i.MX53 reference manual, if DLLCTRL[10] can be set, then the controller is eSDHCv3, else it is eSDHCv2. This commit fixes the following issue, which was preventing the i.MX53 Loco (IMX53QSB) board from booting Linux 4.15.0-rc5: [ 1.882668] mmcblk1: error -84 transferring data, sector 2048, nr 8, cmd response 0x900, card status 0xc00 [ 2.002255] mmcblk1: error -84 transferring data, sector 2050, nr 6, cmd response 0x900, card status 0xc00 [ 12.645056] mmc1: Timeout waiting for hardware interrupt. [ 12.650473] mmc1: sdhci: ============ SDHCI REGISTER DUMP =========== [ 12.656921] mmc1: sdhci: Sys addr: 0x00000000 | Version: 0x00001201 [ 12.663366] mmc1: sdhci: Blk size: 0x00000004 | Blk cnt: 0x00000000 [ 12.669813] mmc1: sdhci: Argument: 0x00000000 | Trn mode: 0x00000013 [ 12.676258] mmc1: sdhci: Present: 0x01f8028f | Host ctl: 0x00000013 [ 12.682703] mmc1: sdhci: Power: 0x00000002 | Blk gap: 0x00000000 [ 12.689148] mmc1: sdhci: Wake-up: 0x00000000 | Clock: 0x0000003f [ 12.695594] mmc1: sdhci: Timeout: 0x0000008e | Int stat: 0x00000000 [ 12.702039] mmc1: sdhci: Int enab: 0x107f004b | Sig enab: 0x107f004b [ 12.708485] mmc1: sdhci: AC12 err: 0x00000000 | Slot int: 0x00001201 [ 12.714930] mmc1: sdhci: Caps: 0x07eb0000 | Caps_1: 0x08100810 [ 12.721375] mmc1: sdhci: Cmd: 0x0000163a | Max curr: 0x00000000 [ 12.727821] mmc1: sdhci: Resp[0]: 0x00000920 | Resp[1]: 0x00000000 [ 12.734265] mmc1: sdhci: Resp[2]: 0x00000000 | Resp[3]: 0x00000000 [ 12.740709] mmc1: sdhci: Host ctl2: 0x00000000 [ 12.745157] mmc1: sdhci: ADMA Err: 0x00000001 | ADMA Ptr: 0xc8049200 [ 12.751601] mmc1: sdhci: ============================================ [ 12.758110] print_req_error: I/O error, dev mmcblk1, sector 2050 [ 12.764135] Buffer I/O error on dev mmcblk1p1, logical block 0, lost sync page write [ 12.775163] EXT4-fs (mmcblk1p1): mounted filesystem without journal. Opts: (null) [ 12.782746] VFS: Mounted root (ext4 filesystem) on device 179:9. [ 12.789151] mmcblk1: response CRC error sending SET_BLOCK_COUNT command, card status 0x900 Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> Reported-by: Wladimir J. van der Laan <laanwj@gmail.com> Tested-by: Wladimir J. van der Laan <laanwj@gmail.com> Fixes: 5143c953a786 ("mmc: sdhci-esdhc-imx: Allow all supported prescaler values") Cc: <stable@vger.kernel.org> # v4.13+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-12mmc: tmio: use mmc_can_gpio_cd() instead of checking TMIO_MMC_USE_GPIO_CDMasahiro Yamada1-1/+1
To use a GPIO line for card detection, TMIO_MMC_USE_GPIO_CD is set by a legacy board (arch/sh/boards/mach-ecovec24). For DT platforms, the "cd-gpios" property is a legitimate way for that in case the IP-builtin card detection can not be used for some reason. mmc_of_parse() calls mmc_gpiod_request_cd() to set up ctx->cd_gpio if the "cd-gpios" property is specified. To cater to both cases, mmc_can_gpio_cd() is a correct way to check which card detection logic is used. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-11sdhci: Advertise 2.0v supply on SDIO host controllerAndy Shevchenko2-0/+9
On Intel Edison the Broadcom Wi-Fi card, which is connected to SDIO, requires 2.0v, while the host, according to Intel Merrifield TRM, supports 1.8v supply only. The card announces itself as mmc2: new ultra high speed DDR50 SDIO card at address 0001 Introduce a custom OCR mask for SDIO host controller on Intel Merrifield and add a special case to sdhci_set_power_noreg() to override 2.0v supply by enforcing 1.8v power choice. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-11mmc: tmio, renesas_sdhi: Remove unneeded NULL checkDan Carpenter1-1/+1
The inconsistent NULL checking in this function causes static checker warnings. drivers/mmc/host/renesas_sdhi_sys_dmac.c:360 renesas_sdhi_sys_dmac_issue_tasklet_fn() error: we previously assumed 'host' could be null (see line 351) On reviewing this code, "host" can't ever be NULL so we can just remove the check. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-11mmc: sdhci_f_sdh30: add ACPI supportArd Biesheuvel2-19/+35
The Fujitsu SDH30 SDHCI controller may be described as a SCX0002 ACPI device on ACPI platforms incorporating the Socionext SynQuacer SoC. Given that mmc_of_parse() has already been made ACPI/DT agnostic, making the SDH30 driver ACPI capable is actually rather simple: all we need to do is make the call to sdhci_get_of_property() [which does not set any properties we care about] and the clock handling dependent on whether we are dealing with a DT device, and exposing the ACPI id via the platform_driver struct and the module metadata. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-27 11:41:29 +0300