| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2020-10-25 | irqchip/stm32-exti: Add all LP timer exti direct events support | Fabrice Gasnier | 1 | -0/+4 |
| 2020-08-25 | irqchip/stm32-exti: Avoid losing interrupts due to clearing pending bits by m... | qiuguorui1 | 1 | -2/+12 |
| 2020-07-27 | irqchip/stm32-exti: Map direct event to irq parent | Alexandre Torgue | 1 | -34/+67 |
| 2020-07-27 | irqchip/stm32-exti: Use the hwspin_lock_timeout_in_atomic() API | Fabien Dessenne | 1 | -45/+20 |
| 2020-03-08 | irqchip/stm32: Add irq retrigger support | Alexandre Torgue | 1 | -1/+13 |
| 2019-04-29 | irqchip/stm32: Use a platform driver for stm32mp1-exti device | Fabien Dessenne | 1 | -93/+140 |
| 2019-03-21 | Merge tag 'irqchip-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ma... | Thomas Gleixner | 1 | -10/+0 |
| 2019-03-21 | irqchip/stm32: Don't set rising configuration registers at init | Fabien Dessenne | 1 | -5/+0 |
| 2019-03-21 | irqchip/stm32: Don't clear rising/falling config registers at init | Fabien Dessenne | 1 | -5/+0 |
| 2019-01-17 | irqchip/stm32-exti: Add domain translate function | Loic Pallardy | 1 | -0/+1 |
| 2018-12-18 | irqchip/stm32: protect configuration registers with hwspinlock | Benjamin Gaignard | 1 | -16/+100 |
| 2018-12-13 | irqchhip: Convert to using %pOFn instead of device_node.name | Yangtao Li | 1 | -3/+3 |
| 2018-08-24 | Merge tag 'irqchip-4.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/m... | Thomas Gleixner | 1 | -12/+13 |
| 2018-08-13 | irqchip/stm32: Fix init error handling | Dan Carpenter | 1 | -12/+13 |
| 2018-07-19 | irqchip/stm32: Add exti0 translation for stm32mp1 | Ludovic Barre | 1 | -0/+1 |
| 2018-06-06 | irqchip/stm32: Fix non-SMP build warning | Arnd Bergmann | 1 | -3/+1 |
| 2018-05-24 | irqchip/stm32: Add suspend/resume support for hierarchy domain | Ludovic Barre | 1 | -0/+49 |
| 2018-05-24 | irqchip/stm32: Add stm32mp1 support with hierarchy domain | Ludovic Barre | 1 | -0/+322 |
| 2018-05-24 | irqchip/stm32: Prepare common functions | Ludovic Barre | 1 | -33/+58 |
| 2018-05-24 | irqchip/stm32: Add host and driver data structures | Ludovic Barre | 1 | -48/+104 |
| 2018-05-24 | irqchip/stm32: Add suspend support | Ludovic Barre | 1 | -17/+52 |
| 2018-05-24 | irqchip/stm32: Add falling pending register support | Ludovic Barre | 1 | -11/+36 |
| 2018-05-24 | irqchip/stm32: Checkpatch fix | Ludovic Barre | 1 | -2/+2 |
| 2018-05-24 | irqchip/stm32: Optimizes and cleans up stm32-exti irq_domain | Radoslaw Pietrzyk | 1 | -13/+0 |
| 2018-01-29 | irqchip/stm32: Fix copyright | Benjamin Gaignard | 1 | -1/+2 |
| 2017-11-07 | irqchip/stm32: Move the wakeup on interrupt mask | Ludovic Barre | 1 | -5/+5 |
| 2017-11-07 | irqchip/stm32: Fix initial values | Ludovic Barre | 1 | -0/+9 |
| 2017-11-07 | irqchip/stm32: Add stm32h7 support | Ludovic Barre | 1 | -0/+42 |
| 2017-11-07 | irqchip/stm32: Add multi-bank management | Ludovic Barre | 1 | -46/+103 |
| 2017-08-23 | irqchip: Convert to using %pOF instead of full_name | Rob Herring | 1 | -4/+4 |
| 2016-09-21 | drivers/irqchip: Add STM32 external interrupts support | Alexandre TORGUE | 1 | -0/+201 |
