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path: root/drivers/irqchip/irq-loongson-liointc.c
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2024-08-23LoongArch: Move irqchip function prototypes to irq-loongson.hHuacai Chen1-0/+2
Some irqchip functions are only for internal use by irqchip drivers, so move their prototypes from asm/irq.h to drivers/irqchip/irq-loongson.h. All related driver files include the new irq-loongson.h. Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Tianyang Zhang <zhangtianyang@loongson.cn> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240823103936.25092-1-zhangtianyang@loongson.cn
2024-06-23irqchip/loongson-liointc: Set different ISRs for different coresHuacai Chen1-2/+2
The liointc hardware provides separate Interrupt Status Registers (ISR) for each core. The current code uses always the ISR of core #0, which works during boot because by default all interrupts are routed to core #0. When the interrupt routing changes in the firmware configuration then this causes interrupts to be lost because they are not configured in the corresponding core. Use the core index to access the correct ISR instead of a hardcoded 0. [ tglx: Massaged changelog ] Fixes: 0858ed035a85 ("irqchip/loongson-liointc: Add ACPI init support") Co-developed-by: Tianli Xiong <xiongtianli@loongson.cn> Signed-off-by: Tianli Xiong <xiongtianli@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20240622043338.1566945-1-chenhuacai@loongson.cn
2023-06-16irqchip/loongson-liointc: Add IRQCHIP_SKIP_SET_WAKE flagYinbo Zhu1-0/+1
LIOINTC doesn't require specific logic to work with wakeup IRQs, and no irq_set_wake callback is needed. To allow registered IRQs from LIOINTC to be used as a wakeup-source, and ensure irq_set_irq_wake() works well, the flag IRQCHIP_SKIP_SET_WAKE should be added. Reviewed-by: Huacai Chen <chenhuacai@kernel.org> Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230614115936.5950-5-lvjianmin@loongson.cn
2023-06-16irqchip/loongson-liointc: Fix IRQ trigger polarityJianmin Lv1-4/+8
For the INT_POLARITY register of Loongson-2K series IRQ controller, '0' indicates high level or rising edge triggered, '1' indicates low level or falling edge triggered, and we can find out the information from the Loongson 2K1000LA User Manual v1.0, Table 9-2, Section 9.3 (中断寄存器描述 / Description of the Interrupt Registers). For Loongson-3 CPU series, setting INT_POLARITY register is not supported and writting it has no effect. So trigger polarity setting shouled be fixed for Loongson-2K CPU series. Fixes: 17343d0b4039 ("irqchip/loongson-liointc: Support to set IRQ type for ACPI path") Cc: stable@vger.kernel.org Reviewed-by: Huacai Chen <chenhuacai@kernel.org> Co-developed-by: Chong Qiao <qiaochong@loongson.cn> Signed-off-by: Chong Qiao <qiaochong@loongson.cn> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230614115936.5950-4-lvjianmin@loongson.cn
2023-02-05irqchip/loongson-liointc: Save/restore int_edge/int_pol registers during S3/S4Huacai Chen1-0/+13
If int_edge/int_pol registers are configured to not be the default values, we should save/restore them during S3/S4. Signed-off-by: Yingkun Meng <mengyingkun@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20221207140643.1600743-1-chenhuacai@loongson.cn
2022-12-05Merge branch irq/misc-6.2 into irq/irqchip-nextMarc Zyngier1-1/+4
* irq/misc-6.2: : . : Random minor fixes and improvments: : : - More Loongson fixes after the Loongarch merge : : - Error handling fixes for wpcm450, GIC... : : - BE detection for a FSL controller : : - Declare the Sifive PLIC as wake-up agnostic : : - Simplify fishing out the device data for the ST irqchip : : - Mark some data structures as __initconst in the apple-aic driver : : - Switch over from strtobool to kstrtobool : : - COMPILET_TEST fixes : : - and the mandatory "repeated word" commit... : . irqchip/ls-extirq: Fix endianness detection irqchip/gic: Use kstrtobool() instead of strtobool() irqchip/sifive-plic: Support wake IRQs irqchip/loongson-liointc: Fix improper error handling in liointc_init() irqchip/sl28cpld: Replace irqchip mask_invert with unmask_base irqchip/wpcm450: Fix memory leak in wpcm450_aic_of_init() irqchip/st: Use device_get_match_data() to simplify the code irqchip/al-fic: Drop obsolete dependency on COMPILE_TEST irqchip: gic-pm: Use pm_runtime_resume_and_get() in gic_probe() irqchip/mips-gic: Drop repeated word in comment irqchip/apple-aic: Mark aic_info structs __initconst Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-11-26irqchip/loongson-liointc: Fix improper error handling in liointc_init()Liu Peibao1-1/+4
For cores less than 4, eg, loongson2k1000 with 2 cores, the of_property_match_string() may return with an error value, which causes that liointc could not work. At least isr0 is what should be checked like previous commit b2c4c3969fd7 ("irqchip/loongson-liointc: irqchip add 2.0 version") did. Fixes: 0858ed035a85 ("irqchip/loongson-liointc: Add ACPI init support") Signed-off-by: Liu Peibao <liupeibao@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20221104110712.23300-1-liupeibao@loongson.cn
2022-11-26irqchip/loongson-htvec: Add ACPI init supportHuacai Chen1-1/+24
HTVECINTC stands for "HyperTransport Interrupts" that described in Section 14.3 of "Loongson 3A5000 Processor Reference Manual". For more information please refer Documentation/loongarch/irq-chip-model.rst. Though the extended model is the recommended one, there are still some legacy model machines. So we add ACPI init support for HTVECINTC. Co-developed-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20221020142535.1725573-1-chenhuacai@loongson.cn
2022-11-26irqchip/loongson-liointc: Support to set IRQ type for ACPI pathJianmin Lv1-1/+6
For ACPI path, the xlate callback used IRQ_TYPE_NONE and ignored the IRQ type in intspec[1]. For supporting to set type for IRQs of the irqdomain, intspec[1] should be used to get IRQ type. Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn> Reviewed-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20221022075955.11726-5-lvjianmin@loongson.cn
2022-08-12irqchip/loongson-liointc: Fix an error handling path in liointc_init()Christophe JAILLET1-1/+1
All errors lead to the error handling path, except the one dealing with "reg-names" in DT. Fix it and release some resources before returning if this test fails. Fixes: 0858ed035a85 ("irqchip/loongson-liointc: Add ACPI init support") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> [maz: fix commit message] Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1a6d74ab70712279023aa7bdbd31bd3aec103bc0.1659382063.git.christophe.jaillet@wanadoo.fr
2022-08-09irqchip/loongarch: Fix irq_domain_alloc_fwnode() abuseMarc Zyngier1-1/+1
The recently merged LoongArch drivers paper over the lack of topology information by creating a bunch of fwnodes for the irqchips. So far, so good. However, irq_domain_alloc_fwnode() is supposed to take a PA, and not a kernel VA blindly cast as a PA, potentially disclosing kernel VAs to userspace. In some other cases, even NULL is used as the PA, which is entertaining. Fix this by using the actual PA of the block when available, and switch to a named fwnode in the other cases. Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Jianmin Lv <lvjianmin@loongson.cn> Link: https://lore.kernel.org/r/20220808105020.2689757-1-maz@kernel.org
2022-07-20irqchip/loongson-liointc: Add ACPI init supportHuacai Chen1-75/+128
LIOINTC stands for "Legacy I/O Interrupts" that described in Section 11.1 of "Loongson 3A5000 Processor Reference Manual". For more information please refer Documentation/loongarch/irq-chip-model.rst. Co-developed-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1658314292-35346-11-git-send-email-lvjianmin@loongson.cn
2022-06-10irqchip/loongson-liointc: Use architecture register to get coreidJiaxun Yang1-1/+7
fa84f89395e0 ("irqchip/loongson-liointc: Fix build error for LoongArch") replaced get_ebase_cpunum with physical processor id from SMP facilities. However that breaks MIPS non-SMP build and makes booting from other cores inpossible on non-SMP kernel. Thus we revert get_ebase_cpunum back and use get_csr_cpuid for LoongArch. Fixes: fa84f89395e0 ("irqchip/loongson-liointc: Fix build error for LoongArch") Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220609175242.977-1-jiaxun.yang@flygoat.com
2022-06-03irqchip/loongson-liointc: Fix build error for LoongArchHuacai Chen1-1/+5
liointc driver is shared by MIPS and LoongArch, this patch adjust the code to fix build error for LoongArch. Acked-by: Marc Zyngier <maz@kernel.org> Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2021-06-10irqchip: Bulk conversion to generic_handle_domain_irq()Marc Zyngier1-1/+1
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2021-03-25irqchip/loongson-liointc: irqchip add 2.0 versionQing Zhang1-9/+49
Add IO interrupt controller support for Loongson-2K1000, different from the Loongson-3A series is that Loongson-2K1000 has 64 interrupt sources, 0-31 correspond to the device tree liointc0 device node, and the other correspond to liointc1 node. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Qing Zhang <zhangqing@loongson.cn> Tested-by: Ming Wang <wangming01@loongson.cn> Acked-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-03-12MIPS: Loongson64: Move loongson_system_configuration to loongson.hQing Zhang1-1/+1
The purpose of separating loongson_system_configuration from boot_param.h is to keep the other structure consistent with the firmware. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Qing Zhang <zhangqing@loongson.cn> Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-05irqchip/loongson-liointc: Fix build warningsHuacai Chen1-2/+2
Fix build warnings as below: >> drivers/irqchip/irq-loongson-liointc.c:134:12: warning: no previous prototype for 'liointc_of_init' [-Wmissing-prototypes] 134 | int __init liointc_of_init(struct device_node *node, | ^~~~~~~~~~~~~~~ Fixes: dbb152267908c4b2c3639492a94 ("irqchip: Add driver for Loongson I/O Local Interrupt Controller") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Huacai Chen <chenhuacai@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210105025651.772024-1-chenhuacai@loongson.cn
2020-07-30irqchip/loongson-liointc: Fix misuse of gc->mask_cacheHuacai Chen1-5/+5
In gc->mask_cache bits, 1 means enabled and 0 means disabled, but in the loongson-liointc driver mask_cache is misused by reverting its meaning. This patch fix the bug and update the comments as well. Fixes: dbb152267908c4b2c3639492a ("irqchip: Add driver for Loongson I/O Local Interrupt Controller") Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/1596099090-23516-4-git-send-email-chenhc@lemote.com
2020-07-17irqchip/loongson-liointc: Fix potential dead lockTiezhu Yang1-0/+1
In the function liointc_set_type(), we need to call the function irq_gc_unlock_irqrestore() before returning. Fixes: dbb152267908 ("irqchip: Add driver for Loongson I/O Local Interrupt Controller") Reported-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1594087972-21715-8-git-send-email-yangtiezhu@loongson.cn
2020-03-25irqchip: loongson-liointc: Workaround LPC IRQ ErrataJiaxun Yang1-2/+12
The 1.0 version of that controller has a bug that status bit of LPC IRQ sometimes doesn't get set correctly. So we can always blame LPC IRQ when spurious interrupt happens at the parent interrupt line which LPC IRQ supposed to route to. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Co-developed-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-03-25irqchip: Add driver for Loongson I/O Local Interrupt ControllerJiaxun Yang1-0/+261
This controller appeared on Loongson family of chips as the primary package interrupt source. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Co-developed-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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