index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
irqchip
/
irq-brcmstb-l2.c
Age
Commit message (
Expand
)
Author
Files
Lines
2015-09-16
genirq: Remove irq argument from irq flow handlers
Thomas Gleixner
1
-4
/
+3
2015-07-16
irqchip/brcmstb-l2: Prepare brcmstb_l2_intc_irq_handle for irq argument removal
Thomas Gleixner
1
-1
/
+3
2015-07-12
irqchip/brcmstb-l2: Consolidate chained IRQ handler install/remove
Thomas Gleixner
1
-2
/
+2
2015-07-12
irqchip: Prepare for local stub header removal
Joel Porquet
1
-2
/
+0
2015-04-01
IRQCHIP: brcmstb-l2: don't clear wakeable interrupts at init time
Brian Norris
1
-3
/
+6
2014-12-10
Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...
Linus Torvalds
1
-15
/
+26
2014-11-26
irqchip: brcmstb-l2: Fix error handling of irq_of_parse_and_map
Dmitry Torokhov
1
-2
/
+2
2014-11-09
irqchip: brcmstb-l2: Convert driver to use irq_reg_{readl,writel}
Kevin Cernekee
1
-12
/
+22
2014-11-09
irqchip: brcmstb-l2: Eliminate dependency on ARM code
Kevin Cernekee
1
-3
/
+4
2014-06-21
irqchip: brcmstb-l2: Level-2 interrupts are edge sensitive
Florian Fainelli
1
-1
/
+1
2014-05-27
irqchip: brcmstb-l2: Add Broadcom Set Top Box Level-2 interrupt controller
Florian Fainelli
1
-0
/
+202