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2022-10-24iio: adc: at91-sama5d2_adc: disable/prepare buffer on suspend/resumeClaudiu Beznea1-7/+7
[ Upstream commit 808175e21d9b7f866eda742e8970f27b78afe5db ] In case triggered buffers are enabled while system is suspended they will not work anymore after resume. For this call at91_adc_buffer_postdisable() on suspend and at91_adc_buffer_prepare() on resume. On tests it has been seen that at91_adc_buffer_postdisable() call is not necessary but it has been kept because it also does the book keeping for DMA. On resume path there is no need to call at91_adc_configure_touch() as it is embedded in at91_adc_buffer_prepare(). Fixes: 073c662017f2f ("iio: adc: at91-sama5d2_adc: add support for DMA") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220803102855.2191070-5-claudiu.beznea@microchip.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-10-24iio: adc: at91-sama5d2_adc: lock around oversampling and sample freqClaudiu Beznea1-4/+8
[ Upstream commit 9780a23ed5a0a0a63683e078f576719a98d4fb70 ] .read_raw()/.write_raw() could be called asynchronously from user space or other in kernel drivers. Without locking on st->lock these could be called asynchronously while there is a conversion in progress. Read will be harmless but changing registers while conversion is in progress may lead to inconsistent results. Thus, to avoid this lock st->lock. Fixes: 27e177190891 ("iio:adc:at91_adc8xx: introduce new atmel adc driver") Fixes: 6794e23fa3fe ("iio: adc: at91-sama5d2_adc: add support for oversampling resolution") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220803102855.2191070-4-claudiu.beznea@microchip.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-10-24iio: adc: at91-sama5d2_adc: check return status for pressure and touchClaudiu Beznea1-2/+6
[ Upstream commit d84ace944a3b24529798dbae1340dea098473155 ] Check return status of at91_adc_read_position() and at91_adc_read_pressure() in at91_adc_read_info_raw(). Fixes: 6794e23fa3fe ("iio: adc: at91-sama5d2_adc: add support for oversampling resolution") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220803102855.2191070-3-claudiu.beznea@microchip.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-10-24iio: adc: at91-sama5d2_adc: fix AT91_SAMA5D2_MR_TRACKTIM_MAXClaudiu Beznea1-1/+1
[ Upstream commit bb73d5d9164c57c4bb916739a98e5cd8e0a5ed8c ] All ADC HW versions handled by this driver (SAMA5D2, SAM9X60, SAMA7G5) have MR.TRACKTIM on 4 bits. Fix AT91_SAMA5D2_MR_TRACKTIM_MAX to reflect this. Fixes: 27e177190891 ("iio:adc:at91_adc8xx: introduce new atmel adc driver") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220803102855.2191070-2-claudiu.beznea@microchip.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-10-24iio: adc: ad7923: fix channel readings for some variantsNuno Sá1-1/+3
commit f4f43f01cff2f29779343ade755191afd2581c77 upstream. Some of the supported devices have 4 or 2 LSB trailing bits that should not be taken into account. Hence we need to shift these bits out which fits perfectly on the scan type shift property. This change fixes both raw and buffered reads. Fixes: f2f7a449707e ("iio:adc:ad7923: Add support for the ad7904/ad7914/ad7924") Fixes: 851644a60d20 ("iio: adc: ad7923: Add support for the ad7908/ad7918/ad7928") Signed-off-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220912081223.173584-2-nuno.sa@analog.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-10-24iio: ltc2497: Fix reading conversion resultsUwe Kleine-König1-0/+13
commit 7f4f1096d5921f5d90547596f9ce80e0b924f887 upstream. After the result of the previous conversion is read the chip automatically starts a new conversion and doesn't accept new i2c transfers until this conversion is completed which makes the function return failure. So add an early return iff the programming of the new address isn't needed. Note this will not fix the problem in general, but all cases that are currently used. Once this changes we get the failure back, but this can be addressed when the need arises. Fixes: 69548b7c2c4f ("iio: adc: ltc2497: split protocol independent part in a separate module ") Reported-by: Meng Li <Meng.Li@windriver.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Tested-by: Denys Zagorui <dzagorui@cisco.com> Cc: <Stable@vger.kernel.org> Link: https://lore.kernel.org/r/20220815091647.1523532-1-dzagorui@cisco.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-09-08iio: adc: mcp3911: use correct formula for AD conversionMarcus Folkesson1-5/+12
commit 9e2238e3ae40d371a1130226e0e740aa1601efa6 upstream. The ADC conversion is actually not rail-to-rail but with a factor 1.5. Make use of this factor when calculating actual voltage. Fixes: 3a89b289df5d ("iio: adc: add support for mcp3911") Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20220722130726.7627-4-marcus.folkesson@gmail.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-09-08iio: adc: mcp3911: correct "microchip,device-addr" propertyMarcus Folkesson1-1/+8
commit cfbd76d5c9c449739bb74288d982bccf9ff822f4 upstream. Go for the right property name that is documented in the bindings. Fixes: 3a89b289df5d ("iio: adc: add support for mcp3911") Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20220722130726.7627-3-marcus.folkesson@gmail.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-09-08iio: ad7292: Prevent regulator double disableMatti Vaittinen1-3/+1
commit 22b4277641c6823ec03d5b1cd82628e5e53e75b7 upstream. The ad7292 tries to add an devm_action for disabling a regulator at device detach using devm_add_action_or_reset(). The devm_add_action_or_reset() does call the release function should adding action fail. The driver inspects the value returned by devm_add_action_or_reset() and manually calls regulator_disable() if adding the action has failed. This leads to double disable and messes the enable count for regulator. Do not manually call disable if devm_add_action_or_reset() fails. Fixes: 506d2e317a0a ("iio: adc: Add driver support for AD7292") Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Tested-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com> Link: https://lore.kernel.org/r/Yv9O+9sxU7gAv3vM@fedora Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-09-08iio: adc: mcp3911: make use of the sign bitMarcus Folkesson1-0/+2
[ Upstream commit 8f89e33bf040bbef66386c426198622180233178 ] The device supports negative values as well. Fixes: 3a89b289df5d ("iio: adc: add support for mcp3911") Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20220722130726.7627-2-marcus.folkesson@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: max1027: unlock on error path in max1027_read_single_value()Dan Carpenter1-3/+3
[ Upstream commit 06ee60eb507f00fb3643876ec05318c63332dc88 ] If max1027_wait_eoc() fails then call iio_device_release_direct_mode() before returning. Fixes: a0e831653ef9 ("iio: adc: max1027: Introduce an end of conversion helper") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/YsbztVuAXnau2cIZ@kili Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ti-tlc4541: Fix alignment for DMA safetyJonathan Cameron1-2/+2
[ Upstream commit 62fa19bf484bfeb52c56b7c6d6a6b1222c597f9c ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to include 'may'. Fixes: ac2bec9d587c ("iio: adc: tlc4541: add support for TI tlc4541 adc") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-40-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ti-ads8688: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit a2105d87eb8eb03591515df10102e04a1c9e0e46 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 3e87e7838328 ("iio: adc: Add TI ADS8688") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-39-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ti-ads8344: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit 8966b11e5a14aaabc747ee97a7942fd50a681402 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-38-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ti-ads7950: Fix alignment for DMA safetyJonathan Cameron1-2/+2
[ Upstream commit dd54ba8b2469f6ae665c529623a9454ce5293ca8 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to include 'may'. Fixes: 902c4b2446d4 ("iio: adc: New driver for TI ADS7950 chips") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: David Lechner <david@lechnology.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-37-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ti-ads131e08: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit 55afdd050c063ae4b8dbd566107a030c00d005fd ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: d935eddd2799 ("iio: adc: Add driver for Texas Instruments ADS131E0x ADC family") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Tomislav Denis <tomislav.denis@avl.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-36-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ti-ads124s08: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit 7df19bd26cc0b85ff997cc9e2aaea712836b5460 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: e717f8c6dfec ("iio: adc: Add the TI ads124s08 ADC code") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-35-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ti-adc161s626: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit 3a828f204a110dc9f253c4cf3c1103d00a0681da ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 4d671b71beef ("iio: adc: ti-adc161s626: add support for TI 1-channel differential ADCs") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Matt Ranostay <mranostay@gmail.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-34-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ti-adc128s052: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit 23c81e7a7e5204a08b553d07362d3082926663b8 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 913b86468674 ("iio: adc: Add TI ADC128S052") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-33-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ti-adc12138: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit 76890c3bce6003caf53b283c49a210280cb8ea33 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 50a6edb1b6e0 ("iio: adc: add ADC12130/ADC12132/ADC12138 ADC driver") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Akinobu Mita <akinobu.mita@gmail.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-32-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ti-adc108s102: Fix alignment for DMA safetyJonathan Cameron1-2/+2
[ Upstream commit 6909fe17888b66ea53ebb15640f82b97daa587a0 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Dual fixes tags as two cases that were introduced in different patches. One of those patches is a fix however and likely to have been backported to stable kernels. Note the second alignment marking is likely to be unnecessary, but is left for now to keep this fix simple. Fixes: 3691e5a69449 ("iio: adc: add driver for the ti-adc084s021 chip") Fixes: cbe5c6977604 ("iio: adc: ti-adc108s102: Fix alignment of buffer pushed to iio buffers.") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-31-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ti-adc084s021: Fix alignment for DMA safetyJonathan Cameron1-2/+2
[ Upstream commit bb102fd600d1d6c0020a4514197c0604c4a218d9 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to include 'may'. Fixes: 3691e5a69449 ("iio: adc: add driver for the ti-adc084s021 chip") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Acked-by: Mårten Lindahl <marten.lindahl@axis.com> Link: https://lore.kernel.org/r/20220508175712.647246-30-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ti-adc0832: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit 1e6bb81c23a84a078736a0f2a52bd765863e94ed ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: efc945fb729c ("iio: adc: add support for ADC0831/ADC0832/ADC0834/ADC0838 chips") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Akinobu Mita <akinobu.mita@gmail.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-29-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: mcp320x: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit e770f78036ce4327caf285873f4b20564a8b4f0f ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Worth noting the fixes tag refers to the same issue being observed on a platform that probably had only 64 byte cachelines. Fixes: 0e81bc99a082 ("iio: mcp320x: Fix occasional incorrect readings") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Michael Welling <mwelling@ieee.org> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-28-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: max1241: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit 9d7019e43ee67a48cef63f8f23f002233064d390 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 8a80a71d9020 ("iio: adc: Add MAX1241 driver") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Alexandru Lazar <alazar@startmail.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-27-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: max1118: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit f746ab0bac5b335b09143dcd01db6f9f26d0c9ec ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: a9e9c7153e96 ("iio: adc: add max1117/max1118/max1119 ADC driver") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Akinobu Mita <akinobu.mita@gmail.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-26-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: max11100: Fix alignment for DMA safetyJonathan Cameron1-2/+2
[ Upstream commit 51f30d63145cc84cb8a8e0ec96f9a8b73e6b5448 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to include 'may'. Fixes: a8e7e88df9ec ("iio: adc: Add Maxim MAX11100 driver") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Jacopo Mondi <jacopo@jmondi.org> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-25-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: max1027: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit e754fb7e7a05e3838c9aa044b4114869dd0d1e17 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: fc167f624833 ("iio: add support of the max1027") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-24-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ltc2497: Fix alignment for DMA safetyJonathan Cameron1-2/+2
[ Upstream commit 6ebf401d555ee1e75e779b865d38e171db0aa1f2 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to include 'may'. Fixes: bc82222fcca1 ("iio:adc: Driver for Linear Technology LTC2497 ADC") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Michael Hennerich <michael.hennerich@analog.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-23-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ltc2496: Fix alignment for DMA safetyJonathan Cameron1-2/+2
[ Upstream commit 1673b7ca2dc1fb3b8d7c94a112496c02d34ae449 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to include 'may'. Fixes: e4c5c4dfaa88 ("iio: adc: new driver to support Linear technology's ltc2496") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-22-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: hi8435: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit 48e4ae96b0b10f93de23b86fd34e573c44e95ab3 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 72aa29ce0a59 ("iio: adc: hi8435: Holt HI-8435 threshold detector") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-21-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ad7949: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit 9c6c7eff7d4a53efd4d0818f8664259a1862665a ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Note the fixes tag predates some changes to this line of code so automated application of this fix may fail. Fixes: 7f40e0614317 ("iio:adc:ad7949: Add AD7949 ADC driver family") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Charles-Antoine Couret <charles-antoine.couret@essensium.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-20-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ad7923: Fix alignment for DMA safetyJonathan Cameron1-2/+2
[ Upstream commit 908af45d7057345bc910940a9340f7a1d8935875 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to include 'may'. Note that some other fixes have applied to this line of code that may complicate automated backporting. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Fixes: 0eac259db28f ("IIO ADC support for AD7923") Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-19-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ad7887: Fix alignment for DMA safetyJonathan Cameron1-3/+2
[ Upstream commit b330ea6bc52468e183ced79189ff064f36c64aa7 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to include 'may'. Fixes tag is clearly not where this was introduced but it is very unlikely anyone will back port it past that point. Fixes: 65dd3d3d7a9b ("staging:iio:ad7887: Squash everything into one file") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-18-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ad7768-1: Fix alignment for DMA safetyJonathan Cameron1-2/+2
[ Upstream commit 211f810f8fae05c1f78e531b2b113ea1ab3d1ce7 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to reflect that separate cachelines 'may' be required. Fixes: a5f8c7da3dbe ("iio: adc: Add AD7768-1 ADC basic support") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-17-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ad7766: Fix alignment for DMA safetyJonathan Cameron1-3/+2
[ Upstream commit 009ae227a1dace2d4d27c804e5bd65907e1d0557 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to reflect the fact DMA safety 'may' require separate cachelines. Fixes: aa16c6bd0e09 ("iio:adc: Add support for AD7766/AD7767") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-16-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ad7606: Fix alignment for DMA safetyJonathan Cameron1-2/+2
[ Upstream commit 6268c6eebb13f228d418f9adaca848b3ed5b3cf9 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_ALIGN definition. Update the comment to reflect the fact DMA safety 'may' require separate cachelines. Fixes: 7989b4bb23fe ("iio: adc: ad7616: Add support for AD7616 ADC") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-15-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ad7476: Fix alignment for DMA safetyJonathan Cameron1-3/+2
[ Upstream commit 58b74555afc8affe4ae4f57d396349158433fc80 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to reflect that DMA safety 'may' require separate cachelines. Fixes tag is unlikely to be the actual introdution of the problem but is far enough back to cover any likely backporting. Fixes: 7a28fe3c93d6 ("staging:iio:ad7476: Squash driver into a single file.") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-14-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ad7298: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit 585c9772f883da3ac425e2e8277b2aaceb201f38 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: be7fd3b86ad2 ("iio:adc:ad7298 make the tx and rx buffers __be16") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-13-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ad7292: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit 98295a206d04633bae31f279de11ff7d04724bce ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 506d2e317a0a ("iio: adc: Add driver support for AD7292") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-12-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ad7280a: Fix alignment for DMA safetyJonathan Cameron1-1/+1
[ Upstream commit 4e2008429588b857bbc13d048b67b931a8d84816 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 003f1d48de52 ("staging:iio:adc:ad7280a: Split buff[2] into tx and rx parts") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-11-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: adc: ad7266: Fix alignment for DMA safetyJonathan Cameron1-2/+2
[ Upstream commit b990cdfe7536a8da7e134d516350402981300016 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to reflect that DMA safety 'may' require separate cachelines. Fixes: 54e018da3141 ("iio:ad7266: Mark transfer buffer as __be16") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-10-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17iio: core: Fix IIO_ALIGN and rename as it was not sufficiently largeJonathan Cameron1-3/+4
[ Upstream commit 12c4efe3509b8018e76ea3ebda8227cb53bf5887 ] Discussion of the series: https://lore.kernel.org/all/20220405135758.774016-1-catalin.marinas@arm.com/ mm, arm64: Reduce ARCH_KMALLOC_MINALIGN brought to my attention that our current IIO usage of L1CACHE_ALIGN is insufficient as their are Arm platforms out their with non coherent DMA and larger cache lines at at higher levels of their cache hierarchy. Rename the define to make it's purpose more explicit. It will be used much more widely going forwards (to replace incorrect ____cacheline_aligned markings. Note this patch will greatly reduce the padding on some architectures that have smaller requirements for DMA safe buffers. The history of changing values of ARCH_KMALLOC_MINALIGN via ARCH_DMA_MINALIGN on arm64 is rather complex. I'm not tagging this as fixing a particular patch from that route as it's not clear what to tag. Most recently a change to bring them back inline was reverted because of some Qualcomm Kryo cores with an L2 cache with 128-byte lines sitting above the point of coherency. c1132702c71f Revert "arm64: cache: Lower ARCH_DMA_MINALIGN to 64 (L1_CACHE_BYTES)" That reverts: 65688d2a05de arm64: cache: Lower ARCH_DMA_MINALIGN to 64 (L1_CACHE_BYTES) which refers to the change originally being motivated by Thunder x1 performance rather than correctness. Fixes: 6f7c8ee585e9d ("staging:iio: Add ability to allocate private data space to iio_allocate_device") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-2-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-06-20Merge tag 'iio-fixes-for-5.19a' of ↵Greg Kroah-Hartman8-28/+50
https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next Jonathan writes: 1st set of IIO fixes for the 5.19 cycle. Most of these have been in next for a long time. Unfortunately there was one stray patch in the branch (wasn't a fix), so I've just rebased to remove that. * testing - Fix a missing MODULE_LICENSE() warning by restricting possible build configs. * Various drivers - Fix ordering of iio_get_trigger() being called before iio_trigger_register() * adi,admv1014 - Fix dubious x & !y warning. * adi,axi-adc - Fix missing of_node_put() in error and normal paths. * aspeed,adc - Add missing of_node_put() * fsl,mma8452 - Fix broken probing from device tree. - Drop check on return value of i2c write to device to cause reset as ACK will be missing (device reset before sending it). * fsl,vf610 - Fix documentation of in_conversion_mode ABI. * iio-trig-sysfs - Ensure irq work has finished before freeing the trigger. * invensense,mpu3050 - Disable regulators in error path. * invensense,icm42600 - Fix collision of enum value of 0 with error path where 0 is no match. * renesas,rzg2l_Adc - Add missing fwnode_handle_put() in error path. * rescale - Fix a boolean logic bug for detection of raw + scale affecting an obscure corner case. * semtech,sx9324 - Check return value of read of pin_defs * st,stm32-adc: - Fix interaction across ADC instances for some supported devices. - Drop false spurious IRQ messages. - Fix calibration value handling. If we can't calibrate don't expose the vref_int channel. - Fix maximum clock rate for stm32pm15x * ti,ads131e08 - Add missing fwnode_handle_put() in error paths. * xilinx,ams - Fix variable checked for error from platform_get_irq() * x-powers,axp288 - Overide TS_PIN bias current for boards where it is not correctly initialized. * yamaha,yas530 - Fix inverted check on calibration data being all zeros. * tag 'iio-fixes-for-5.19a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (26 commits) iio:proximity:sx9324: Check ret value of device_property_read_u32_array() iio: accel: mma8452: ignore the return value of reset operation iio: adc: stm32: fix maximum clock rate for stm32mp15x iio: adc: stm32: fix vrefint wrong calibration value handling iio: imu: inv_icm42600: Fix broken icm42600 (chip id 0 value) iio: adc: vf610: fix conversion mode sysfs node name iio: adc: adi-axi-adc: Fix refcount leak in adi_axi_adc_attach_client iio: test: fix missing MODULE_LICENSE for IIO_RESCALE=m iio:humidity:hts221: rearrange iio trigger get and register iio:chemical:ccs811: rearrange iio trigger get and register iio:accel:mxc4005: rearrange iio trigger get and register iio:accel:kxcjk-1013: rearrange iio trigger get and register iio:accel:bma180: rearrange iio trigger get and register iio: afe: rescale: Fix boolean logic bug iio: adc: aspeed: Fix refcount leak in aspeed_adc_set_trim_data iio: adc: stm32: Fix IRQs on STM32F4 by removing custom spurious IRQs message iio: adc: stm32: Fix ADCs iteration in irq handler iio: adc: ti-ads131e08: add missing fwnode_handle_put() in ads131e08_alloc_channels() iio: adc: rzg2l_adc: add missing fwnode_handle_put() in rzg2l_adc_parse_properties() iio: trigger: sysfs: fix use-after-free on remove ...
2022-06-19iio: adc: stm32: fix maximum clock rate for stm32mp15xOlivier Moysan1-1/+1
Change maximum STM32 ADC input clock rate to 36MHz, as specified in STM32MP15x datasheets. Fixes: d58c67d1d851 ("iio: adc: stm32-adc: add support for STM32MP1") Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/20220609095234.375925-1-olivier.moysan@foss.st.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2022-06-19iio: adc: stm32: fix vrefint wrong calibration value handlingOlivier Moysan1-10/+17
If the vrefint calibration is zero, the vrefint channel output value cannot be computed. Currently, in such case, the raw conversion value is returned, which is not relevant. Do not expose the vrefint channel when the output value cannot be computed, instead. Fixes: 0e346b2cfa85 ("iio: adc: stm32-adc: add vrefint calibration support") Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/20220609095856.376961-1-olivier.moysan@foss.st.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2022-06-19iio: adc: adi-axi-adc: Fix refcount leak in adi_axi_adc_attach_clientMiaoqian Lin1-0/+3
of_parse_phandle() returns a node pointer with refcount incremented, we should use of_node_put() on it when not need anymore. Add missing of_node_put() to avoid refcount leak. Fixes: ef04070692a2 ("iio: adc: adi-axi-adc: add support for AXI ADC IP core") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20220524074517.45268-1-linmq006@gmail.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2022-06-19iio: adc: aspeed: Fix refcount leak in aspeed_adc_set_trim_dataMiaoqian Lin1-0/+1
of_find_node_by_name() returns a node pointer with refcount incremented, we should use of_node_put() on it when done. Add missing of_node_put() to avoid refcount leak. Fixes: d0a4c17b4073 ("iio: adc: aspeed: Get and set trimming data.") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20220516075206.34580-1-linmq006@gmail.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2022-06-19iio: adc: stm32: Fix IRQs on STM32F4 by removing custom spurious IRQs messageYannick Brosseau1-10/+0
The check for spurious IRQs introduced in 695e2f5c289bb assumed that the bits in the control and status registers are aligned. This is true for the H7 and MP1 version, but not the F4. The interrupt was then never handled on the F4. Instead of increasing the complexity of the comparison and check each bit specifically, we remove this check completely and rely on the generic handler for spurious IRQs. Fixes: 695e2f5c289b ("iio: adc: stm32-adc: fix a regression when using dma and irq") Signed-off-by: Yannick Brosseau <yannick.brosseau@gmail.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/20220516203939.3498673-3-yannick.brosseau@gmail.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2022-06-19iio: adc: stm32: Fix ADCs iteration in irq handlerYannick Brosseau1-1/+6
The irq handler was only checking the mask for the first ADCs in the case of the F4 and H7 generation, since it was iterating up to the num_irq value. This patch add the maximum number of ADC in the common register, which map to the number of entries of eoc_msk and ovr_msk in stm32_adc_common_regs. This allow the handler to check all ADCs in that module. Tested on a STM32F429NIH6. Fixes: 695e2f5c289b ("iio: adc: stm32-adc: fix a regression when using dma and irq") Signed-off-by: Yannick Brosseau <yannick.brosseau@gmail.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/20220516203939.3498673-2-yannick.brosseau@gmail.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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