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2024-02-19i3c: dw: Disable IBI IRQ depends on hot-join and SIR enablingDylan Hung1-1/+3
Disable IBI IRQ signal and status only when hot-join and SIR enabling of all target devices attached to the bus are disabled. Fixes: e389b1d72a62 ("i3c: dw: Add support for in-band interrupts") Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Link: https://lore.kernel.org/r/20240119054547.983693-1-dylan_hung@aspeedtech.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2024-01-08i3c: master: cdns: Update maximum prescaler value for i2c clockHarshit Shah1-3/+4
As per the Cadence IP document fixed the I2C clock divider value limit from 16 bits instead of 10 bits. Without this change setting up the I2C clock to low frequencies will not work as the prescaler value might be greater than 10 bit number. I3C clock divider value is 10 bits only. Updating the macro names for both. Signed-off-by: Harshit Shah <harshitshah.opendev@gmail.com> Link: https://lore.kernel.org/r/1703927483-28682-1-git-send-email-harshitshah.opendev@gmail.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2024-01-08i3c: master: svc: return actual transfer data lenFrank Li1-0/+8
I3C allow devices early terminate data transfer. So set "actual_len" to indicate how much data get by i3c_priv_xfer. Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231201222532.2431484-6-Frank.Li@nxp.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2024-01-08i3c: master: svc: rename read_len as actual_lenFrank Li1-13/+13
I3C transfer (SDR), target can early terminate read transfer. I3C transfer (HDR), target can end write transfer. I2C transfer, target can NACK write transfer. 'actual_len' is better name than 'read_len'. Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231201222532.2431484-5-Frank.Li@nxp.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2024-01-08i3c: master: svc: add hot join supportFrank Li1-4/+57
Add hot join support for svc master controller. Disable hot join by default. User can use sysfs entry to enable hot join. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231201222532.2431484-3-Frank.Li@nxp.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-11-17i3c: mipi-i3c-hci: Add DMA bounce buffer for private transfersJarkko Nikula3-1/+44
Implement a local bounce buffer for private I3C SDR and I2C transfers when using DMA and the buffer attached to the transfer is not DMA safe. Otherwise the DMA transfer will fail and with following warning: [ 11.411059] i3c mipi-i3c-hci.0: rejecting DMA map of vmalloc memory [ 11.417313] WARNING: CPU: 3 PID: 357 at include/linux/dma-mapping.h:332 hci_dma_queue_xfer+0x2e2/0x300 [mipi_i3c_hci] Strictly speaking private I3C SDR transfers are expected to pass a DMA-able buffer. However I fear this requirement may easily be slipped or go unnoticed when I3C interface support is added into a existing device driver that use regmap API to read/write stack variables. For example this is the case with the commit 2660b0080bb2 ("iio: imu: st_lsm6dsx: add i3c basic support for LSM6DSO and LSM6DSR"). Buffer of an I2C message is not required to be DMA safe and the I2C core provides i2c_(get|put)_dma_safe_msg_buf() helpers for the host controllers that do DMA and that is also recommendation for the i2c_xfers() callback from the I3C core. However due to above I3C private transfers reason I decided to implement a bounce buffer for them and reuse the same code for the I2C transfers too. Since this driver is currently the only I3C host controller driver that can do DMA the implementation is done here and not in I3C core. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20231109133708.653950-5-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-11-17i3c: mipi-i3c-hci: Handle I3C address header error in hci_cmd_v1_daa()Jarkko Nikula1-1/+2
Handle also I3C address header error response status as the end of DAA process in hci_cmd_v1_daa(). According to MIPI I3C HCI Specification v1.1 the NACK error during DAA process comes when the device does not accept the dynamic address. Currently code uses it for successful exit from the process and fails with any other error response. I'm unsure is this MIPI I3C HCI version specific difference or specification misunderstanding but on an early MIPI I3C HCI version compatible controller responds always with I3C address header error and not with NACK error when there is no device on the bus or no more devices participating to DAA process. Handle now both response statuses as the end of DAA. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20231109133708.653950-4-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-11-17i3c: mipi-i3c-hci: Do not overallocate transfers in hci_cmd_v1_daa()Jarkko Nikula1-3/+3
Function hci_cmd_v1_daa() uses only single transfer at a time so no need to allocate two transfers and access can be simplified. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20231109133708.653950-3-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-11-17i3c: mipi-i3c-hci: Report NACK response from CCC command to coreJarkko Nikula1-1/+8
Currently probe of mipi-i3c-hci will fail if bus doesn't have any I3C devices connected. This happens when CCC commands that are sent during i3c_master_bus_init() are not ACKed by any device and controller responds with an error status set. The controller can detect NACK both during I3C address header transmission (broadcast address 0x7e is not ACKed) and when target device address or dynamic address assignment is NACKed. Former as error status 0x4: Address Header Error and latter as 0x5: NACK. Difference between those two NACK statuses were not described explicitly until MIPI I3C HCI Specification v1.1. Earlier versions share the same error status code though. Report both of those as I3C_ERROR_M2 to I3C core code. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20231109133708.653950-2-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-11-04i3c: master: mipi-i3c-hci: Fix a kernel panic for accessing DAT_data.Billy Tsai1-10/+19
The `i3c_master_bus_init` function may attach the I2C devices before the I3C bus initialization. In this flow, the DAT `alloc_entry`` will be used before the DAT `init`. Additionally, if the `i3c_master_bus_init` fails, the DAT `cleanup` will execute before the device is detached, which will execue DAT `free_entry` function. The above scenario can cause the driver to use DAT_data when it is NULL. Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> Link: https://lore.kernel.org/r/20231023080237.560936-1-billy_tsai@aspeedtech.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-11-03i3c: master: svc: fix compatibility string mismatch with binding docFrank Li1-1/+1
In the binding documentation, the compatible string is specified as 'silvaco,i3c-master-v1', but in the driver, it is defined as 'silvaco,i3c-master'. Rename 'silvaco,i3c-master' to 'silvaco,i3c-master-v1' to ensure compatibility with the documentation. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231017194657.3199749-1-Frank.Li@nxp.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-11-03i3c: master: svc: fix random hot join failure since timeout errorFrank Li1-0/+9
master side report: silvaco-i3c-master 44330000.i3c-master: Error condition: MSTATUS 0x020090c7, MERRWARN 0x00100000 BIT 20: TIMEOUT error The module has stalled too long in a frame. This happens when: - The TX FIFO or RX FIFO is not handled and the bus is stuck in the middle of a message, - No STOP was issued and between messages, - IBI manual is used and no decision was made. The maximum stall period is 100 μs. This can be considered as being just a warning as the system IRQ latency can easily be greater than 100us. Fixes: dd3c52846d59 ("i3c: master: svc: Add Silvaco I3C master driver") Cc: <stable@vger.kernel.org> Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20231023161658.3890811-7-Frank.Li@nxp.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-11-03i3c: master: svc: fix SDA keep low when polling IBIWON timeout happenFrank Li1-0/+1
Upon IBIWON timeout, the SDA line will always be kept low if we don't emit a stop. Calling svc_i3c_master_emit_stop() there will let the bus return to idle state. Fixes: dd3c52846d59 ("i3c: master: svc: Add Silvaco I3C master driver") Cc: <stable@vger.kernel.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231023161658.3890811-6-Frank.Li@nxp.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-11-03i3c: master: svc: fix check wrong status register in irq handlerFrank Li1-1/+1
svc_i3c_master_irq_handler() wrongly checks register SVC_I3C_MINTMASKED. It should be SVC_I3C_MSTATUS. Fixes: dd3c52846d59 ("i3c: master: svc: Add Silvaco I3C master driver") Cc: <stable@vger.kernel.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231023161658.3890811-5-Frank.Li@nxp.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-11-03i3c: master: svc: fix ibi may not return mandatory data byteFrank Li1-0/+8
MSTATUS[RXPEND] is only updated after the data transfer cycle started. This creates an issue when the I3C clock is slow, and the CPU is running fast enough that MSTATUS[RXPEND] may not be updated when the code reaches checking point. As a result, mandatory data can be missed. Add a wait for MSTATUS[COMPLETE] to ensure that all mandatory data is already in FIFO. It also works without mandatory data. Fixes: dd3c52846d59 ("i3c: master: svc: Add Silvaco I3C master driver") Cc: <stable@vger.kernel.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231023161658.3890811-4-Frank.Li@nxp.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-11-03i3c: master: svc: fix wrong data return when IBI happen during start frameFrank Li1-0/+20
┌─────┐ ┏──┐ ┏──┐ ┏──┐ ┏──┐ ┏──┐ ┏──┐ ┏──┐ ┏──┐ ┌───── SCL: ┘ └─────┛ └──┛ └──┛ └──┛ └──┛ └──┛ └──┛ └──┛ └──┘ ───┐ ┌─────┐ ┌─────┐ ┌───────────┐ SDA: └───────────────────────┘ └─────┘ └─────┘ └───── xxx╱ ╲╱ ╲╱ ╲╱ ╲╱ ╲ : xxx╲IBI ╱╲ Addr(0x0a) ╱╲ RW ╱╲NACK╱╲ S ╱ If an In-Band Interrupt (IBI) occurs and IBI work thread is not immediately scheduled, when svc_i3c_master_priv_xfers() initiates the I3C transfer and attempts to send address 0x7e, the target interprets it as an IBI handler and returns the target address 0x0a. However, svc_i3c_master_priv_xfers() does not handle this case and proceeds with other transfers, resulting in incorrect data being returned. Add IBIWON check in svc_i3c_master_xfer(). In case this situation occurs, return a failure to the driver. Fixes: dd3c52846d59 ("i3c: master: svc: Add Silvaco I3C master driver") Cc: <stable@vger.kernel.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231023161658.3890811-3-Frank.Li@nxp.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-11-03i3c: master: svc: fix race condition in ibi work threadFrank Li1-0/+14
The ibi work thread operates asynchronously with other transfers, such as svc_i3c_master_priv_xfers(). Introduce mutex protection to ensure the completion of the entire i3c/i2c transaction. Fixes: dd3c52846d59 ("i3c: master: svc: Add Silvaco I3C master driver") Cc: <stable@vger.kernel.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231023161658.3890811-2-Frank.Li@nxp.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-10-10i3c: Fix typo "Provisional ID" to "Provisioned ID"Matt Johnston1-1/+1
The MIPI I3C spec refers to a Provisioned ID, since it is (sometimes) provisioned at device manufacturing. Signed-off-by: Matt Johnston <matt@codeconstruct.com.au> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20231003075339.197099-1-matt@codeconstruct.com.au Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-26i3c: mipi-i3c-hci: Resume controller after aborted transferJarkko Nikula1-1/+3
Host Controller goes to halt state after aborted transfer and needs to be resumed by SW. Add this resuming to DMA mode code too. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20230921055704.1087277-13-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-26i3c: mipi-i3c-hci: Resume controller explicitlyJarkko Nikula1-2/+1
On an HW I'm using in enabling work the RESUME bit is not set in the HC_CONTROLLER register when Host Controller goes to halt state. Value 1 should mean controller is suspended when reading and writing 1 resumes it. Because of this erratic behaviour plain HC_CONTROL read and write back won't resume the controller. Therefore do it by setting the RESUME bit explicitly. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20230921055704.1087277-12-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-26i3c: mipi-i3c-hci: Fix missing xfer->completion in hci_cmd_v1_daa()Jarkko Nikula1-0/+1
Due to missing completion object for the ENTDAA command transfer in the hci_cmd_v1_daa() the wait_for_completion_timeout() will obviously timeout even the transfer itself may succeed. Fix this by setting the xfer->completion to the already initialized completion object. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20230921055704.1087277-11-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-26i3c: mipi-i3c-hci: Do not unmap region not mapped for transferJarkko Nikula1-0/+2
Fix following warning (with CONFIG_DMA_API_DEBUG) which happens with a transfer without a data buffer. DMA-API: i3c mipi-i3c-hci.0: device driver tries to free DMA memory it has not allocated [device address=0x0000000000000000] [size=0 bytes] For those transfers the hci_dma_queue_xfer() doesn't create a mapping and the DMA address pointer xfer->data_dma is not set. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20230921055704.1087277-10-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-26i3c: mipi-i3c-hci: Set number of SW enabled Ring Bundles earlierJarkko Nikula1-2/+3
Number of software enabled Ring Bundles must be set before using them. Otherwise Ring will not start and may be power-gated by the Host Controller. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20230921055704.1087277-9-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-26i3c: mipi-i3c-hci: Fix race between bus cleanup and interruptJarkko Nikula1-0/+2
If there is a transfer error during i3c_master_bus_init() and code goes doing the bus cleanup in i3c_hci_bus_cleanup() there is possibility that i3c_hci_irq_handler() is running in parallel with hci->io->cleanup() which can be racy. Prevent this by waiting there is no pending interrupt on other CPU before doing the IO cleanup. This was observed with ring headers where first transfer failed and sometimes transfer error or ring transfer abort interrupt was coming simultaneously with the bus cleanup path. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20230921055704.1087277-8-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-26i3c: mipi-i3c-hci: Set ring start request together with enableJarkko Nikula1-1/+2
Set ring start request together with ring enable in hci_dma_init(). This causes the ring abort request in hci_dma_dequeue_xfer() will raise the INTR_RING_OP (RING_OP_STAT in MIPI I3C HCI specification) interrupt in the RH_INTR_STATUS register. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20230921055704.1087277-7-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-26i3c: mipi-i3c-hci: Remove BUG() when Ring Abort request times outJarkko Nikula1-2/+1
Ring Abort request will timeout in case there is an error in the Host Controller interrupt delivery or Ring Header configuration. Using BUG() makes hard to debug those cases. Make it less severe and turn BUG() to WARN_ON(). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20230921055704.1087277-6-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-26i3c: mipi-i3c-hci: Fix out of bounds access in hci_dma_irq_handlerJarkko Nikula1-1/+1
Do not loop over ring headers in hci_dma_irq_handler() that are not allocated and enabled in hci_dma_init(). Otherwise out of bounds access will occur from rings->headers[i] access when i >= number of allocated ring headers. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20230921055704.1087277-5-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-26i3c: mipi-i3c-hci: Fix DAT/DCT entry sizesJarkko Nikula1-4/+4
MIPI I3C HCI specification v1.1 describes the ENTRY_SIZE field for the Device Address Table (DAT) and the Device Characteristics Table (DCT) section offset registers (DAT_SECTION_OFFSET and DCT_SECTION_OFFSET). That field is not documented in earlier version. ENTRY_SIZE value 0 is meant to be backward compatible. For the DAT entry size it is interpreted as 2 DWORDs (8-bytes) and for the DCT entry size as 4 DWORDs (16-bytes). Values 1-15 are reserved for future use. New version I believe fixes also the TABLE_SIZE field description. Before it was defined in DWORDs which I believe is incorrect since the DAT/DCT table entry structures, and sizes, are described having 8-bytes/16-bytes entries. This is more clear in the specification v1.1 which states the TABLE_SIZE fields are interpreted as number of entries in the DAT/DCT tables. I believe this same holds also in earlier version, at least it makes more sense. Fix code accordingly and let the DAT_entry_size and the DCT_entry_size variables carry the size as bytes. Which is how it is already interpreted in the dat_v1.c: hci_dat_v1_init(). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20230921055704.1087277-4-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-26i3c: mipi-i3c-hci: Add MODULE_ALIASJarkko Nikula1-0/+1
Add MODULE_ALIAS() in order to be able to autoload this driver when the device is added as a platform device from another glue code driver. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20230921055704.1087277-3-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-26i3c: svc: Annotate struct svc_i3c_xfer with __counted_byKees Cook1-1/+1
Prepare for the coming implementation by GCC and Clang of the __counted_by attribute. Flexible array members annotated with __counted_by can have their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family functions). As found with Coccinelle[1], add __counted_by for struct svc_i3c_xfer. [1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Conor Culhane <conor.culhane@silvaco.com> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: linux-i3c@lists.infradead.org Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20230922175023.work.239-kees@kernel.org Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-26i3c/master/mipi-i3c-hci: Annotate struct hci_rings_data with __counted_byKees Cook1-1/+1
Prepare for the coming implementation by GCC and Clang of the __counted_by attribute. Flexible array members annotated with __counted_by can have their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family functions). As found with Coccinelle[1], add __counted_by for struct hci_rings_data. [1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Nicolas Pitre <npitre@baylibre.com> Cc: Len Baker <len.baker@gmx.com> Cc: Boris Brezillon <boris.brezillon@collabora.com> Cc: linux-i3c@lists.infradead.org Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20230922175019.work.129-kees@kernel.org Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-26i3c: master: cdns: Annotate struct cdns_i3c_xfer with __counted_byKees Cook1-1/+1
Prepare for the coming implementation by GCC and Clang of the __counted_by attribute. Flexible array members annotated with __counted_by can have their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family functions). As found with Coccinelle[1], add __counted_by for struct cdns_i3c_xfer. [1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci Cc: "Przemysław Gaj" <pgaj@cadence.com> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: linux-i3c@lists.infradead.org Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20230922175014.work.637-kees@kernel.org Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-26i3c: dw: Annotate struct dw_i3c_xfer with __counted_byKees Cook1-1/+1
Prepare for the coming implementation by GCC and Clang of the __counted_by attribute. Flexible array members annotated with __counted_by can have their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family functions). As found with Coccinelle[1], add __counted_by for struct dw_i3c_xfer. [1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Jeremy Kerr <jk@codeconstruct.com.au> Cc: Joel Stanley <joel@jms.id.au> Cc: linux-i3c@lists.infradead.org Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Jeremy Kerr <jk@codeconstruct.com.au> Link: https://lore.kernel.org/r/20230922175011.work.800-kees@kernel.org Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-26i3c: master: cdns: Fix reading status registerJoshua Yeong1-3/+3
IBIR_DEPTH and CMDR_DEPTH should read from status0 instead of status1. Cc: stable@vger.kernel.org Fixes: 603f2bee2c54 ("i3c: master: Add driver for Cadence IP") Signed-off-by: Joshua Yeong <joshua.yeong@starfivetech.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20230913031743.11439-2-joshua.yeong@starfivetech.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-09-06i3c: master: svc: fix probe failure when no i3c device existFrank Li1-2/+12
I3C masters are expected to support hot-join. This means at initialization time we might not yet discover any device and this should not be treated as a fatal error. During the DAA procedure which happens at probe time, if no device has joined, all CCC will be NACKed (from a bus perspective). This leads to an early return with an error code which fails the probe of the master. Let's avoid this by just telling the core through an I3C_ERROR_M2 return command code that no device was discovered, which is a valid situation. This way the master will no longer bail out and fail to probe for a wrong reason. Cc: stable@vger.kernel.org Fixes: dd3c52846d59 ("i3c: master: svc: Add Silvaco I3C master driver") Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20230831141324.2841525-1-Frank.Li@nxp.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-08-28i3c: master: svc: Describe member 'saved_regs'Miquel Raynal1-0/+1
The 'saved_regs' member of the 'svc_i3c_master' structure is not described in the kernel doc, which produces the following warning: Function parameter or member 'saved_regs' not described in 'svc_i3c_master' Add the missing line in the kernel documentation of the parent structure. Fixes: 1c5ee2a77b1b ("i3c: master: svc: fix i3c suspend/resume issue") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202308171435.0xQ82lvu-lkp@intel.com/ Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20230817101853.16805-1-miquel.raynal@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-08-10i3c: master: svc: Do not check for 0 return after calling platform_get_irq()Ruan Jinjie1-2/+2
It is not possible for platform_get_irq() to return 0. Use the return value from platform_get_irq(). Signed-off-by: Ruan Jinjie <ruanjinjie@huawei.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20230803085149.149248-1-ruanjinjie@huawei.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-08-10i3c/master: cmd_v1: Fix the exit criteria for the daa procedureBilly Tsai1-1/+1
The exit criteria for the DAA should check if the data length is equal to 1, instead of checking if the response status is equal to 1. Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> Link: https://lore.kernel.org/r/20230802100909.2568215-1-billy_tsai@aspeedtech.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-07-28i3c: Explicitly include correct DT includesRob Herring2-2/+0
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Jeremy Kerr <jk@codeconstruct.com.au> Link: https://lore.kernel.org/r/20230714174623.4057784-1-robh@kernel.org Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-06-05i3c: master: svc: add NACK check after start byte sentClark Wang1-0/+6
Add NACK check after start byte is sent. It is possible to detect early that a device is not on the bus and avoid invalid transmissions thereafter. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20230517033030.3068085-3-xiaoning.wang@nxp.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-06-05i3c: master: svc: fix cpu schedule in spin lockClark Wang1-9/+10
pm_runtime_resume_and_get() may call sleep(). It cannot be used in svc_i3c_master_start_xfer_locked(), because it is in a spin lock. Move the pm runtime operations to svc_i3c_master_enqueue_xfer(). Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Fixes: 05be23ef78f7 ("i3c: master: svc: add runtime pm support") Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20230517033030.3068085-2-xiaoning.wang@nxp.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-06-05i3c: master: svc: fix i3c suspend/resume issueClark Wang1-0/+26
When system suspends, if i3c module is powered down, register value will lose. Need to save the key registers before system suspend. So save these registers value in runtime pm suspend, and restore them if these register's value is different with the saved values when runtime pm resume. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20230517033030.3068085-1-xiaoning.wang@nxp.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-05-01i3c: ast2600: set variable ast2600_i3c_ops storage-class-specifier to staticTom Rix1-1/+1
smatch reports drivers/i3c/master/ast2600-i3c-master.c:121:34: warning: symbol 'ast2600_i3c_ops' was not declared. Should it be static? This variable is only used in its defining file, so it should be static. Signed-off-by: Tom Rix <trix@redhat.com> Reviewed-by: Jeremy Kerr <jk@codeconstruct.com.au> Link: https://lore.kernel.org/r/20230429134601.2688558-1-trix@redhat.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-04-28i3c: ast2600: fix register setting for 545 ohm pullupsJeremy Kerr1-2/+2
The 2k register setting is zero, OR-ing it in doesn't parallel the 2k and 750 ohm pullups. We need a separate value for the 545 ohm setting. Reported-by: Lukwinski Zbigniew <zbigniew.lukwinski@linux.intel.com> Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au> Link: https://lore.kernel.org/r/20230428001849.1775559-1-jk@codeconstruct.com.au Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-04-28i3c: ast2600: enable IBI supportJeremy Kerr1-0/+21
The ast2600 i3c hardware is capable of IBIs, but we need a workaround for a hardware issue with the I3C state machine handling IBI payloads of specific lengths when PEC is not enabled. To avoid this, we need to unconditionally enable PECs, at the consquence of losing a byte of data when the device does not send a PEC. Enable IBIs on the ast2600 platform, including an implementation of the PEC workaround, which prints a warning when triggered. Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/ba923b96d6d129024c975e8a0472c5b2fcb3af32.1680161823.git.jk@codeconstruct.com.au Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-04-28i3c: dw: Add a platform facility for IBI PEC workaroundsJeremy Kerr2-0/+29
On the AST2600 i3c controller, we'll need to apply a workaround for a hardware issue with IBI payloads. Introduce a platform hook to allow dw i3c platform implementations to modify the DAT entry in IBI enable/disable to allow this workaround in a future change. Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/d5d76a8d2336d2a71886537f42e71d51db184df6.1680161823.git.jk@codeconstruct.com.au Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-04-28i3c: dw: Add support for in-band interruptsJeremy Kerr2-3/+289
This change adds support for receiving and dequeueing i3c IBIs. By setting struct dw_i3c_master->ibi_capable before probe, a platform implementation can select the IBI-enabled version of the i3c_master_ops, enabling the global IBI infrastrcture for that controller. Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/79daeefd7ccb7c935d0c159149df21a6c9a73ffa.1680161823.git.jk@codeconstruct.com.au Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-04-28i3c: dw: Turn DAT array entry into a structJeremy Kerr2-12/+21
In an upcoming change, we will want to store additional data about the devices we have in the data address table. Change the type of the DAT entries into a struct, which currently just has the address data. Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/9dc0d9e2857e851a0cf04819df48e5d31921f83e.1680161823.git.jk@codeconstruct.com.au Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-04-28i3c: dw: Create a generic fifo read functionJeremy Kerr1-4/+10
In a future change we'll want to read from the IBI FIFO too, so turn dw_i3c_read_rx_fifo() into a generic read with the FIFO register as a parameter. Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/827204789583dd86addffb47ecaeab9d67cf95d5.1680161823.git.jk@codeconstruct.com.au Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-04-28i3c: ast2600: Add AST2600 platform-specific driverJeremy Kerr3-0/+183
Now that we have platform-specific infrastructure for the dw i3c driver, add platform support for the ASPEED AST2600 SoC. The AST2600 has a small set of "i3c global" registers, providing platform-level i3c configuration outside of the i3c core. For the ast2600, we need a couple of extra setup operations: - on probe: find the i3c global register set and parse the SDA pullup resistor values - on init: set the pullups accordingly, and set the i3c instance IDs Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20230331091501.3800299-4-jk@codeconstruct.com.au Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-15 09:23:41 +0300