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path: root/drivers/gpu
AgeCommit message (Expand)AuthorFilesLines
2016-10-05drm/prime: Take a ref on the drm_dev when exporting a dma_bufChris Wilson5-5/+33
2016-10-05drm/prime: Pass the right module owner through to dma_buf_export()Chris Wilson1-7/+10
2016-10-05drm/bridge: Call drm_connector_cleanup directlyMarek Vasut3-18/+3
2016-10-05drm: simple_kms_helper: Add prepare_fb and cleanup_fb hooksMarek Vasut1-0/+26
2016-10-05drm: Release resources with a safer functionChristophe JAILLET1-2/+2
2016-10-05drm/i915: Sort DEV_INFO_FOR_EACH_FLAGJoonas Lahtinen1-18/+20
2016-10-05drm/i915: Reduce trickery in DEV_INFO_FOR_EACH_FLAGJoonas Lahtinen4-68/+54
2016-10-05drm/i915: Allow DP to work w/o EDIDVille Syrjälä1-13/+9
2016-10-05drm/i915: Move long hpd handling into the hotplug workVille Syrjälä1-25/+23
2016-10-05drm/i915: Show waiters in i915_hangcheck_infoChris Wilson1-0/+12
2016-10-05drm/i915: Show RING registers through debugfsChris Wilson4-108/+179
2016-10-05drm/i915: Show bounds of active request in the ring on GPU hangChris Wilson2-2/+10
2016-10-05drm/i915: Double check hangcheck.seqno after resetChris Wilson1-0/+3
2016-10-05drm/i915: Disable irqs across GPU resetChris Wilson2-2/+19
2016-10-05drm/i915/execlists: Move clearing submission count from reset to initChris Wilson1-4/+5
2016-10-05drm/i915/execlists: Reinitialise context image after GPU hangChris Wilson1-41/+62
2016-10-05drm/i915: Share the computation of ring size for RING_CTL registerChris Wilson3-4/+4
2016-10-04drm/amdgpu/virtual_dce: adjust config ifdefAlex Deucher1-2/+2
2016-10-04drm/amdgpu/vce: add support for hw config packet (v2)Alex Deucher1-0/+14
2016-10-04drm/amdgpu: clean up to set fw_offset as 0 twiceHuang Rui1-1/+0
2016-10-04drm/amdgpu: remove DRM_AMD_POWERPLAYAlex Deucher5-25/+1
2016-10-04drm/radeon: Prevent races on pre DCE4 between flip submission and completion.Mario Kleiner3-10/+14
2016-10-04drm/radeon: Slightly more robust flip completion handling for < DCE-4Mario Kleiner1-8/+22
2016-10-04drm/i915: silence io mapping/unmapping sparse warnings on different address s...Jani Nikula1-2/+2
2016-10-04drm/i915: make skl_ddb_add_affected_planes staticJani Nikula1-1/+1
2016-10-04drm/i915: Inline binary searchTvrtko Ursulin1-25/+31
2016-10-04drm/i915: Use binary search when looking for shadowed registersTvrtko Ursulin1-5/+21
2016-10-04drm/i915: Sort the shadow register tableTvrtko Ursulin1-6/+26
2016-10-04drm/i915: Remove identical write mmmio functionsTvrtko Ursulin1-75/+19
2016-10-04drm/i915: Remove identical mmio read functionsTvrtko Ursulin1-44/+10
2016-10-04drm/i915: Remove identical macrosTvrtko Ursulin1-50/+20
2016-10-04drm/i915: Store the active forcewake range table pointerTvrtko Ursulin2-34/+44
2016-10-04drm/i915: Eliminate Gen9 special caseTvrtko Ursulin1-21/+21
2016-10-04drm/i915: Use binary search when looking up forcewake domainsTvrtko Ursulin1-8/+19
2016-10-04drm/i915: Sort forcewake mapping tablesTvrtko Ursulin1-13/+43
2016-10-04drm/i915: Data driven register to forcewake domains lookupTvrtko Ursulin1-109/+103
2016-10-04drm/i915: Do not inline forcewake taking in mmio accessorsTvrtko Ursulin1-10/+14
2016-10-04drm/i915: Keep track of active forcewake domains in a bitmaskTvrtko Ursulin2-31/+25
2016-10-04drm/i915: Remove redundant hsw_write* mmio functionsTvrtko Ursulin1-24/+1
2016-10-04drm/i915: workaround sparse warning on variable length arraysJani Nikula1-1/+1
2016-10-04drm/i915: keep CONFIG_DRM_FBDEV_EMULATION=n function stubs togetherJani Nikula2-6/+4
2016-10-04drm/rockchip: analogix_dp: Refuse to enable PSR if panel doesn't support itTomeu Vizoso1-0/+3
2016-10-04drm/bridge: analogix_dp: Add analogix_dp_psr_supportedTomeu Vizoso1-0/+8
2016-10-04drm: Document caveats around atomic event handlingDaniel Vetter1-2/+30
2016-10-04drm: Simplify drm_printk to reduce object size quite a bitJoe Perches1-2/+3
2016-10-04drm/i915: Account for sink max TMDS clock when checking the port clockVille Syrjälä1-1/+8
2016-10-04drm/i915: Replace a bunch of connector->base.display_info with a local variableVille Syrjälä1-7/+7
2016-10-04drm/edid: Move dvi_dual/max_tmds_clock parsing out from drm_edid_to_eld()Ville Syrjälä1-29/+35
2016-10-04drm/edid: Clear the old cea_rev when there's no CEA extension in the new EDIDVille Syrjälä1-0/+1
2016-10-04drm/edid: Reduce the number of times we parse the CEA extension blockVille Syrjälä1-97/+88
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