summaryrefslogtreecommitdiff
path: root/drivers/gpu
AgeCommit message (Collapse)AuthorFilesLines
2021-03-31gpu: host1x: Cleanup and refcounting for syncpointsMikko Perttunen13-54/+91
Add reference counting for allocated syncpoints to allow keeping them allocated while jobs are referencing them. Additionally, clean up various places using syncpoint IDs to use host1x_syncpt pointers instead. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-31drm/i915: Fix docbook header for __intel_runtime_pm_get_if_active()Imre Deak1-1/+1
Fix the Documentation/gpu/i915:22: /drivers/gpu/drm/i915/intel_runtime_pm.c:423: WARNING: Inline strong start-string without end-string. warning from the htmldocs build. Fixes: 9d58aa46291d ("drm/i915: Fix the GT fence revocation runtime PM logic") Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Imre Deak <imre.deak@intel.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210330150118.1105079-1-imre.deak@intel.com
2021-03-31drm/displayid: rename displayid_hdr to displayid_headerJani Nikula1-5/+5
Avoid any confusion with High Dynamic Range. No functional changes. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ce083bd2789c7e22a91710726162287db88e3f6c.1617024940.git.jani.nikula@intel.com
2021-03-31drm/displayid: allow data blocks with 0 payload lengthJani Nikula1-2/+1
The DisplayID specifications explicitly call out 0 as a valid payload length for data blocks. The mere presence of a data block, or the information coded in the block specific data (bits 7:3 in offset 1), may be enough to convey the necessary information. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/d562dff99ba7c92accb654a99b433bed471e8507.1617024940.git.jani.nikula@intel.com
2021-03-31drm/edid: use the new displayid iterator for tile infoJani Nikula2-33/+10
Neatly reduce displayid boilerplate in code. Remove excessive debug logging while at it, no other functional changes. The old displayid iterator becomes unused; remove it as well as make drm_find_displayid_extension() static. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/fa4b5c790b5bdd82063545a6f209f8e9d78a63a7.1617024940.git.jani.nikula@intel.com
2021-03-31drm/edid: use the new displayid iterator for finding CEA extensionJani Nikula1-16/+9
Neatly reduce displayid boilerplate in code. No functional changes. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/e50f876cecbfee369da887ad19350eee0d89b87f.1617024940.git.jani.nikula@intel.com
2021-03-31drm/edid: use the new displayid iterator for detailed modesJani Nikula1-17/+6
Neatly reduce displayid boilerplate in code. No functional changes. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f6c69c545c553c4a616887540660a4b8aecf0f7f.1617024940.git.jani.nikula@intel.com
2021-03-31drm/displayid: add new displayid section/block iteratorsJani Nikula1-0/+74
Iterating DisplayID blocks across sections (in EDID extensions) is unnecessarily complicated for the caller. Implement DisplayID iterators to go through all blocks in all sections. Usage example: const struct displayid_block *block; struct displayid_iter iter; displayid_iter_edid_begin(edid, &iter); displayid_iter_for_each(block, &iter) { /* operate on block */ } displayid_iter_end(&iter); When DisplayID is stored in EDID extensions, the DisplayID sections map to extensions as described in VESA DisplayID v1.3 Appendix B: DisplayID as an EDID Extension. This is implemented here. When DisplayID is stored in its dedicated DDC device 0xA4, according to VESA E-DDC v1.3, different rules apply for the structure. This is not implemented here, as we don't currently use it, but the idea is you'd have a different call for beginning the iteration, for example simply: displayid_iter_begin(displayid, &iter); instead of displayid_iter_edid_begin(), and everything else would be hidden away in the iterator functions. v2: - sizeof(struct displayid_block) -> sizeof(*block) (Ville) - remove __ prefix from displayid_iter_block Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/da3dead1752ab16c061f7bd248ac1a4268f7fefb.1617024940.git.jani.nikula@intel.com
2021-03-31drm/displayid: add separate drm_displayid.cJani Nikula3-57/+62
We'll be adding more DisplayID specific functions going forward, so start off by splitting out a few functions to a separate file. We don't bother with exporting the functions; at least for now they should be needed solely within drm.ko. No functional changes. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/07942d5011891b8e8f77245c78b34f4af97a9315.1617024940.git.jani.nikula@intel.com
2021-03-31drm/edid: make a number of functions, parameters and variables constJani Nikula1-29/+29
If there's no need to change it, it should be const. There's more to be done, but start off with changes that make follow-up work easier. No functional changes. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/41722f92ef81cd6adf65f936fcc5301418e1f94b.1617024940.git.jani.nikula@intel.com
2021-03-31drm/mediatek: Add missing MODULE_DEVICE_TABLE()Boris Brezillon6-0/+7
This patch adds the missing MODULE_DEVICE_TABLE definitions on different Mediatek drivers which generates correct modalias for automatic loading when these drivers are compiled as an external module. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2021-03-31drm/i915/hdcp: Add DP HDCP2.2 timeout to read entire msgAnshuman Gupta1-13/+32
As documented in HDCP 2.2 DP Errata spec transmitter should abort the authentication protocol in case transmitter has not received the entire {AKE_Send_Cert, AKE_Send_H_prime, AKE_Send_Paring_Info} msg within {110,7,5} miliseconds. Adding above msg timeout values and aborting the HDCP authentication in case it timedout to read entire msg. https://www.digital-cp.com/sites/default/files/HDCP%202_2_DisplayPort_Errata_v3_0.pdf v2: - Removed redundant variable msg_can_timedout. [Ankit] Cc: Ramalingam C <ramalingam.c@intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210324113012.7564-2-anshuman.gupta@intel.com
2021-03-31drm/i915/display: Configure HDMI2.1 Pcon for FRL only if Src-Ctl mode is ↵Ankit Nautiyal1-2/+7
available Add the check if source control mode is supported by the PCON, before starting configuring PCON for FRL training, as per spec VESA DP2.0-HDMI2.1 PCON Draft-1 Sec-7. v2: Added spec details for the change. (Uma) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210323112422.1211-3-ankit.k.nautiyal@intel.com
2021-03-31drm/dp_helper: Define options for FRL training for HDMI2.1 PCONAnkit Nautiyal2-16/+18
Currently the FRL training mode (Concurrent, Sequential) and training type (Normal, Extended) are not defined properly and are passed as bool values in drm_helpers for pcon configuration for FRL training. This patch: -Add register masks for Sequential and Normal FRL training options. -Fixes the drm_helpers for FRL Training configuration to use the appropriate masks. -Modifies the calls to the above drm_helpers in i915/intel_dp as per the above change. v2: Re-used the register masks for these options, instead of enum. (Ville) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210323112422.1211-2-ankit.k.nautiyal@intel.com
2021-03-30gpu: host1x: Use HW-equivalent syncpoint expiration checkMikko Perttunen1-49/+2
Make syncpoint expiration checks always use the same logic used by the hardware. This ensures that there are no race conditions that could occur because of the hardware triggering a syncpoint interrupt and then the driver disagreeing. One situation where this could occur is if a job incremented a syncpoint too many times -- then the hardware would trigger an interrupt, but the driver would assume that a syncpoint value greater than the syncpoint's max value is in the future, and not clean up the job. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-30gpu: host1x: Remove cancelled waiters immediatelyMikko Perttunen3-8/+21
Before this patch, cancelled waiters would only be cleaned up once their threshold value was reached. Make host1x_intr_put_ref process the cancellation immediately to fix this. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-30gpu: host1x: Show number of pending waiters in debugfsMikko Perttunen1-3/+11
Show the number of pending waiters in the debugfs status file. This is useful for testing to verify that waiters do not leak or accumulate incorrectly. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-30gpu: host1x: Allow syncpoints without associated clientMikko Perttunen2-13/+25
Syncpoints don't need to be associated with any client, so remove the property, and expose host1x_syncpt_alloc. This will allow allocating syncpoints without prior knowledge of the engine that it will be used with. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-30Merge branch 'drm/tegra/fixes' into drm/tegra/for-nextThierry Reding3-21/+26
2021-03-30drm/tegra: sor: Grab runtime PM reference across resetThierry Reding1-0/+7
The SOR resets are exclusively shared with the SOR power domain. This means that exclusive access can only be granted temporarily and in order for that to work, a rigorous sequence must be observed. To ensure that a single consumer gets exclusive access to a reset, each consumer must implement a rigorous protocol using the reset_control_acquire() and reset_control_release() functions. However, these functions alone don't provide any guarantees at the system level. Drivers need to ensure that the only a single consumer has access to the reset at the same time. In order for the SOR to be able to exclusively access its reset, it must therefore ensure that the SOR power domain is not powered off by holding on to a runtime PM reference to that power domain across the reset assert/deassert operation. This used to work fine by accident, but was revealed when recently more devices started to rely on the SOR power domain. Fixes: 11c632e1cfd3 ("drm/tegra: sor: Implement acquire/release for reset") Reported-by: Jonathan Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-30drm/tegra: dc: Restore coupling of display controllersThierry Reding1-12/+8
Coupling of display controllers used to rely on runtime PM to take the companion controller out of reset. Commit fd67e9c6ed5a ("drm/tegra: Do not implement runtime PM") accidentally broke this when runtime PM was removed. Restore this functionality by reusing the hierarchical host1x client suspend/resume infrastructure that's similar to runtime PM and which perfectly fits this use-case. Fixes: fd67e9c6ed5a ("drm/tegra: Do not implement runtime PM") Reported-by: Dmitry Osipenko <digetx@gmail.com> Reported-by: Paul Fertser <fercerpav@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-30gpu: host1x: Use different lock classes for each clientMikko Perttunen1-4/+6
To avoid false lockdep warnings, give each client lock a different lock class, passed from the initialization site by macro. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-30drm/tegra: dc: Don't set PLL clock to 0HzDmitry Osipenko1-5/+5
RGB output doesn't allow to change parent clock rate of the display and PCLK rate is set to 0Hz in this case. The tegra_dc_commit_state() shall not set the display clock to 0Hz since this change propagates to the parent clock. The DISP clock is defined as a NODIV clock by the tegra-clk driver and all NODIV clocks use the CLK_SET_RATE_PARENT flag. This bug stayed unnoticed because by default PLLP is used as the parent clock for the display controller and PLLP silently skips the erroneous 0Hz rate changes because it always has active child clocks that don't permit rate changes. The PLLP isn't acceptable for some devices that we want to upstream (like Samsung Galaxy Tab and ASUS TF700T) due to a display panel clock rate requirements that can't be fulfilled by using PLLP and then the bug pops up in this case since parent clock is set to 0Hz, killing the display output. Don't touch DC clock if pclk=0 in order to fix the problem. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-29drm/i915/selftest: Add remap/rotate vma subtests when dst_stride!=width/heightImre Deak1-7/+86
Add selftests to test the POT stride padding functionality added in the previous patch. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-25-imre.deak@intel.com
2021-03-29drm/i915: Add support for FBs requiring a POT stride alignmentImre Deak7-22/+112
An upcoming platform has a restriction that the FB stride must be power-of-two aligned. To support framebuffer layouts that are not in this layout add a logic that pads the tile rows to the POT aligned size. The HW won't read the padding PTEs, so these don't have to point to an allocated address, or even have their valid flag set. So use a NULL PTE instead for instance the scratch page, which is simple and keeps the SG table compact. v2: - Simplify plane_view_dst_stride(). (Ville) - Pass pitch_tiles as unsigned int. v3: - Drop unintentional s/plane_state->rotation/plane_config->rotation/ change. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-24-imre.deak@intel.com
2021-03-29drm/i915: s/stride/src_stride/ in the intel_remapped_plane_info structImre Deak5-41/+41
An upcoming patch adds a new dst_stride field to the intel_remapped_plane_info struct, so for clarity rename the current stride field to src_stride. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-23-imre.deak@intel.com
2021-03-29drm/i915/selftest: Unify use of intel_remapped_plane_info in ↵Imre Deak1-29/+34
igt_vma_rotate_remap() Always use the modified copy of the intel_remapped_plane_info variables. An upcoming patch updates the dst_stride field in these copies after which we can't use the original versions. v2: Init view in igt_vma_rotate_remap() when declaring it. (Ville) Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-22-imre.deak@intel.com
2021-03-29drm/i915: Shrink the size of intel_remapped_plane_info structImre Deak2-8/+19
Save some place in the GTT VMAs by using a u16 instead of unsigned int to store the view dimensions. The maximum FB stride is 256kB which is 4096 tiles in the worst case (yf-tiles), the maximum FB height is 16k pixels, which is 16384 tiles in the worst case (linear 4x1 tiled FB). v2: - Fix worst case tile height formula in commit log. (Ville) - Add an assign_chk_ovf helper to simplify the related assignments. v3: - Enclose params of the assign_chk_ovf macro in parentheses. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-21-imre.deak@intel.com
2021-03-29drm/i915/intel_fb: Factor out calc_plane_remap_info()Imre Deak1-126/+77
Factor out to a new function the logic to calculate the FB remapping parameters both during creating the FB and when flipping to it. v2: - Keep stride next to offset calculation. (Ville) - Enclose check_array_bounds macro arguments in parentheses. v3: - Rebase on top of the struct intel_fb_view refactoring. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-20-imre.deak@intel.com
2021-03-29drm/i915: Simplify copying the FB view state to the plane stateImre Deak4-53/+35
Instead of copying separately the GTT remapped and color plane view info from the FB to the plane state, do this by copying the whole intel_fb_view struct. For this we make sure the FB view state is fully inited (that is also including the view type) already during FB creation, so this init is not required during atomic check time. This also means the we don't need to reset the unused color plane info during atomic check, as these are already reset during FB creation. I noticed that initial FBs will only work atm if they are page aligned (which BIOS most probably always ensures), but add a comment to sanitize this part once. Also we won't disable the plane if get_initial_plane_config() failed for some reason (for instance due to unsupported rotation), add a TODO: comment for this too. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-19-imre.deak@intel.com
2021-03-29drm/i915: Store the normal view FB pitch in FB's intel_fb_viewImre Deak1-3/+6
Instead of special casing getting the pitch for the normal view, store it during FB creation to the FB normal view struct and retrieve it from there during atomic check, as it's done for the rotated view. A follow-up patch does the same for a new FB remapped view. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-18-imre.deak@intel.com
2021-03-29drm/i915: Unify the FB and plane state view information into one structImre Deak8-136/+150
To allow the simplification of FB/plane view computation in the follow-up patches, unify the corresponding state in the intel_framebuffer and intel_plane_state structs into a new intel_fb_view struct. This adds some overhead to intel_framebuffer as the rotated view will have now space for 4 color planes instead of the required 2 and it'll also contain the unused offset for each color_plane info. Imo this is an acceptable trade-off to get a simplified way of the remap computation. Use the new intel_fb_view struct for the FB normal view as well, so (in the follow-up patches) we can remove the special casing for normal view calculation wrt. the calculation of remapped/rotated views. This also adds an overhead to the intel_framebuffer struct, as the gtt remap info and per-color plane offset/pitch is not required for the normal view, but imo this is an acceptable trade-off as above. The per-color plane pitch filed will be used by a follow-up patch, so we can retrieve the pitch for each view in the same way. No functional changes in this patch. v2: - Make the patch have _no functional change_. (fix skl_check_nv12_aux_surface() and skl_check_main_surface()). - s/i915_color_plane_view::pitch/stride/ (Ville) Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-17-imre.deak@intel.com
2021-03-29drm/i915/intel_fb: Factor out calc_plane_normal_size()Imre Deak1-21/+76
Factor out to a new function the logic to calculate an FB plane's normal-view size. Instead of using intel_remapped_plane_info, which is related only to remapping, add a helper to get the tile pitch and rows for an FB plane, so these helpers can be used both by the normal size calculation and the remapping code. Also add a new fb_plane_view_dims struct in which we can pass around the view (either FB plane or plane source) and tile dimensions conveniently to functions calculating further view parameters. v2: - Add back the +1 tile adjustment for x!=0 in calc_plane_normal_size(). (Ville) - s/pages/tiles/ in calc_plane_normal_size(). (Ville) - Add a helper for the plane view width calculation. (Ville) - Return tiles as unsigned int from calc_plane_normal_size(). Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-16-imre.deak@intel.com
2021-03-29drm/i915/intel_fb: Factor out calc_plane_aligned_offset()Imre Deak1-9/+16
Factor out to a new function the logic to convert the FB plane x/y values to a tile size based offset and new x/y relative to this offset. This makes intel_fill_fb_info() and intel_plane_remap_gtt() somewhat more readable. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-15-imre.deak@intel.com
2021-03-29drm/i915/intel_fb: Factor out convert_plane_offset_to_xy()Imre Deak1-28/+41
Factor out to a new function the logic to convert the FB plane offset to x/y and check the validity of x/y, with the goal to make intel_fill_fb_info() more readable. v2: Use &fb->base instead of a drm_fb alias. (Ville) Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-14-imre.deak@intel.com
2021-03-29drm/i915/intel_fb: s/dev_priv/i915/Imre Deak2-36/+36
Rename dev_priv to i915 in the intel_fb.[ch] files. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-13-imre.deak@intel.com
2021-03-29drm/i915/intel_fb: Unexport intel_fb_check_stride()Imre Deak2-3/+1
After the previous patch we can unexport intel_fb_check_stride(), which isn't needed by intel_display.c. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-12-imre.deak@intel.com
2021-03-29drm/i915/intel_fb: Pull FB plane functions from intel_display.cImre Deak6-831/+840
Move the FB plane specific functions from intel_display.c to intel_fb.c. There's more functions like this, but I leave moving those as well for a follow up, and for now moving only the ones needed by the end of this patchset (adding support for padding tile-rows in an FB GGTT view). Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-11-imre.deak@intel.com
2021-03-29drm/i915/intel_fb: Pull FB plane functions from intel_sprite.cImre Deak4-33/+36
Move the FB plane specific function from intel_sprite.c to intel_fb.c Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-10-imre.deak@intel.com
2021-03-29drm/i915/intel_fb: Pull is_surface_linear() from ↵Imre Deak4-12/+8
intel_display.c/skl_universal_plane.c Move is_surface_linear() to intel_fb.c and export it from here, also removing the duplicate definitions of it. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-9-imre.deak@intel.com
2021-03-29drm/i915/intel_fb: Pull FB plane functions from skl_universal_plane.cImre Deak4-36/+36
Move the FB plane related functions from skl_universal_plane.c to intel_fb.c. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-8-imre.deak@intel.com
2021-03-29drm/i915/intel_fb: Pull FB plane functions from intel_display_types.hImre Deak6-19/+48
Start collecting all the FB plane related functions into a new intel_fb.c file. v2: Drop display/ part of header includes. (Ville) Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-7-imre.deak@intel.com
2021-03-29drm/i915/selftest: Make sure to init i915_ggtt_view in igt_vma_rotate_remap()Imre Deak1-1/+1
This probably doesn't cause an issue, since the code checks the view type dependent size of the views before comparing them, but let's follow the practice to bzero the whole struct when initializing it. v2: Use {} instead of { } struct intializer. (Ville) Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-6-imre.deak@intel.com
2021-03-29drm/i915: Make sure i915_ggtt_view is inited when creating an FBImre Deak1-0/+2
This probably doesn't cause an issue, since the code checks the view type dependent size of the views before comparing them, but let's follow the practice to bzero the whole struct when initializing it. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-5-imre.deak@intel.com
2021-03-29drm/i915/selftest: Fix debug message in igt_vma_remapped_gtt()Imre Deak1-1/+1
The expected/found values were swapped in a debug message, fix this up. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-4-imre.deak@intel.com
2021-03-29drm/i915/selftest: Fix error handling in igt_vma_remapped_gtt()Imre Deak1-1/+1
An inner scope version of err shadows the variable in the outer scope, and err doesn't get set after a failure, fix these. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-3-imre.deak@intel.com
2021-03-29drm/i915: Fix rotation setup during plane HW readoutImre Deak1-6/+3
The HW plane state is cleared and inited after we store the rotation to it, so store it instead to the uapi state to match what we do with all other plane state until intel_plane_copy_uapi_to_hw_state() is called. Rotation for initial FBs is not supported atm, but let's still fix the plane state setup here. While at it remove the redundant intel_state->uapi.src/dst init, which will be done in intel_plane_copy_uapi_to_hw_state(). v2: Remove redundant intel_state->uapi.src/dst init. (Ville) Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-2-imre.deak@intel.com
2021-03-29drm/i915: Remove repeated declarationWan Jiabing3-3/+0
struct drm_i915_private, struct intel_crtc_state and struct intel_crtc is declared twice. Remove the duplicate. Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Wan Jiabing <wanjiabing@vivo.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210326012527.875026-1-wanjiabing@vivo.com
2021-03-29drm/amdgpu: fix offset calculation in amdgpu_vm_bo_clear_mappings()Nirmoy Das1-1/+1
Offset calculation wasn't correct as start addresses are in pfn not in bytes. CC: stable@vger.kernel.org Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-29drm/amd/pm: no need to force MCLK to highest when no display connectedEvan Quan1-1/+2
Correct the check for vblank short. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Tested-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org