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path: root/drivers/gpu/drm/nouveau/nvkm/engine
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2021-02-11drm/nouveau/bios: switch to instanced constructorBen Skeggs1-86/+85
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11drm/nouveau/bar: switch to instanced constructorBen Skeggs1-54/+53
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11drm/nouveau/acr: switch to instanced constructorBen Skeggs1-18/+17
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11drm/nouveau/nvkm: add macros for subdev layoutBen Skeggs1-0/+42
Rather than having to add new engines / engine instances to multiple places, define everything in include/nvkm/core/layout.h and use macros to generate the required plumbing. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11drm/nouveau/device: pass instance id when looking up a subdev/engineBen Skeggs7-95/+25
This switches to using the subdev list for lookup, and otherwise should be a no-op aside from switching the function signatures. Callers will be transitioned to split type+inst individually. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11drm/nouveau/subdev: store full subdev name in structBen Skeggs8-10/+10
Much easier to store this to avoid having to reconstruct a string for a specific subdev, taking into account whether it's instanced or not. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11drm/nouveau/subdev: store subdevs in listBen Skeggs1-38/+26
This is somewhat nicer to read. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11drm/nouveau/perfmon: use private spinlock to control exclusive access to perfmonBen Skeggs1-9/+10
nvkm_subdev.mutex is going away. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11drm/nouveau/fifo: private mutexBen Skeggs9-28/+29
nvkm_subdev.mutex is going away. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11drm/nouveau/disp: use private spinlock to control exclusive access to dispBen Skeggs1-9/+10
nvkm_subdev.mutex is going away. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-01-29drm/nouveau/fifo/tu102: Turing channel preemption fixAlistair Popple1-41/+2
Previous hardware allowed a MMU fault to be generated by software to trigger a context switch for engine recovery. Turing has the capability to preempt all work from a specific runlist processor and removed the registers currently used for triggering MMU faults. Attempting to access these non-existent registers results in further errors, so use the runlist preemption register instead. Signed-off-by: Alistair Popple <apopple@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-29drm/nouveau/fifo/tu102: FIFO interrupt fixes for TuringAlistair Popple1-69/+9
Some of the low level FIFO interrupt status bits have changed for Turing. Update the handling of these to match the hardware. Signed-off-by: Alistair Popple <apopple@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-29drm/nouveau/fifo/tu102: Move Turing specific FIFO functionsAlistair Popple3-30/+511
Turing requires some changes to FIFO interrupt handling due to changes in HW register layout. It also requires some changes to implement robust channel (RC) recovery. This preparatory patch moves the functions requiring changes into nvkm/engine/fifo/tu102.c so they can be altered without affecting gk104 and other users. It should not introduce any functional changes. Signed-off-by: Alistair Popple <apopple@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-15drm/nouveau/disp/ga10[24]: initial supportBen Skeggs11-8/+279
UEFI/RM no longer use IED scripts from the VBIOS, though they appear to have been updated for use by the x86 VBIOS code, so we should be able to continue using them for the moment. Unfortunately, we require some hacks to do so, as the BeforeLinkTraining IED script became a pointer to an array of scripts instead, without a revbump of the relevant tables. There's also some changes to SOR clock divider fiddling, which are hopefully correct enough that things work as they should. AFAIK, GA100 shouldn't have display, so it hasn't been added. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-15drm/nouveau/dmaobj/ga10[24]: initial supportBen Skeggs1-0/+2
Appears to be compatible with GV100 code, and not required on GA100, as it shouldn't have display. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-15drm/nouveau/i2c/ga10[024]: initial supportBen Skeggs1-0/+3
Appears to be compatible with GM200 code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-15drm/nouveau/gpio/ga10[024]: initial supportBen Skeggs1-0/+3
GA100 appears to be compatible with GK104 code, the others have some register moves. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-15drm/nouveau/bar/ga10[024]: initial supportBen Skeggs1-0/+3
Appears to be compatible with TU102 code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-15drm/nouveau/mmu/ga10[024]: initial supportBen Skeggs1-0/+3
Appears to be compatible with TU102 code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-15drm/nouveau/timer/ga10[024]: initial supportBen Skeggs1-0/+3
Appears to be compatible with GK20A code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-15drm/nouveau/fb/ga10[024]: initial supportBen Skeggs1-0/+3
No VPR scrub. GA102 and GA104 have a new VRAM size detection method. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-15drm/nouveau/imem/ga10[024]: initial supportBen Skeggs1-0/+3
Appears to be compatible with NV50 code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-15drm/nouveau/privring/ga10[024]: initial supportBen Skeggs1-0/+3
Appears to be compatible with GM200 code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-15drm/nouveau/mc/ga10[024]: initial supportBen Skeggs1-0/+3
Fortunately, all the interrupts we need to bring up basic display support are contained in a single leaf register, allowing this basic (but hackish) implementation. There's a bunch more invasive patches to come implementing all this in a better/more complete way, but trying to get a minimal series out first. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-15drm/nouveau/devinit/ga10[024]: initial supportBen Skeggs1-0/+3
VPLL regs changed a bit. There's more stuff to do around these, but it's less invasive to stick those changes into disp for now. None of that belongs here anymore anyhow - fix that someday. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-15drm/nouveau/bios/ga10[024]: initial supportBen Skeggs1-0/+3
Forcing PRAMIN-shadowing off for GA100, as it requires display, and we don't know if/where the fuse register for detecting its presence is. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-15drm/nouveau/pci/ga10[024]: initial supportBen Skeggs1-0/+3
Appears to be compatible with GP100 code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-15drm/nouveau/core: recognise GA10[024]Ben Skeggs2-3/+33
GA100 hidden behind a module option, as it's not been as well verified since initial bring-up and may need additional changes. There's no display anyway, so this can wait for a bit. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-15drm/nouveau/i2c/gk110: split out from i2c/gk104Ben Skeggs1-6/+6
No functional changes here yet. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-10-30drm/nouveau/device: fix changing endianess code to work on older GPUsKarol Herbst1-13/+26
With this we try to detect if the endianess switch works and assume LE if not. Suggested by Ben. Fixes: 51c05340e407 ("drm/nouveau/device: detect if changing endianness failed") Signed-off-by: Karol Herbst <kherbst@redhat.com> Cc: <stable@vger.kernel.org> # v5.8+ Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-10-07drm/nouveau/device: return error for unknown chipsetsKarol Herbst1-0/+1
Previously the code relied on device->pri to be NULL and to fail probing later. We really should just return an error inside nvkm_device_ctor for unsupported GPUs. Fixes: 24d5ff40a732 ("drm/nouveau/device: rework mmio mapping code to get rid of second map") Signed-off-by: Karol Herbst <kherbst@redhat.com> Cc: dann frazier <dann.frazier@canonical.com> Cc: dri-devel <dri-devel@lists.freedesktop.org> Cc: Dave Airlie <airlied@redhat.com> Cc: stable@vger.kernel.org Reviewed-by: Jeremy Cline <jcline@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201006220528.13925-1-kherbst@redhat.com
2020-08-06Merge tag 'drm-next-2020-08-06' of git://anongit.freedesktop.org/drm/drmLinus Torvalds33-66/+105
Pull drm updates from Dave Airlie: "New xilinx displayport driver, AMD support for two new GPUs (more header files), i915 initial support for RocketLake and some work on their DG1 (discrete chip). The core also grew some lockdep annotations to try and constrain what drivers do with dma-fences, and added some documentation on why the idea of indefinite fences doesn't work. The long list is below. I do have some fixes trees outstanding, but I'll follow up with those later. core: - add user def flag to cmd line modes - dma_fence_wait added might_sleep - dma-fence lockdep annotations - indefinite fences are bad documentation - gem CMA functions used in more drivers - struct mutex removal - more drm_ debug macro usage - set/drop master api fixes - fix for drm/mm hole size comparison - drm/mm remove invalid entry optimization - optimise drm/mm hole handling - VRR debugfs added - uncompressed AFBC modifier support - multiple display id blocks in EDID - multiple driver sg handling fixes - __drm_atomic_helper_crtc_reset in all drivers - managed vram helpers ttm: - ttm_mem_reg handling cleanup - remove bo offset field - drop CMA memtype flag - drop mappable flag xilinx: - New Xilinx ZynqMP DisplayPort Subsystem driver nouveau: - add CRC support - start using NVIDIA published class header files - convert all push buffer emission to new macros - Proper push buffer space management for EVO/NVD channels. - firmware loading fixes - 2MiB system memory pages support on Pascal and newer vkms: - larger cursor support i915: - Rocketlake platform enablement - Early DG1 enablement - Numerous GEM refactorings - DP MST fixes - FBC, PSR, Cursor, Color, Gamma fixes - TGL, RKL, EHL workaround updates - TGL 8K display support fixes - SDVO/HDMI/DVI fixes amdgpu: - Initial support for Sienna Cichlid GPU - Initial support for Navy Flounder GPU - SI UVD/VCE support - expose rotation property - Add support for unique id on Arcturus - Enable runtime PM on vega10 boards that support BACO - Skip BAR resizing if the bios already did id - Major swSMU code cleanup - Fixes for DCN bandwidth calculations amdkfd: - Track SDMA usage per process - SMI events interface radeon: - Default to on chip GART for AGP boards on all arches - Runtime PM reference count fixes msm: - headers regenerated causing churn - a650/a640 display and GPU enablement - dpu dither support for 6bpc panels - dpu cursor fix - dsi/mdp5 enablement for sdm630/sdm636/sdm66 tegra: - video capture prep support - reflection support mediatek: - convert mtk_dsi to bridge API meson: - FBC support sun4i: - iommu support rockchip: - register locking fix - per-pixel alpha support PX30 VOP mgag200: - ported to simple and shmem helpers - device init cleanups - use managed pci functions - dropped hw cursor support ast: - use managed pci functions - use managed VRAM helpers - rework cursor support malidp: - dev_groups support hibmc: - refactor hibmc_drv_vdac: vc4: - create TXP CRTC imx: - error path fixes and cleanups etnaviv: - clock handling and error handling cleanups - use pin_user_pages" * tag 'drm-next-2020-08-06' of git://anongit.freedesktop.org/drm/drm: (1747 commits) drm/msm: use kthread_create_worker instead of kthread_run drm/msm/mdp5: Add MDP5 configuration for SDM636/660 drm/msm/dsi: Add DSI configuration for SDM660 drm/msm/mdp5: Add MDP5 configuration for SDM630 drm/msm/dsi: Add phy configuration for SDM630/636/660 drm/msm/a6xx: add A640/A650 hwcg drm/msm/a6xx: hwcg tables in gpulist drm/msm/dpu: add SM8250 to hw catalog drm/msm/dpu: add SM8150 to hw catalog drm/msm/dpu: intf timing path for displayport drm/msm/dpu: set missing flush bits for INTF_2 and INTF_3 drm/msm/dpu: don't use INTF_INPUT_CTRL feature on sdm845 drm/msm/dpu: move some sspp caps to dpu_caps drm/msm/dpu: update UBWC config for sm8150 and sm8250 drm/msm/dpu: use right setup_blend_config for sm8150 and sm8250 drm/msm/a6xx: set ubwc config for A640 and A650 drm/msm/adreno: un-open-code some packets drm/msm: sync generated headers drm/msm/a6xx: add build_bw_table for A640/A650 drm/msm/a6xx: fix crashstate capture for A650 ...
2020-07-24drm/nouveau/kms/nv50-: implement proper push buffer control logicBen Skeggs9-8/+21
We had a, what was supposed to be temporary, hack in the KMS code where we'd completely drain an EVO/NVD channel's push buffer when wrapping to the start again, instead of treating it as a ring buffer. Let's fix that, finally. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau: Use fallthrough pseudo-keywordGustavo A. R. Silva4-21/+21
Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. [1] https://www.kernel.org/doc/html/latest/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/sec2/gp102: allow module to load when LSFW is missingBen Skeggs3-10/+13
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/gr/gm200-: explicitly handle nofwBen Skeggs12-11/+29
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/pmu/gm20x: don't pretend we support loading with our custom FWBen Skeggs1-4/+4
It technically loads, and runs, but is ultimately pointless outside of a very narrow window (fanless systems where one wants to attempt using the, broken for a lot of gm20x, memory reclocking code). It's also potentially dangerous to override the VBIOS-provided "Pre-OS" PMU, which would be responsible for fan control otherwise. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/acr: store a mask of LS falcons the controlling LSFW can bootstrapBen Skeggs1-0/+6
This will prevent some pain with broken firmware trees, as under some circumstances the HSFW can fail and leave the GPU in a state we don't know how to recover from. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/nvfw: firmware structures should begin with nvfw_Timur Tabi1-1/+1
Rename all structures that are used directly by firmware to have a nvfw_ prefix. This makes it easier to identify structures that have a fixed, specific layout. A future patch will define several more such structures, so it's important to be consistent now. Signed-off-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/gr/gf100-: make some functions staticBen Skeggs2-6/+6
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/disp/gm200-: remove 'head' parameter from nvkm_ior_func.hdmi.scdc()Ben Skeggs3-5/+4
It's no longer required. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/disp/gm200-: fix regression from HDA SOR selection changesBen Skeggs1-9/+21
Fixes: 9b5ca547bb8 ("drm/nouveau/disp/gm200-: detect and potentially disable HDA support on some SORs") Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-06-04drm/nouveau: gr/gk20a: Use firmware version 0Thierry Reding1-1/+1
Tegra firmware doesn't actually use any version numbers and passing -1 causes the existing firmware binaries not to be found. Use version 0 to find the correct files. Fixes: ef16dc278ec2 ("drm/nouveau/gr/gf100-: select implementation based on available FW") Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-06-04drm/nouveau/disp/gm200-: detect and potentially disable HDA support on some SORsBen Skeggs4-4/+135
Some HDA pin widgets may be disabled by BIOS, and unavailable from a SOR. Our SOR allocation policy uses this information to allocate an appropriate SOR when HDA is supported by a display. Thank you to NVIDIA for providing the information to determine this. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-06-04drm/nouveau/disp/gp100: split SOR implementation from gm200Ben Skeggs5-2/+63
GP100 needs different HDA detection. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-06-04drm/nouveau/disp: modify OR allocation policy to account for HDA requirementsBen Skeggs1-4/+22
Since GM200, SORs are no longer tied to a specific connector, and we allocate them instead, with the assumption that all SORs are equally capable. However, there's a 1<->1 mapping between SOR and HDA pin widget, and it turns out that it's possible for some widgets to be disabled... In order to avoid picking a SOR without a valid pin widget, some new rules need to be added. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-06-04drm/nouveau/disp: split part of OR allocation logic into a functionBen Skeggs1-26/+37
No logical changes here, this is just moving the code to make the changes in the next commit more obvious. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-06-04drm/nouveau/disp: provide hint to OR allocation about HDA requirementsBen Skeggs3-4/+4
Will be used by a subsequent commit to influence SOR allocation policy. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-06-01drm/nouveau/disp/gm200-: fix NV_PDISP_SOR_HDMI2_CTRL(n) selectionBen Skeggs1-2/+2
This is a SOR register, and not indexed by the bound head. Fixes display not coming up on high-bandwidth HDMI displays under a number of configurations. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-22drm/nouveau/disp/hda/gv100-: NV_PDISP_SF_AUDIO_CNTRL0 register movedBen Skeggs5-2/+35
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-24 05:48:28 +0300